From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: neil.armstrong@linaro.org,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dt-bindings: dma: qcom,bam-dma: add optional memory interconnect properties
Date: Thu, 9 Feb 2023 13:55:44 +0530 [thread overview]
Message-ID: <32153a4b-9974-a42a-ef30-c0bd8cbc732b@linaro.org> (raw)
In-Reply-To: <0f16d63f-3bb0-54aa-bcb4-4c666d4b2846@linaro.org>
On 2/8/23 2:38 PM, neil.armstrong@linaro.org wrote:
> On 08/02/2023 10:03, Krzysztof Kozlowski wrote:
>> On 07/02/2023 16:27, Dmitry Baryshkov wrote:
>>> On 07/02/2023 15:35, Neil Armstrong wrote:
>>>> On 07/02/2023 11:32, Dmitry Baryshkov wrote:
>>>>> On 07/02/2023 12:03, Neil Armstrong wrote:
>>>>>> Recents SoCs like the SM8450 or SM8550 requires memory interconnect
>>>>>> in order to have functional DMA.
>>>>>>
>>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>>> ---
>>>>>> Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml | 6 ++++++
>>>>>> 1 file changed, 6 insertions(+)
>>>>>
>>>>> I suspect this will not work without a change for a driver.
>>>>>
>>>>
>>>> I had the impression single interconnect entries would be taken in
>>>> account
>>>> by the platform core, but it doesn't seem to be the case, anyway I
>>>> can;t
>>>> find
>>>> any code doing that.
>>>
>>> Probably you mixed interconnects and power-domains here.
>>>
>>
>> The driver change was submitted some time ago:
>> https://lore.kernel.org/all/20210505213731.538612-10-bhupesh.sharma@linaro.org/
>>
>> There is already DTS user of it and we expect driver to be resubmitted
>> at some point.
>>
>> What I don't really get is that crypto driver sets bandwidth for
>> interconnects, not the BAM. Why BAM needs interconnect? Usually you do
>> not need to initialize some middle paths. Getting the final interconnect
>> path (e.g. crypto-memory) is enough, because it includes everything in
>> between.
>
> Indeed the interconnect on BAM may be redundant since QCE sets the BW,
> I'll investigate to understand if it's also necessary on BAM.
Since we are already doing this via QCE driver (since crypto block on
qcom SoCs employs BAM DMA services) via [1], this change is not needed
for sm8150, sm8250, sm8350 and subsequent qcom SoCs (available
presently), so this patch can be dropped.
[1]. https://www.spinics.net/lists/linux-arm-msm/msg142957.html
Thanks,
Bhupesh
next prev parent reply other threads:[~2023-02-09 8:25 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-07 10:03 [PATCH] dt-bindings: dma: qcom,bam-dma: add optional memory interconnect properties Neil Armstrong
2023-02-07 10:32 ` Dmitry Baryshkov
2023-02-07 13:35 ` Neil Armstrong
2023-02-07 15:27 ` Dmitry Baryshkov
2023-02-08 9:03 ` Krzysztof Kozlowski
2023-02-08 9:08 ` neil.armstrong
2023-02-09 8:25 ` Bhupesh Sharma [this message]
2023-02-09 8:27 ` neil.armstrong
2023-02-10 5:43 ` Vinod Koul
2023-02-08 8:58 ` Krzysztof Kozlowski
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