From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sameer Pujar <spujar@nvidia.com>,
vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, thierry.reding@gmail.com,
jonathanh@nvidia.com, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
ldewangan@nvidia.com, mkumard@nvidia.com
Subject: Re: [RESEND PATCH 1/2] dt-bindings: dma: Add reg-names to nvidia,tegra210-adma
Date: Wed, 22 May 2024 08:47:52 +0200 [thread overview]
Message-ID: <56bf93ac-6c1e-48aa-89d0-7542ea707848@kernel.org> (raw)
In-Reply-To: <e6fab314-8d1e-4ed7-bb5a-025fd65e1494@nvidia.com>
On 22/05/2024 07:35, Sameer Pujar wrote:
>
>
> On 21-05-2024 17:23, Krzysztof Kozlowski wrote:
>> On 21/05/2024 13:08, Sameer Pujar wrote:
>>> From: Mohan Kumar <mkumard@nvidia.com>
>>>
>>> For Non-Hypervisor mode, Tegra ADMA driver requires the register
>>> resource range to include both global and channel page in the reg
>>> entry. For Hypervisor more, Tegra ADMA driver requires only the
>>> channel page and global page range is not allowed for access.
>>>
>>> Add reg-names DT binding for Hypervisor mode to help driver to
>>> differentiate the config between Hypervisor and Non-Hypervisor
>>> mode of execution.
>>>
>>> Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
>>> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
>>> ---
>>> .../devicetree/bindings/dma/nvidia,tegra210-adma.yaml | 10 ++++++++++
>>> 1 file changed, 10 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
>>> index 877147e95ecc..ede47f4a3eec 100644
>>> --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
>>> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
>>> @@ -29,8 +29,18 @@ properties:
>>> - const: nvidia,tegra186-adma
>>>
>>> reg:
>>> + description: |
>>> + For hypervisor mode, the address range should include a
>>> + ADMA channel page address range, for non-hypervisor mode
>>> + it starts with ADMA base address covering Global and Channel
>>> + page address range.
>>> maxItems: 1
>>>
>>> + reg-names:
>>> + description: only required for Hypervisor mode.
>> This does not work like that. I provide vm entry for non-hypervisor mode
>> and what? You claim it is virtualized?
>>
>> Drop property.
>
> With 'vm' entry added for hypervisor mode, the 'reg' address range needs
> to be updated to use channel specific region only. This is used to
> inform driver to skip global regions which is taken care by hypervisor.
> This is expected to be used in the scenario where Linux acts as a
> virtual machine (VM). May be the hypervisor mode gives a different
> impression here? Sorry, I did not understand what dropping the property
> exactly means here.
It was imperative. Drop it. Remove it. I provided explanation why.
Also, drop unneeded |.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-05-22 6:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-21 11:07 [RESEND PATCH 0/2] Virtualization support for Tegra ADMA Sameer Pujar
2024-05-21 11:08 ` [RESEND PATCH 1/2] dt-bindings: dma: Add reg-names to nvidia,tegra210-adma Sameer Pujar
2024-05-21 11:53 ` Krzysztof Kozlowski
2024-05-22 5:35 ` Sameer Pujar
2024-05-22 6:47 ` Krzysztof Kozlowski [this message]
2024-05-22 7:43 ` Sameer Pujar
2024-05-22 11:29 ` Krzysztof Kozlowski
2024-05-24 7:36 ` Thierry Reding
2024-05-28 6:48 ` Krzysztof Kozlowski
2024-05-30 12:48 ` Thierry Reding
2024-05-31 7:43 ` Krzysztof Kozlowski
2024-05-31 9:06 ` Thierry Reding
2024-05-28 15:35 ` Rob Herring
2024-05-30 12:29 ` Thierry Reding
2024-05-21 11:08 ` [RESEND PATCH 2/2] dmaengine: tegra210-adma: Add support for ADMA virtualization Sameer Pujar
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