From: Tom Zanussi <tom.zanussi@linux.intel.com>
To: Fenghua Yu <fenghua.yu@intel.com>,
herbert@gondor.apana.org.au, davem@davemloft.net,
vkoul@kernel.org
Cc: dave.jiang@intel.com, tony.luck@intel.com,
wajdi.k.feghali@intel.com, james.guilford@intel.com,
kanchana.p.sridhar@intel.com, giovanni.cabiddu@intel.com,
hdanton@sina.com, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org
Subject: Re: [PATCH v3 01/15] dmaengine: idxd: add wq driver name support for accel-config user tool
Date: Mon, 01 May 2023 09:01:04 -0500 [thread overview]
Message-ID: <6835178f8f58f6fce7797953f64c3f4c959d6ade.camel@linux.intel.com> (raw)
In-Reply-To: <d886d1dd-51c8-d2e6-940b-9e5041707c6e@intel.com>
Hi Fenghua,
On Fri, 2023-04-28 at 17:14 -0700, Fenghua Yu wrote:
> Hi, Tom,
>
> On 4/28/23 13:55, Tom Zanussi wrote:
> > From: Dave Jiang <dave.jiang@intel.com>
> >
> > With the possibility of multiple wq drivers that can be bound to
> > the wq,
> > the user config tool accel-config needs a way to know which wq
> > driver to
> > bind to the wq. Introduce per wq driver_name sysfs attribute where
> > the user
> > can indicate the driver to be bound to the wq. This allows accel-
> > config to
> > just bind to the driver using wq->driver_name.
> >
> > Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> > Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
> > ---
>
> ...
>
> > diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
> > index 7ced8d283d98..505118fc19de 100644
> > --- a/drivers/dma/idxd/idxd.h
> > +++ b/drivers/dma/idxd/idxd.h
> > @@ -214,6 +214,8 @@ struct idxd_wq {
> > char name[WQ_NAME_SIZE + 1];
> > u64 max_xfer_bytes;
> > u32 max_batch_size;
> > +
> > + char driver_name[WQ_NAME_SIZE + 1];
>
> It's confused to use "WQ_NAME_SIZE" for driver name size.
> Maybe it's better to have a new definition "DRIVER_NAME_SIZE"?
> BTW, WQ_NAME_SIZE is 1024 which is unnecessary big for storing
> driver_name[] in the structure. It would be better to have a smaller
> size (e.g. 128) in DRIVER_NAME_SIZE.
Yes, that makes sense - I'll add an IAA_DRIVER_NAME_SIZE of 128 and use
that instead.
Thanks,
Tom
>
> Thanks.
>
> -Fenghua
next prev parent reply other threads:[~2023-05-01 14:01 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 20:55 [PATCH v3 00/15] crypto: Add Intel Analytics Accelerator (IAA) crypto compression driver Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 01/15] dmaengine: idxd: add wq driver name support for accel-config user tool Tom Zanussi
2023-04-29 0:14 ` Fenghua Yu
2023-05-01 14:01 ` Tom Zanussi [this message]
2023-04-28 20:55 ` [PATCH v3 02/15] dmaengine: idxd: add external module driver support for dsa_bus_type Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 03/15] dmaengine: idxd: Export drv_enable/disable and related functions Tom Zanussi
2023-05-01 18:39 ` Fenghua Yu
2023-04-28 20:55 ` [PATCH v3 04/15] dmaengine: idxd: Export descriptor management functions Tom Zanussi
2023-05-01 14:49 ` Dave Jiang
2023-05-01 18:41 ` Fenghua Yu
2023-04-28 20:55 ` [PATCH v3 05/15] dmaengine: idxd: Export wq resource " Tom Zanussi
2023-05-01 18:41 ` Fenghua Yu
2023-04-28 20:55 ` [PATCH v3 06/15] dmaengine: idxd: Add private_data to struct idxd_wq Tom Zanussi
2023-05-01 14:50 ` Dave Jiang
2023-05-01 18:50 ` Fenghua Yu
2023-04-28 20:55 ` [PATCH v3 07/15] dmaengine: idxd: add callback support for iaa crypto Tom Zanussi
2023-05-01 20:48 ` Fenghua Yu
2023-04-28 20:55 ` [PATCH v3 08/15] crypto: iaa - Add IAA Compression Accelerator Documentation Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 09/15] crypto: iaa - Add Intel IAA Compression Accelerator crypto driver core Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 10/15] crypto: iaa - Add per-cpu workqueue table with rebalancing Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 11/15] crypto: iaa - Add compression mode management along with fixed mode Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 12/15] crypto: iaa - Add support for iaa_crypto deflate compression algorithm Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 13/15] crypto: iaa - Add support for default IAA 'canned' compression mode Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 14/15] crypto: iaa - Add irq support for the crypto async interface Tom Zanussi
2023-04-28 20:55 ` [PATCH v3 15/15] crypto: iaa - Add IAA Compression Accelerator stats Tom Zanussi
2023-04-28 21:00 ` Randy Dunlap
2023-04-28 21:06 ` Tom Zanussi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=6835178f8f58f6fce7797953f64c3f4c959d6ade.camel@linux.intel.com \
--to=tom.zanussi@linux.intel.com \
--cc=dave.jiang@intel.com \
--cc=davem@davemloft.net \
--cc=dmaengine@vger.kernel.org \
--cc=fenghua.yu@intel.com \
--cc=giovanni.cabiddu@intel.com \
--cc=hdanton@sina.com \
--cc=herbert@gondor.apana.org.au \
--cc=james.guilford@intel.com \
--cc=kanchana.p.sridhar@intel.com \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=tony.luck@intel.com \
--cc=vkoul@kernel.org \
--cc=wajdi.k.feghali@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox