Re: [PATCH v4 2/2] dmaengine: fsl-edma: Support dynamic scatter/gather chaining

["Benoît Monin" <benoit.monin@bootlin.com>]

On Friday, 5 June 2026 at 00:01:13 CEST, Frank Li wrote:
> On Mon, May 18, 2026 at 02:36:45PM +0200, Benoît Monin wrote:
[...]
> > +static void fsl_edma_link_sg(struct fsl_edma_chan *fsl_chan, struct fsl_edma_desc *fsl_desc)
> > +{
> > +	u32 flags = fsl_edma_drvflags(fsl_chan);
> > +	struct fsl_edma_hw_tcd *last_tcd;
> > +	struct fsl_edma_desc *prev_desc;
> > +	struct virt_dma_desc *vdesc;
> > +	u16 csr;
> > +
> > +	lockdep_assert_held(&fsl_chan->vchan.lock);
> > +
> > +	if (!(flags & FSL_EDMA_DRV_SPLIT_REG))
> > +		return;
> > +
> > +	vdesc = list_last_entry_or_null(&fsl_chan->vchan.desc_submitted,
> > +					struct virt_dma_desc, node);
> > +	if (!vdesc)
> > +		vdesc = list_last_entry_or_null(&fsl_chan->vchan.desc_issued,
> > +						struct virt_dma_desc, node);
> > +	if (!vdesc)
> > +		return;
> > +
> > +	prev_desc = to_fsl_edma_desc(vdesc);
> > +	last_tcd = prev_desc->tcd[prev_desc->n_tcds - 1].vtcd;
> > +
> > +	csr = fsl_edma_get_tcd_to_cpu(fsl_chan, last_tcd, csr);
> > +	if (!(csr & EDMA_TCD_CSR_D_REQ))
> > +		return;
> > +
> > +	fsl_edma_set_tcd_to_le(fsl_chan, last_tcd, fsl_desc->tcd[0].ptcd, dlast_sga);
> > +
> > +	csr &= ~EDMA_TCD_CSR_D_REQ;
> > +	csr |= EDMA_TCD_CSR_E_SG;
> 
> suppose here need dma_wmb() to make sure dlast_sga happen before csr.
> 
Yes, I will add it.

> I remember ask dma risk condition problem, but I forget detail.
> 
>  TCD1
>  TCD2
>  TCD3 (last one),
> 
> If DMAengine already load TCD3 to register and moving data,
> 
> You update TCD3's dlast_sga? Does DMA engine fetch again TCD3 to get
> updated dlast_sga?
> 
If the DMAengine already fetched TCD3 from the main memory, then the changes
done to dlast_sga and csr in memory will be ignored. In that case, we are
back to the current operation. After handling TCD3, the DMAengine will
raise the end-of-transfer interrupt, the channel will be set to
DMA_COMPLETE, then the call to fsl_edma_xfer_desc() will re-enable the
channel with the next issued descriptor.

Best regards,
-- 
Benoît Monin, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com