Re: [PATCH] dmaengine: mmp_pdma: fix wrong extended DRCMR base for SpacemiT K3

["Troy Mitchell" <troy.mitchell@linux.spacemit.com>]

> K1 never touches DMA request numbers higher than 45. It's not K1 who
> needs the extended DRCMR. PXAxx needs them.

YES, K1 does not exercise the extended DRCMR window. I will
update the commit message in v2 to avoid using K1 as the basis for the
change and describe the corrected K3 register layout directly.

> The SpacemiT K3 datasheet still 'incorrectly' carries the base 0x1000.
> Refer to [1], Section 16.1.4.6 DMA Connectivity & Assignments
> which still states 0x1000 as the base:
>
> 0x1004 Request for SSP0 TxReq 0xD4040000
> 0x1008 Request for SSP0 RxReq 0xD4040000
>
> I would recommend you double check with the SpacemiT team to make sure.
> It's better SpacemiT can fix both the online document and downloadable
> PDF as well.
>
> [1]: https://www.spacemit.com/community/document/info?lang=en&nodepath=hardware/key_stone/k3/k3_docs/k3_usermanual/16_peripherals/dma.md

The online K3 DMA document at [1] was updated on June 24. It now lists
SSP0 at 0x1104/0x1108, SSP1 at 0x110c/0x1110, and QSPI at
0x1154/0x1158, all in the extended DRCMR window based at 0x1100.

> Before we flip it, could you please confirm your source fo truth:
> did you confirm 0x1100 on k3 silicon with a real DMA transaction,
> or from the datasheet? It would help if you could share your
> test setup.

We confirmed the corrected mapping on K3 silicon with real DMA
transactions for both SPI and QSPI. Both were successfully tested using
the extended DRCMR registers in the 0x1100 window, so the change is
supported by hardware validation independently of the documentation.

                                            - Troy