From: Vinod Koul <vkoul@kernel.org>
To: pandith.n@intel.com
Cc: Eugeniy.Paltsev@synopsys.com, dmaengine@vger.kernel.org,
lakshmi.bai.raja.subramanian@intel.com, kris.pan@intel.com,
mallikarjunappa.sangannavar@intel.com,
Srikanth.Thokala@intel.com
Subject: Re: [linux-drivers-review] [PATCH V2 1/1] dmaengine: dw-axi-dmac: support parallel memory <--> peripheral transfers
Date: Wed, 14 Jul 2021 10:20:10 +0530 [thread overview]
Message-ID: <YO5tAlVshNLat2jt@matsya> (raw)
In-Reply-To: <20210709095133.26867-1-pandith.n@intel.com>
On 09-07-21, 15:21, pandith.n@intel.com wrote:
> From: Pandith N <pandith.n@intel.com>
>
> Added support for multiple DMA_MEM_TO_DEV, DMA_DEV_TO_MEM transfers in
> parallel. This is required for peripherals using DMA for transmit and
> receive operations at the same time. APB slot number needs to be programmed
> in channel hardware handshaking interface.
>
> Removed free slot check algorithm in dw_axi_dma_set_hw_channel. For 8
> DMA channels, use respective handshake slot in DMA_HS_SEL APB register.
and why was that removed, maybe a different patch for that?
>
> Burst length, DMA HW capability set in dt-binding is now used in driver.
Another patch...
So, too many changes below for the description above, pls split
--
~Vinod
next prev parent reply other threads:[~2021-07-14 4:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 9:51 [linux-drivers-review] [PATCH V2 1/1] dmaengine: dw-axi-dmac: support parallel memory <--> peripheral transfers pandith.n
2021-07-14 4:50 ` Vinod Koul [this message]
2021-07-14 12:45 ` N, Pandith
2021-07-20 12:24 ` Vinod Koul
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