From: Dave Jiang <dave.jiang@intel.com>
To: Sinan Kaya <okaya@codeaurora.org>, "vkoul@kernel.org" <vkoul@kernel.org>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>
Subject: dmaengine: ioatdma: set the completion address register after channel reset
Date: Mon, 11 Jun 2018 12:38:48 -0700 [thread overview]
Message-ID: <c29e27fd-ee10-2a0a-8434-f8630fdff50f@intel.com> (raw)
On 06/11/2018 12:37 PM, Sinan Kaya wrote:
> On 6/11/2018 3:30 PM, Dave Jiang wrote:
>> + /* set the completion address register again */
>> + writel(((u64)ioat_chan->completion_dma) & 0x00000000FFFFFFFF,
>> + ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
>> + writel(((u64)ioat_chan->completion_dma) >> 32,
>> + ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
>
> You could have used lower_32_bits() and upper_32_bits() macros here.
>
I just copy and pasted legacy code from somewhere else in the driver. I
can update.
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next reply other threads:[~2018-06-11 19:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-11 19:38 Dave Jiang [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-06-11 19:37 dmaengine: ioatdma: set the completion address register after channel reset Sinan Kaya
2018-06-11 19:30 Dave Jiang
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