From: Ciara Loftus <ciara.loftus@intel.com>
To: dev@dpdk.org
Cc: Dima Ruinskiy <dima.ruinskiy@intel.com>,
stable@dpdk.org, Ciara Loftus <ciara.loftus@intel.com>
Subject: [PATCH 08/10] net/e1000/base: propagate PHY control register write error
Date: Wed, 20 May 2026 12:52:45 +0000 [thread overview]
Message-ID: <20260520125256.354336-9-ciara.loftus@intel.com> (raw)
In-Reply-To: <20260520125256.354336-1-ciara.loftus@intel.com>
From: Dima Ruinskiy <dima.ruinskiy@intel.com>
During HV PHY workaround handling, a failure writing to the PHY control
register was silently discarded rather than returned to the caller. Add
the missing early return so the error is correctly propagated.
Fixes: 5a32a257f957 ("e1000: more NICs in base driver")
Cc: stable@dpdk.org
Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/e1000/base/e1000_ich8lan.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/intel/e1000/base/e1000_ich8lan.c b/drivers/net/intel/e1000/base/e1000_ich8lan.c
index e62847fb4e..0290a7dcb4 100644
--- a/drivers/net/intel/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/intel/e1000/base/e1000_ich8lan.c
@@ -2696,6 +2696,8 @@ STATIC s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
e1000_phy_sw_reset_generic(hw);
ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL,
0x3140);
+ if (ret_val)
+ return ret_val;
}
}
--
2.43.0
next prev parent reply other threads:[~2026-05-20 12:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-20 12:52 [PATCH 00/10] e1000 base code update Ciara Loftus
2026-05-20 12:52 ` [PATCH 01/10] net/e1000/base: refactor K1 exit timeout configuration Ciara Loftus
2026-05-20 12:52 ` [PATCH 02/10] net/e1000/base: fix typo in e1000 base code Ciara Loftus
2026-05-20 12:52 ` [PATCH 03/10] net/e1000/base: fix possible variable overflow Ciara Loftus
2026-05-20 12:52 ` [PATCH 04/10] net/e1000/base: reclassify MAC type Ciara Loftus
2026-05-20 12:52 ` [PATCH 05/10] net/e1000/base: clear DPG enable bit post MAC reset Ciara Loftus
2026-05-21 16:42 ` Bruce Richardson
2026-05-20 12:52 ` [PATCH 06/10] net/e1000/base: fix coding style issues Ciara Loftus
2026-05-20 12:52 ` [PATCH 07/10] net/e1000/base: fix NVM loop bounds and pointer access Ciara Loftus
2026-05-20 12:52 ` Ciara Loftus [this message]
2026-05-20 12:52 ` [PATCH 09/10] net/e1000/base: auto-negotiation status for 1000BASE-T Ciara Loftus
2026-05-20 12:52 ` [PATCH 10/10] net/e1000/base: update version info Ciara Loftus
2026-05-21 16:47 ` [PATCH 00/10] e1000 base code update Bruce Richardson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260520125256.354336-9-ciara.loftus@intel.com \
--to=ciara.loftus@intel.com \
--cc=dev@dpdk.org \
--cc=dima.ruinskiy@intel.com \
--cc=stable@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox