[PATCH v2] net/ixgbe: add fdir_buffer_size devarg

[Zhang Tengfei <zhtfdev@gmail.com>]

After public fdir_conf was removed from rte_eth_conf, the private
pballoc field stays at the 64K default. Add a probe-time devarg so
applications can select 128K or 256K Flow Director table size.

Reject Flow Director with DCB in ixgbe_fdir_configure(), since FDIR
steals Rx packet buffer space that DCB also uses.

Signed-off-by: Zhang Tengfei <zhtfdev@gmail.com>
---
v2:
* rename fdir_pballoc to fdir_buffer_size
* reject Flow Director when DCB is enabled in ixgbe_fdir_configure()
* document the DCB limitation as an RST note
* keep the original indent of ixgbe_parse_devargs

 doc/guides/nics/ixgbe.rst              | 26 ++++++++++++
 doc/guides/rel_notes/release_26_11.rst |  5 +++
 drivers/net/intel/ixgbe/ixgbe_ethdev.c | 55 ++++++++++++++++++++++----
 drivers/net/intel/ixgbe/ixgbe_ethdev.h |  2 +-
 drivers/net/intel/ixgbe/ixgbe_fdir.c   | 13 +++++-
 drivers/net/intel/ixgbe/ixgbe_flow.c   |  7 +++-
 6 files changed, 98 insertions(+), 10 deletions(-)

diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst
index f075ef6f6f..340a54478d 100644
--- a/doc/guides/nics/ixgbe.rst
+++ b/doc/guides/nics/ixgbe.rst
@@ -164,6 +164,32 @@ be passed as part of EAL arguments. For example,
   This option informs the driver that in this case, SDP3 is not to be
   used as a check for link up by testing for laser on/off.
 
+PF Runtime Options
+^^^^^^^^^^^^^^^^^^
+
+The following ``devargs`` option can be enabled at probe time.
+It must be passed as part of EAL arguments. For example,
+
+.. code-block:: console
+
+   dpdk-testpmd -a 81:00.0,fdir_buffer_size=256k -- -i
+
+- ``fdir_buffer_size`` (default **64k**)
+
+  Memory allocated from the Rx packet buffer for Flow Director filters.
+  Valid values are ``64k``, ``128k`` and ``256k``.
+
+  Larger values increase the number of hardware filter entries
+  (perfect mode: 2K / 4K / 8K; signature mode: 8K / 16K / 32K)
+  and reduce Rx packet buffer space by the same amount.
+  On 82599 the Rx packet buffer is 512KB, so ``256k`` takes half of it.
+
+  This value is read only at probe time. Changing it requires restarting
+  the process with a new EAL argument.
+
+.. note::
+   The driver rejects Flow Director when DCB is enabled.
+
 VF Runtime Options
 ^^^^^^^^^^^^^^^^^^
 
diff --git a/doc/guides/rel_notes/release_26_11.rst b/doc/guides/rel_notes/release_26_11.rst
index 87c7e81bde..2d9d32fe0b 100644
--- a/doc/guides/rel_notes/release_26_11.rst
+++ b/doc/guides/rel_notes/release_26_11.rst
@@ -55,6 +55,11 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Updated Intel ixgbe driver.**
+
+  Added ``fdir_buffer_size`` devarg to select the Flow Director table size
+  (``64k``, ``128k`` or ``256k``) at probe time. The default remains ``64k``.
+
 
 Removed Items
 -------------
diff --git a/drivers/net/intel/ixgbe/ixgbe_ethdev.c b/drivers/net/intel/ixgbe/ixgbe_ethdev.c
index c5010f623c..771223275c 100644
--- a/drivers/net/intel/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/intel/ixgbe/ixgbe_ethdev.c
@@ -128,9 +128,11 @@
 #define IXGBE_DMATXCTL_VT_MASK                 0xFFFF0000
 
 #define IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE	"fiber_sdp3_no_tx_disable"
+#define IXGBE_DEVARG_FDIR_BUFFER_SIZE		"fdir_buffer_size"
 
 static const char * const ixgbe_valid_arguments[] = {
 	IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE,
+	IXGBE_DEVARG_FDIR_BUFFER_SIZE,
 	NULL
 };
 
@@ -1054,19 +1056,44 @@ ixgbe_swfw_lock_reset(struct ixgbe_hw *hw)
 	ixgbe_release_swfw_semaphore(hw, mask);
 }
 
-static void
+static int
+devarg_handle_fdir_buffer_size(const char *key, const char *value,
+			       void *extra_args)
+{
+	enum rte_eth_fdir_pballoc_type *pballoc = extra_args;
+
+	if (value == NULL || extra_args == NULL)
+		return -EINVAL;
+
+	if (strcmp(value, "64k") == 0)
+		*pballoc = RTE_ETH_FDIR_PBALLOC_64K;
+	else if (strcmp(value, "128k") == 0)
+		*pballoc = RTE_ETH_FDIR_PBALLOC_128K;
+	else if (strcmp(value, "256k") == 0)
+		*pballoc = RTE_ETH_FDIR_PBALLOC_256K;
+	else {
+		PMD_INIT_LOG(ERR, "invalid %s='%s', use 64k, 128k or 256k", key, value);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int
 ixgbe_parse_devargs(struct ixgbe_adapter *adapter,
 		      struct rte_devargs *devargs)
 {
 	struct rte_kvargs *kvlist;
 	uint16_t sdp3_no_tx_disable;
+	enum rte_eth_fdir_pballoc_type pballoc;
+	int ret = 0;
 
 	if (devargs == NULL)
-		return;
+		return 0;
 
 	kvlist = rte_kvargs_parse(devargs->args, ixgbe_valid_arguments);
 	if (kvlist == NULL)
-		return;
+		return 0;
 
 	if (rte_kvargs_count(kvlist, IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE) == 1 &&
 	    rte_kvargs_process(kvlist, IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE,
@@ -1074,7 +1101,17 @@ ixgbe_parse_devargs(struct ixgbe_adapter *adapter,
 	    sdp3_no_tx_disable == 1)
 		adapter->sdp3_no_tx_disable = 1;
 
+	if (rte_kvargs_count(kvlist, IXGBE_DEVARG_FDIR_BUFFER_SIZE) != 0) {
+		if (rte_kvargs_process(kvlist, IXGBE_DEVARG_FDIR_BUFFER_SIZE,
+				       devarg_handle_fdir_buffer_size,
+				       &pballoc) != 0)
+			ret = -EINVAL;
+		else
+			adapter->fdir_conf.pballoc = pballoc;
+	}
+
 	rte_kvargs_free(kvlist);
+	return ret;
 }
 
 /*
@@ -1141,8 +1178,11 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
 
 	/* NOTE: review for potential ordering optimization */
 	rte_atomic_store_explicit(&ad->link_thread_running, 0, rte_memory_order_seq_cst);
-	ixgbe_parse_devargs(eth_dev->data->dev_private,
-			    pci_dev->device.devargs);
+	ret = ixgbe_parse_devargs(eth_dev->data->dev_private,
+				  pci_dev->device.devargs);
+	if (ret != 0)
+		return ret;
+
 	rte_eth_copy_pci_info(eth_dev, pci_dev);
 	eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 
@@ -2726,7 +2766,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
 	if (fdir_conf->mode != RTE_FDIR_MODE_NONE) {
 		struct ixgbe_hw_fdir_info *info =
 			IXGBE_DEV_PRIVATE_TO_FDIR_INFO(adapter);
-		err = ixgbe_fdir_configure(adapter, fdir_conf, &info->mask);
+		err = ixgbe_fdir_configure(dev, fdir_conf, &info->mask);
 		if (err)
 			goto error;
 	}
@@ -8665,7 +8705,8 @@ RTE_PMD_REGISTER_PCI(net_ixgbe, rte_ixgbe_pmd);
 RTE_PMD_REGISTER_PCI_TABLE(net_ixgbe, pci_id_ixgbe_map);
 RTE_PMD_REGISTER_KMOD_DEP(net_ixgbe, "* igb_uio | uio_pci_generic | vfio-pci");
 RTE_PMD_REGISTER_PARAM_STRING(net_ixgbe,
-			      IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE "=<0|1>");
+			      IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE "=<0|1>"
+			      IXGBE_DEVARG_FDIR_BUFFER_SIZE "=<64k|128k|256k>");
 RTE_PMD_REGISTER_PCI(net_ixgbe_vf, rte_ixgbevf_pmd);
 RTE_PMD_REGISTER_PCI_TABLE(net_ixgbe_vf, pci_id_ixgbevf_map);
 RTE_PMD_REGISTER_KMOD_DEP(net_ixgbe_vf, "* igb_uio | vfio-pci");
diff --git a/drivers/net/intel/ixgbe/ixgbe_ethdev.h b/drivers/net/intel/ixgbe/ixgbe_ethdev.h
index 5d3243cb4d..fd3236fda2 100644
--- a/drivers/net/intel/ixgbe/ixgbe_ethdev.h
+++ b/drivers/net/intel/ixgbe/ixgbe_ethdev.h
@@ -705,7 +705,7 @@ void ixgbe_filterlist_flush(struct rte_eth_dev *dev);
 /*
  * Flow director function prototypes
  */
-int ixgbe_fdir_configure(struct ixgbe_adapter *adapter,
+int ixgbe_fdir_configure(struct rte_eth_dev *dev,
 			 const struct rte_eth_fdir_conf *fdir_conf,
 			 const struct ixgbe_hw_fdir_mask *fdir_mask);
 int ixgbe_fdir_set_input_mask(struct ixgbe_adapter *adapter,
diff --git a/drivers/net/intel/ixgbe/ixgbe_fdir.c b/drivers/net/intel/ixgbe/ixgbe_fdir.c
index b32dc54287..0159c5b3b7 100644
--- a/drivers/net/intel/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/intel/ixgbe/ixgbe_fdir.c
@@ -555,10 +555,11 @@ ixgbe_set_fdir_flex_conf(struct ixgbe_adapter *adapter,
 }
 
 int
-ixgbe_fdir_configure(struct ixgbe_adapter *adapter,
+ixgbe_fdir_configure(struct rte_eth_dev *dev,
 		const struct rte_eth_fdir_conf *fdir_conf,
 		const struct ixgbe_hw_fdir_mask *fdir_mask)
 {
+	struct ixgbe_adapter *adapter = dev->data->dev_private;
 	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(adapter);
 	int err;
 	uint32_t fdirctrl, pbsize;
@@ -567,6 +568,16 @@ ixgbe_fdir_configure(struct ixgbe_adapter *adapter,
 
 	PMD_INIT_FUNC_TRACE();
 
+	switch (dev->data->dev_conf.rxmode.mq_mode) {
+	case RTE_ETH_MQ_RX_VMDQ_DCB:
+	case RTE_ETH_MQ_RX_DCB:
+	case RTE_ETH_MQ_RX_DCB_RSS:
+		PMD_INIT_LOG(ERR, "Flow Director is not supported with DCB");
+		return -ENOTSUP;
+	default:
+		break;
+	}
+
 	if (hw->mac.type != ixgbe_mac_82599EB &&
 		hw->mac.type != ixgbe_mac_X540 &&
 		hw->mac.type != ixgbe_mac_X550 &&
diff --git a/drivers/net/intel/ixgbe/ixgbe_flow.c b/drivers/net/intel/ixgbe/ixgbe_flow.c
index 6868893d46..d7dee610d5 100644
--- a/drivers/net/intel/ixgbe/ixgbe_flow.c
+++ b/drivers/net/intel/ixgbe/ixgbe_flow.c
@@ -2637,7 +2637,12 @@ ixgbe_fdir_flow_program(struct rte_eth_dev *dev,
 
 	/* Configure FDIR mode if this is the first filter */
 	if (fdir_conf->mode == RTE_FDIR_MODE_NONE) {
-		ret = ixgbe_fdir_configure(adapter, &local_fdir_conf, &fdir_rule->mask);
+		ret = ixgbe_fdir_configure(dev, &local_fdir_conf,
+					   &fdir_rule->mask);
+		if (ret == -ENOTSUP)
+			return rte_flow_error_set(error, ENOTSUP,
+				RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
+				"Flow Director is not supported with DCB");
 		if (ret) {
 			return rte_flow_error_set(error, EINVAL,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
-- 
2.55.0