DPDK-dev Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
	Vidya Sagar Velumuri <vvelumuri@marvell.com>,
	Ankur Dwivedi <adwivedi@marvell.com>,
	Rupesh Chiluka <rchiluka@marvell.com>,
	Nithin Dabilpuram <ndabilpuram@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 03/16] crypto/cnxk: enable cq_all and allocate extra CQ line
Date: Mon, 19 Oct 2026 18:37:44 +0530	[thread overview]
Message-ID: <20261019130759.2181566-4-ktejasree@marvell.com> (raw)
In-Reply-To: <20261019130759.2181566-1-ktejasree@marvell.com>

With cq_all enabled, allocate one extra CQ line beyond the HW ring size
as HW is writing to Nth slot also and update the pending tail after
sym raw dequeue completes a request.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 drivers/common/cnxk/roc_cpt.c             | 7 +++++--
 drivers/crypto/cnxk/cn20k_cryptodev_ops.c | 1 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 1 +
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 9ba591d724..8c60a28fff 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -704,8 +704,11 @@ cpt_lf_cq_init(struct roc_cpt_lf *lf)
 	/* Disable CPT completion queue */
 	roc_cpt_cq_disable(lf);
 
-	/* Set command queue base address */
-	len = PLT_ALIGN(lf->cq_size * (ROC_CPT_CQ_ENTRY_SIZE_UNIT << lf->cq_entry_size), ROC_ALIGN);
+	/* Set completion queue (CQ) base address */
+	len = lf->cq_size;
+	if (roc_model_is_cn20k() && lf->cq_all)
+		len++;
+	len = PLT_ALIGN(len * (ROC_CPT_CQ_ENTRY_SIZE_UNIT << lf->cq_entry_size), ROC_ALIGN);
 	lf->cq_vaddr = plt_zmalloc(len, ROC_ALIGN);
 	if (lf->cq_vaddr == NULL)
 		return -ENOMEM;
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
index 18100ff1f8..a63b97654b 100644
--- a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
@@ -1429,6 +1429,7 @@ cn20k_cpt_sym_raw_dequeue(void *qptr, uint8_t *drv_ctx, int *dequeue_status,
 	if (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))
 		rte_mempool_put(qp->meta_info.pool, infl_req->mdata);
 
+	pend_q->tail = pq_tail;
 	*dequeue_status = 1;
 exit:
 	return opaque;
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 6553ac90a1..1e0ea9d358 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -535,6 +535,7 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 		/* CQ entry size is 128B(32 << 2) */
 		qp->lf.cq_entry_size = 2;
 		qp->lf.cq_size = nb_desc;
+		qp->lf.cq_all = true;
 	}
 
 	ret = roc_cpt_lf_init(roc_cpt, &qp->lf);
-- 
2.43.0


  parent reply	other threads:[~2026-10-19 13:08 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-19 13:07 [PATCH 00/16] fixes and improvements to cnxk crypto PMD Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 01/16] common/cnxk: use context invalidate for cn20k Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 02/16] crypto/cnxk: return HW CPTR from cptr_get " Tejasree Kondoj
2026-10-19 13:07 ` Tejasree Kondoj [this message]
2026-10-19 13:07 ` [PATCH 04/16] common/cnxk: validate cipher key length in IPsec SA fill Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 05/16] crypto/cnxk: reject truncated TLS records in decrypt Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 06/16] crypto/cnxk: fix CN20K CPT error recovery Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 07/16] crypto/cnxk: validate TLS xform and keys before SA key copy Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 08/16] crypto/cnxk: reject oversized SG vectors in raw datapath Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 09/16] crypto/cnxk: guard trim len bounds in TLS 1.2 MAC trim Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 10/16] crypto/cnxk: enable ctx cache for cn20k crypto Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 11/16] crypto/cnxk: guard trim len in TLS 1.2 MAC trim for CN20K Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 12/16] crypto/cnxk: validate TLS 1.2 MAC trim lengths Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 13/16] crypto/cnxk: bound SG segment count in packet iov builders Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 14/16] crypto/cnxk: bound SG iovec index in mbuf walk Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 15/16] crypto/cnxk: add cq_ena devarg for CPT CQ mode Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 16/16] crypto/cnxk: size CN20K IPsec SA by context length Tejasree Kondoj
2026-10-22 18:46 ` [PATCH 00/16] fixes and improvements to cnxk crypto PMD Akhil Goyal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20261019130759.2181566-4-ktejasree@marvell.com \
    --to=ktejasree@marvell.com \
    --cc=adwivedi@marvell.com \
    --cc=anoobj@marvell.com \
    --cc=dev@dpdk.org \
    --cc=gakhil@marvell.com \
    --cc=ndabilpuram@marvell.com \
    --cc=rchiluka@marvell.com \
    --cc=vvelumuri@marvell.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox