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From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
	Vidya Sagar Velumuri <vvelumuri@marvell.com>,
	Ankur Dwivedi <adwivedi@marvell.com>,
	Rupesh Chiluka <rchiluka@marvell.com>,
	Nithin Dabilpuram <ndabilpuram@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 06/16] crypto/cnxk: fix CN20K CPT error recovery
Date: Mon, 19 Oct 2026 18:37:47 +0530	[thread overview]
Message-ID: <20261019130759.2181566-7-ktejasree@marvell.com> (raw)
In-Reply-To: <20261019130759.2181566-1-ktejasree@marvell.com>

Reprogram completion queue base and size registers in
roc_cpt_cq_enable as hardware clears them after fatal error.
Also reset pending queue head and tail during queue pair reset so
software completion state stays aligned with the reset hardware
queue.

Fixes: 13ce9121c3c0 ("common/cnxk: add routines to operate CPT CQ")
Fixes: 4e8a41acaffb ("crypto/cnxk: support CPT CQ for CN20K")

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 drivers/common/cnxk/roc_cpt.c            | 13 +++++++++++++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c |  6 ++++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 8c60a28fff..eae3f134e9 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -1147,7 +1147,20 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum cpt_eng_type eng_type)
 void
 roc_cpt_cq_enable(struct roc_cpt_lf *lf)
 {
+	union cpt_lf_cq_base lf_cq_base = {.u = 0x0};
+	union cpt_lf_cq_size lf_cq_size = {.u = 0x0};
 	union cpt_lf_cq_ctl lf_cq_ctl = {.u = 0x0};
+	uintptr_t addr;
+
+	/* Disable completion queue */
+	roc_cpt_cq_disable(lf);
+
+	/* Reconfigure CQ base and size, same as cpt_lf_cq_init() */
+	addr = (uintptr_t)lf->cq_vaddr;
+	lf_cq_base.s.addr = addr >> 7;
+	plt_write64(lf_cq_base.u, lf->rbase + CPT_LF_CQ_BASE);
+	lf_cq_size.s.size = lf->cq_size;
+	plt_write64(lf_cq_size.u, lf->rbase + CPT_LF_CQ_SIZE);
 
 	lf_cq_ctl.s.ena = 1;
 	lf_cq_ctl.s.dq_ack_ena = lf->dq_ack_ena;
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 1e0ea9d358..95f64a79ae 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -596,6 +596,7 @@ cnxk_cpt_queue_pair_reset(struct rte_cryptodev *dev, uint16_t qp_id,
 {
 	if (conf == NULL) {
 		struct cnxk_cpt_vf *vf = dev->data->dev_private;
+		struct cnxk_cpt_qp *qp;
 		struct roc_cpt_lf *lf;
 
 		if (vf == NULL)
@@ -603,6 +604,11 @@ cnxk_cpt_queue_pair_reset(struct rte_cryptodev *dev, uint16_t qp_id,
 
 		lf = vf->cpt.lf[qp_id];
 		roc_cpt_lf_reset(lf);
+
+		qp = dev->data->queue_pairs[qp_id];
+		qp->pend_q.head = 0;
+		qp->pend_q.tail = 0;
+
 		roc_cpt_iq_enable(lf);
 
 		if (lf->cpt_cq_ena)
-- 
2.43.0


  parent reply	other threads:[~2026-10-19 13:08 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-19 13:07 [PATCH 00/16] fixes and improvements to cnxk crypto PMD Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 01/16] common/cnxk: use context invalidate for cn20k Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 02/16] crypto/cnxk: return HW CPTR from cptr_get " Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 03/16] crypto/cnxk: enable cq_all and allocate extra CQ line Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 04/16] common/cnxk: validate cipher key length in IPsec SA fill Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 05/16] crypto/cnxk: reject truncated TLS records in decrypt Tejasree Kondoj
2026-10-19 13:07 ` Tejasree Kondoj [this message]
2026-10-19 13:07 ` [PATCH 07/16] crypto/cnxk: validate TLS xform and keys before SA key copy Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 08/16] crypto/cnxk: reject oversized SG vectors in raw datapath Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 09/16] crypto/cnxk: guard trim len bounds in TLS 1.2 MAC trim Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 10/16] crypto/cnxk: enable ctx cache for cn20k crypto Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 11/16] crypto/cnxk: guard trim len in TLS 1.2 MAC trim for CN20K Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 12/16] crypto/cnxk: validate TLS 1.2 MAC trim lengths Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 13/16] crypto/cnxk: bound SG segment count in packet iov builders Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 14/16] crypto/cnxk: bound SG iovec index in mbuf walk Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 15/16] crypto/cnxk: add cq_ena devarg for CPT CQ mode Tejasree Kondoj
2026-10-19 13:07 ` [PATCH 16/16] crypto/cnxk: size CN20K IPsec SA by context length Tejasree Kondoj
2026-10-22 18:46 ` [PATCH 00/16] fixes and improvements to cnxk crypto PMD Akhil Goyal

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