From: Nawal Kishor <nkishor@marvell.com>
To: <dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>,
Nawal Kishor <nkishor@marvell.com>
Cc: <jerinj@marvell.com>, <asekhar@marvell.com>
Subject: [PATCH 1/2] common/cnxk: fix DPC alloc config width
Date: Fri, 30 Oct 2026 14:46:51 +0530 [thread overview]
Message-ID: <20261030091700.1237155-1-nkishor@marvell.com> (raw)
The dpc_conf field of the NPA DPC alloc mailbox request is a 64-bit
value, but it was declared as 16 bits in struct npa_cn20k_dpc_alloc_req
and in roc_npa_dpc_alloc(). The upper bits of the configuration were
truncated before reaching the AF.
Widen both to 64 bits.
Fixes: 28d65f12ac77 ("common/cnxk: add NPA diagnostic counter")
Signed-off-by: Nawal Kishor <nkishor@marvell.com>
---
drivers/common/cnxk/roc_mbox.h | 2 +-
drivers/common/cnxk/roc_npa.c | 2 +-
drivers/common/cnxk/roc_npa.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index 279a9cc99b..e21596c82e 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -1466,7 +1466,7 @@ struct npa_cn20k_aq_enq_rsp {
struct npa_cn20k_dpc_alloc_req {
struct mbox_msghdr hdr;
- uint16_t __io dpc_conf;
+ uint64_t __io dpc_conf;
};
struct npa_cn20k_dpc_alloc_rsp {
diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index 425bbc782b..ebeebf1205 100644
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -1850,7 +1850,7 @@ roc_npa_dev_unlock(void)
}
int
-roc_npa_dpc_alloc(uint8_t *counter_id, uint16_t conf)
+roc_npa_dpc_alloc(uint8_t *counter_id, uint64_t conf)
{
struct npa_cn20k_dpc_alloc_req *req;
struct npa_cn20k_dpc_alloc_rsp *rsp;
diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h
index db610cbd2c..df68e13ec6 100644
--- a/drivers/common/cnxk/roc_npa.h
+++ b/drivers/common/cnxk/roc_npa.h
@@ -893,7 +893,7 @@ int __roc_api roc_npa_aura_drop_set(uint64_t aura_handle, uint64_t limit,
void __roc_api roc_npa_dev_lock(void);
void __roc_api roc_npa_dev_unlock(void);
-int __roc_api roc_npa_dpc_alloc(uint8_t *counter_id, uint16_t conf);
+int __roc_api roc_npa_dpc_alloc(uint8_t *counter_id, uint64_t conf);
int __roc_api roc_npa_dpc_free(uint8_t counter_id);
int __roc_api roc_npa_pool_dpc_enable(uint64_t aura_handle, uint8_t counter_id, uint32_t flags);
int __roc_api roc_npa_pool_dpc_disable(uint64_t aura_handle, uint32_t flags);
--
2.48.1
next reply other threads:[~2026-10-30 9:17 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-30 9:16 Nawal Kishor [this message]
2026-10-30 9:16 ` [PATCH 2/2] common/cnxk: fix DPC double counting for legacy pools Nawal Kishor
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