* [PATCH 1/9] net/ice/base: fix loop counter type in recipe creation
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
@ 2026-10-22 16:51 ` Vladimir Medvedkin
2026-10-22 16:51 ` [PATCH 2/9] net/ice/base: fix integer overflow in RL profile calculation Vladimir Medvedkin
` (9 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:51 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Deepthi Kavalur, stable
From: Deepthi Kavalur <deepthi.kavalur@intel.com>
The lookup loop in ice_add_adv_recipe() uses a u8 counter, while the
number of lookups is u16. Use a u16 counter, so it cannot wrap around
before reaching the bound.
Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org
Signed-off-by: Deepthi Kavalur <deepthi.kavalur@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_switch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/intel/ice/base/ice_switch.c b/drivers/net/intel/ice/base/ice_switch.c
index 94099c5215..cba3ca05fc 100644
--- a/drivers/net/intel/ice/base/ice_switch.c
+++ b/drivers/net/intel/ice/base/ice_switch.c
@@ -8254,7 +8254,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
struct ice_recp_grp_entry *r_tmp;
struct ice_sw_fv_list_entry *tmp;
struct ice_sw_recipe *rm;
- u8 i;
+ u16 i;
int status = ICE_SUCCESS;
if (!ice_is_prof_rule(rinfo->tun_type) && !lkups_cnt)
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/9] net/ice/base: fix integer overflow in RL profile calculation
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
2026-10-22 16:51 ` [PATCH 1/9] net/ice/base: fix loop counter type in recipe creation Vladimir Medvedkin
@ 2026-10-22 16:51 ` Vladimir Medvedkin
2026-10-22 16:51 ` [PATCH 3/9] net/ice/base: fix out-of-bounds accesses in DDP and NVM code Vladimir Medvedkin
` (8 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:51 UTC (permalink / raw)
To: dev
Cc: bruce.richardson, anatoly.burakov, Krzysztof Galazka, stable,
Lukasz Czapnik
From: Krzysztof Galazka <krzysztof.galazka@intel.com>
When calculating the Tx rate limit profile, BIT_ULL(i) multiplied by
ICE_RL_PROF_TS_MULTIPLIER overflows to zero for large values of i,
resulting in a division by zero. Divide the PSM clock frequency by the
multiplier once before the loop instead.
Fixes: 93e84b1bfc92 ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org
Signed-off-by: Krzysztof Galazka <krzysztof.galazka@intel.com>
Signed-off-by: Lukasz Czapnik <lukasz.czapnik@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_sched.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/net/intel/ice/base/ice_sched.c b/drivers/net/intel/ice/base/ice_sched.c
index 2b867b74de..7e1defa955 100644
--- a/drivers/net/intel/ice/base/ice_sched.c
+++ b/drivers/net/intel/ice/base/ice_sched.c
@@ -4014,32 +4014,30 @@ static int
ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
struct ice_aqc_rl_profile_elem *profile)
{
- s64 bytes_per_sec, ts_rate, mv_tmp;
- int status = ICE_ERR_PARAM;
+ u32 ts_freq = hw->psm_clk_freq / ICE_RL_PROF_TS_MULTIPLIER;
+ u64 bytes_per_sec, ts_rate, mv_tmp;
+ int i, status = ICE_ERR_PARAM;
bool found = false;
s32 encode = 0;
- s64 mv = 0;
- s32 i;
+ u64 mv = 0;
/* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
return status;
/* Bytes per second from Kbps */
- bytes_per_sec = DIV_S64((s64)bw * 1000, BITS_PER_BYTE);
+ bytes_per_sec = DIV_U64((u64)bw * 1000, BITS_PER_BYTE);
/* encode is 6 bits but really useful are 5 bits */
for (i = 0; i < 64; i++) {
u64 pow_result = BIT_ULL(i);
- ts_rate = DIV_S64((s64)hw->psm_clk_freq,
- pow_result * ICE_RL_PROF_TS_MULTIPLIER);
- if (ts_rate <= 0)
+ ts_rate = DIV_U64(ts_freq, pow_result);
+ if (ts_rate == 0)
continue;
/* Multiplier value */
- mv_tmp = DIV_S64(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
- ts_rate);
+ mv_tmp = DIV_U64(bytes_per_sec * ICE_RL_PROF_MULTIPLIER, ts_rate);
/* Round to the nearest ICE_RL_PROF_MULTIPLIER */
mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 3/9] net/ice/base: fix out-of-bounds accesses in DDP and NVM code
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
2026-10-22 16:51 ` [PATCH 1/9] net/ice/base: fix loop counter type in recipe creation Vladimir Medvedkin
2026-10-22 16:51 ` [PATCH 2/9] net/ice/base: fix integer overflow in RL profile calculation Vladimir Medvedkin
@ 2026-10-22 16:51 ` Vladimir Medvedkin
2026-10-22 16:52 ` [PATCH 4/9] net/ice/base: add PQC certificate provisioning capability Vladimir Medvedkin
` (7 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:51 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Janardhanan Arumugam, stable
From: Janardhanan Arumugam <janardhanan.arumugam@intel.com>
The following bounds checks are missing or can overflow:
- segment offset and size checks in DDP package verification
can wrap around
- buffer range check of a signed DDP segment can wrap around
- package count reported by firmware is not limited to the size
of the response buffer
- NVM access functions zero more than the size of the output buffer
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Fixes: f035feb47458 ("net/ice/base: support NVM access commands")
Fixes: c4afa96e4de1 ("net/ice/base: check DDP package compatibility")
Fixes: ed3066a3b1b0 ("net/ice/base: refactor DDP code")
Cc: stable@dpdk.org
Signed-off-by: Janardhanan Arumugam <janardhanan.arumugam@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_ddp.c | 19 ++++++++++++-------
drivers/net/intel/ice/base/ice_nvm.c | 4 ++--
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/net/intel/ice/base/ice_ddp.c b/drivers/net/intel/ice/base/ice_ddp.c
index ae80d93656..072d1beb83 100644
--- a/drivers/net/intel/ice/base/ice_ddp.c
+++ b/drivers/net/intel/ice/base/ice_ddp.c
@@ -519,7 +519,7 @@ ice_download_pkg_config_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,
bufs = ice_find_buf_table(seg);
buf_count = LE32_TO_CPU(bufs->buf_count);
- if (start >= buf_count || start + count > buf_count)
+ if (start >= buf_count || count > buf_count - start)
return ICE_DDP_PKG_ERR;
state = ice_dwnld_cfg_bufs_no_lock(hw, bufs->buf_array, start, count,
@@ -843,6 +843,7 @@ enum ice_ddp_state ice_get_pkg_info(struct ice_hw *hw)
struct ice_aqc_get_pkg_info_resp *pkg_info;
u16 size;
u32 i;
+ u32 pkg_count;
size = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT);
pkg_info = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);
@@ -854,7 +855,8 @@ enum ice_ddp_state ice_get_pkg_info(struct ice_hw *hw)
goto init_pkg_free_alloc;
}
- for (i = 0; i < LE32_TO_CPU(pkg_info->count); i++) {
+ pkg_count = min(LE32_TO_CPU(pkg_info->count), (u32)ICE_PKG_CNT);
+ for (i = 0; i < pkg_count; i++) {
#define ICE_PKG_FLAG_COUNT 4
char flags[ICE_PKG_FLAG_COUNT + 1] = { 0 };
u8 place = 0;
@@ -966,6 +968,7 @@ ice_enum_labels(struct ice_seg *ice_seg, u32 type, struct ice_pkg_enum *state,
enum ice_ddp_state ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
{
u32 seg_count;
+ u32 off;
u32 i;
if (len < ice_struct_size(pkg, seg_offset, 1))
@@ -988,17 +991,18 @@ enum ice_ddp_state ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
/* all segments must fit within length */
for (i = 0; i < seg_count; i++) {
- u32 off = LE32_TO_CPU(pkg->seg_offset[i]);
struct ice_generic_seg_hdr *seg;
+ off = LE32_TO_CPU(pkg->seg_offset[i]);
+
/* segment header must fit */
- if (len < off + sizeof(*seg))
+ if (len < off || len - off < sizeof(*seg))
return ICE_DDP_PKG_INVALID_FILE;
seg = (struct ice_generic_seg_hdr *)((u8 *)pkg + off);
/* segment body must fit */
- if (len < off + LE32_TO_CPU(seg->seg_size))
+ if (len < off || len - off < LE32_TO_CPU(seg->seg_size))
return ICE_DDP_PKG_INVALID_FILE;
}
@@ -1059,7 +1063,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
struct ice_aqc_get_pkg_info_resp *pkg;
enum ice_ddp_state state;
u16 size;
- u32 i;
+ u32 i, pkg_count;
/* Check package version compatibility */
state = ice_chk_pkg_version(&hw->pkg_ver);
@@ -1087,7 +1091,8 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
goto fw_ddp_compat_free_alloc;
}
- for (i = 0; i < LE32_TO_CPU(pkg->count); i++) {
+ pkg_count = min(LE32_TO_CPU(pkg->count), (u32)ICE_PKG_CNT);
+ for (i = 0; i < pkg_count; i++) {
/* loop till we find the NVM package */
if (!pkg->pkg_info[i].is_in_nvm)
continue;
diff --git a/drivers/net/intel/ice/base/ice_nvm.c b/drivers/net/intel/ice/base/ice_nvm.c
index 56c6c96a95..19aa150541 100644
--- a/drivers/net/intel/ice/base/ice_nvm.c
+++ b/drivers/net/intel/ice/base/ice_nvm.c
@@ -1227,7 +1227,7 @@ ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
return ICE_ERR_NO_MEMORY;
/* Initialize the data buffer to zeros */
- ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
+ ice_memset(data, 0, sizeof(union ice_nvm_access_data), ICE_NONDMA_MEM);
/* Fill in the features data */
data->drv_features.major = ICE_NVM_ACCESS_MAJOR_VER;
@@ -1342,7 +1342,7 @@ ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
/* Always initialize the output data, even on failure */
- ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
+ ice_memset(data, 0, sizeof(union ice_nvm_access_data), ICE_NONDMA_MEM);
/* Make sure this is a valid read/write access request */
status = ice_validate_nvm_rw_reg(cmd);
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 4/9] net/ice/base: add PQC certificate provisioning capability
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (2 preceding siblings ...)
2026-10-22 16:51 ` [PATCH 3/9] net/ice/base: fix out-of-bounds accesses in DDP and NVM code Vladimir Medvedkin
@ 2026-10-22 16:52 ` Vladimir Medvedkin
2026-10-22 16:52 ` [PATCH 5/9] net/ice/base: add NVM definitions for Wake-on-LAN config Vladimir Medvedkin
` (6 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:52 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Stefan Wegrzyn
From: Stefan Wegrzyn <stefan.wegrzyn@intel.com>
Add the PQC certificate provisioning device capability, part of CNSA 2.0
and SPDM 1.4 support, and the Shadow RAM location of the PQC manifest
bank.
Signed-off-by: Stefan Wegrzyn <stefan.wegrzyn@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_adminq_cmd.h | 1 +
drivers/net/intel/ice/base/ice_common.c | 5 +++++
drivers/net/intel/ice/base/ice_type.h | 5 ++++-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/intel/ice/base/ice_adminq_cmd.h b/drivers/net/intel/ice/base/ice_adminq_cmd.h
index 36656b0aad..7b318b0a1b 100644
--- a/drivers/net/intel/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/intel/ice/base/ice_adminq_cmd.h
@@ -130,6 +130,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE 0x0085
#define ICE_AQC_CAPS_NAC_TOPOLOGY 0x0087
#define ICE_AQC_CAPS_OROM_RECOVERY_UPDATE 0x0090
+#define ICE_AQC_CAPS_PQC_CERT_PROVISIONING 0x0091
#define ICE_AQC_CAPS_ROCEV2_LAG 0x0092
#define ICE_AQC_BIT_ROCEV2_LAG 0x01
#define ICE_AQC_BIT_SRIOV_LAG 0x02
diff --git a/drivers/net/intel/ice/base/ice_common.c b/drivers/net/intel/ice/base/ice_common.c
index 7d8f677c99..1a8f4e7a6e 100644
--- a/drivers/net/intel/ice/base/ice_common.c
+++ b/drivers/net/intel/ice/base/ice_common.c
@@ -2635,6 +2635,11 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
ice_debug(hw, ICE_DBG_INIT, "%s: orom_recovery_update = %d\n",
prefix, caps->orom_recovery_update);
break;
+ case ICE_AQC_CAPS_PQC_CERT_PROVISIONING:
+ caps->pqc_cert_provisioning = (number == 1);
+ ice_debug(hw, ICE_DBG_INIT, "%s: pqc_cert_provisioning = %d\n",
+ prefix, caps->pqc_cert_provisioning);
+ break;
case ICE_AQC_CAPS_NEXT_CLUSTER_ID:
caps->next_cluster_id_support = (number == 1);
ice_debug(hw, ICE_DBG_INIT, "%s: next_cluster_id_support = %d\n",
diff --git a/drivers/net/intel/ice/base/ice_type.h b/drivers/net/intel/ice/base/ice_type.h
index 6d8c187689..83d20358b9 100644
--- a/drivers/net/intel/ice/base/ice_type.h
+++ b/drivers/net/intel/ice/base/ice_type.h
@@ -756,6 +756,7 @@ struct ice_hw_common_caps {
bool tx_sched_topo_comp_mode_en;
/* Support for OROM update in Recovery Mode */
bool orom_recovery_update;
+ bool pqc_cert_provisioning;
bool next_cluster_id_support;
};
@@ -1628,8 +1629,10 @@ struct ice_aq_get_set_rss_lut_params {
#define ICE_SR_EMP_SR_SETTINGS_PTR 0x48
#define ICE_SR_CONFIGURATION_METADATA_PTR 0x4D
#define ICE_SR_IMMEDIATE_VALUES_PTR 0x4E
-#define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134
+#define ICE_SR_PQC_MANIFEST_BANK_PTR 0x80
+#define ICE_SR_PQC_MANIFEST_BANK_SIZE 0x81
#define ICE_SR_POR_REGISTERS_AUTOLOAD_PTR 0x118
+#define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134
/* CSS Header words */
#define ICE_NVM_CSS_HDR_LEN_L 0x02
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 5/9] net/ice/base: add NVM definitions for Wake-on-LAN config
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (3 preceding siblings ...)
2026-10-22 16:52 ` [PATCH 4/9] net/ice/base: add PQC certificate provisioning capability Vladimir Medvedkin
@ 2026-10-22 16:52 ` Vladimir Medvedkin
2026-10-22 16:52 ` [PATCH 6/9] net/ice/base: add NVM write flags for eRoT minSREV update Vladimir Medvedkin
` (5 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:52 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Chinh Cao
From: Chinh Cao <chinh.t.cao@intel.com>
Add NVM definitions for reading the per-PF Wake-on-LAN configuration.
Signed-off-by: Chinh Cao <chinh.t.cao@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_type.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/intel/ice/base/ice_type.h b/drivers/net/intel/ice/base/ice_type.h
index 83d20358b9..28d0387608 100644
--- a/drivers/net/intel/ice/base/ice_type.h
+++ b/drivers/net/intel/ice/base/ice_type.h
@@ -1585,6 +1585,13 @@ struct ice_aq_get_set_rss_lut_params {
#define ICE_SR_PBA_BLOCK_PTR 0x16
#define ICE_SR_BOOT_CFG_PTR 0x132
#define ICE_SR_NVM_WOL_CFG 0x19
+/* WoL Feature Config - PFA TLV types, one per PF.
+ * TLV IDs: 0x000E for PF0, 0x010E for PF1, ..., 0x070E for PF7.
+ * Read via ice_get_pfa_module_tlv() + ice_read_sr_word().
+ */
+#define ICE_WOL_FEATURE_DISABLE 0x01
+#define ICE_WOL_FEATURE_ENABLE 0x02
+#define ICE_WOL_FEATURE(pf) (0x0E + (pf) * 0x100)
#define ICE_NVM_OROM_VER_OFF 0x02
#define ICE_SR_NVM_DEV_STARTER_VER 0x18
#define ICE_SR_ALTERNATE_SAN_MAC_ADDR_PTR 0x27
@@ -1633,6 +1640,8 @@ struct ice_aq_get_set_rss_lut_params {
#define ICE_SR_PQC_MANIFEST_BANK_SIZE 0x81
#define ICE_SR_POR_REGISTERS_AUTOLOAD_PTR 0x118
#define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134
+#define ICE_SR_HII_PORT_DISABLE_BY_FUNC_PTR 0x139
+#define ICE_SR_HII_PORT_DISABLE_RDE_WOL_OVRD BIT(8)
/* CSS Header words */
#define ICE_NVM_CSS_HDR_LEN_L 0x02
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 6/9] net/ice/base: add NVM write flags for eRoT minSREV update
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (4 preceding siblings ...)
2026-10-22 16:52 ` [PATCH 5/9] net/ice/base: add NVM definitions for Wake-on-LAN config Vladimir Medvedkin
@ 2026-10-22 16:52 ` Vladimir Medvedkin
2026-10-22 16:52 ` [PATCH 7/9] net/ice/base: add RDE WoL override capability bit Vladimir Medvedkin
` (4 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:52 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Stefan Wegrzyn
From: Stefan Wegrzyn <stefan.wegrzyn@intel.com>
Add NVM write command flags for the opt-in mode, and for updating the
minimum security revision of the external Root of Trust (eRoT).
Signed-off-by: Stefan Wegrzyn <stefan.wegrzyn@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_adminq_cmd.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/net/intel/ice/base/ice_adminq_cmd.h b/drivers/net/intel/ice/base/ice_adminq_cmd.h
index 7b318b0a1b..473501a6b2 100644
--- a/drivers/net/intel/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/intel/ice/base/ice_adminq_cmd.h
@@ -2019,6 +2019,11 @@ struct ice_aqc_nvm {
#define ICE_AQC_NVM_PRESERVE_ALL BIT(1)
#define ICE_AQC_NVM_FACTORY_DEFAULT (2 << ICE_AQC_NVM_PRESERVATION_S)
#define ICE_AQC_NVM_PRESERVE_SELECTED (3 << ICE_AQC_NVM_PRESERVATION_S)
+#define ICE_AQC_NVM_OPT_IN_MODE_S 4 /* Used by NVM Write only */
+#define ICE_AQC_NVM_OPT_IN_MODE_M (1 << ICE_AQC_NVM_OPT_IN_MODE_S)
+#define ICE_AQC_NVM_OPT_IN_MODE_ASYNC 0
+#define ICE_AQC_NVM_OPT_IN_MODE_SYNC 1
+#define ICE_AQC_NVM_EROT_MINSREV_UPDATE BIT(5) /* Used by NVM Write only */
#define ICE_AQC_NVM_ACTIV_SEL_NVM BIT(3) /* Write Activate/SR Dump only */
#define ICE_AQC_NVM_ACTIV_SEL_OROM BIT(4)
#define ICE_AQC_NVM_ACTIV_SEL_NETLIST BIT(5)
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 7/9] net/ice/base: add RDE WoL override capability bit
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (5 preceding siblings ...)
2026-10-22 16:52 ` [PATCH 6/9] net/ice/base: add NVM write flags for eRoT minSREV update Vladimir Medvedkin
@ 2026-10-22 16:52 ` Vladimir Medvedkin
2026-10-22 16:52 ` [PATCH 8/9] net/ice/base: add E835 10GBASE-T device ID Vladimir Medvedkin
` (3 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:52 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Przemyslaw Gierszynski
From: Przemyslaw Gierszynski <przemyslaw.gierszynski@intel.com>
Add the RDE WoL override bit of the WoL and proxy support capability,
and the corresponding capability field.
Signed-off-by: Przemyslaw Gierszynski <przemyslaw.gierszynski@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_type.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/intel/ice/base/ice_type.h b/drivers/net/intel/ice/base/ice_type.h
index 28d0387608..066141b656 100644
--- a/drivers/net/intel/ice/base/ice_type.h
+++ b/drivers/net/intel/ice/base/ice_type.h
@@ -723,9 +723,11 @@ struct ice_hw_common_caps {
#define ICE_WOL_SUPPORT_M BIT(0)
#define ICE_ACPI_PROG_MTHD_M BIT(1)
#define ICE_PROXY_SUPPORT_M BIT(2)
+#define ICE_RDE_WOL_OVERRIDE_M BIT(3)
u8 apm_wol_support;
u8 acpi_prog_mthd;
u8 proxy_support;
+ u8 rde_wol_override_support;
bool sec_rev_disabled;
bool update_disabled;
bool nvm_unified_update;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 8/9] net/ice/base: add E835 10GBASE-T device ID
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (6 preceding siblings ...)
2026-10-22 16:52 ` [PATCH 7/9] net/ice/base: add RDE WoL override capability bit Vladimir Medvedkin
@ 2026-10-22 16:52 ` Vladimir Medvedkin
2026-10-22 16:52 ` [PATCH 9/9] net/ice/base: update version info Vladimir Medvedkin
` (2 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:52 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov, Chinh Cao
From: Chinh Cao <chinh.t.cao@intel.com>
Following device ID is added:
- 0x1256: Intel(R) Ethernet Controller E830(E835)-CC/X557-AT 10GBASE-T
While at it, fix the alignment of the E830 device ID definitions.
Signed-off-by: Chinh Cao <chinh.t.cao@intel.com>
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/ice_common.c | 1 +
drivers/net/intel/ice/base/ice_devids.h | 14 ++++++++------
drivers/net/intel/ice/ice_ethdev.c | 1 +
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/net/intel/ice/base/ice_common.c b/drivers/net/intel/ice/base/ice_common.c
index 1a8f4e7a6e..c379c4921d 100644
--- a/drivers/net/intel/ice/base/ice_common.c
+++ b/drivers/net/intel/ice/base/ice_common.c
@@ -189,6 +189,7 @@ static int ice_set_mac_type(struct ice_hw *hw)
case ICE_DEV_ID_E830_L_QSFP:
case ICE_DEV_ID_E830C_SFP:
case ICE_DEV_ID_E830_L_SFP:
+ case ICE_DEV_ID_E835_10G_BASE_T:
case ICE_DEV_ID_E835CC_BACKPLANE:
case ICE_DEV_ID_E835CC_QSFP56:
case ICE_DEV_ID_E835CC_SFP:
diff --git a/drivers/net/intel/ice/base/ice_devids.h b/drivers/net/intel/ice/base/ice_devids.h
index 9a38ebf15b..05448c9bbf 100644
--- a/drivers/net/intel/ice/base/ice_devids.h
+++ b/drivers/net/intel/ice/base/ice_devids.h
@@ -24,17 +24,19 @@
/* Intel(R) Ethernet Controller E830-CC for SFP */
#define ICE_DEV_ID_E830_SFP 0x12D3
/* Intel(R) Ethernet Controller E830-C for backplane */
-#define ICE_DEV_ID_E830C_BACKPLANE 0x12D5
+#define ICE_DEV_ID_E830C_BACKPLANE 0x12D5
/* Intel(R) Ethernet Controller E830-L for backplane */
-#define ICE_DEV_ID_E830_L_BACKPLANE 0x12DC
+#define ICE_DEV_ID_E830_L_BACKPLANE 0x12DC
/* Intel(R) Ethernet Controller E830-C for QSFP */
-#define ICE_DEV_ID_E830C_QSFP 0x12D8
+#define ICE_DEV_ID_E830C_QSFP 0x12D8
/* Intel(R) Ethernet Controller E830-L for QSFP */
-#define ICE_DEV_ID_E830_L_QSFP 0x12DD
+#define ICE_DEV_ID_E830_L_QSFP 0x12DD
/* Intel(R) Ethernet Controller E830-C for SFP */
-#define ICE_DEV_ID_E830C_SFP 0x12DA
+#define ICE_DEV_ID_E830C_SFP 0x12DA
/* Intel(R) Ethernet Controller E830-L for SFP */
-#define ICE_DEV_ID_E830_L_SFP 0x12DE
+#define ICE_DEV_ID_E830_L_SFP 0x12DE
+/* Intel(R) Ethernet Controller E830(E835)-CC/X557-AT 10GBASE-T */
+#define ICE_DEV_ID_E835_10G_BASE_T 0x1256
/* Intel(R) Ethernet Controller E835-CC for backplane */
#define ICE_DEV_ID_E835CC_BACKPLANE 0x1248
/* Intel(R) Ethernet Controller E835-CC for QSFP */
diff --git a/drivers/net/intel/ice/ice_ethdev.c b/drivers/net/intel/ice/ice_ethdev.c
index d6dfc07ad5..b846555b97 100644
--- a/drivers/net/intel/ice/ice_ethdev.c
+++ b/drivers/net/intel/ice/ice_ethdev.c
@@ -265,6 +265,7 @@ static const struct rte_pci_id pci_id_ice_map[] = {
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_L_QSFP) },
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830C_SFP) },
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_L_SFP) },
+ { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E835_10G_BASE_T) },
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E835CC_BACKPLANE), },
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E835CC_QSFP56), },
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E835CC_SFP), },
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 9/9] net/ice/base: update version info
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (7 preceding siblings ...)
2026-10-22 16:52 ` [PATCH 8/9] net/ice/base: add E835 10GBASE-T device ID Vladimir Medvedkin
@ 2026-10-22 16:52 ` Vladimir Medvedkin
2026-10-23 10:17 ` [PATCH 0/9] Update ICE base driver Burakov, Anatoly
2026-10-23 10:39 ` Bruce Richardson
10 siblings, 0 replies; 14+ messages in thread
From: Vladimir Medvedkin @ 2026-10-22 16:52 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, anatoly.burakov
Update version to indicate when last driver snapshot was generated.
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
drivers/net/intel/ice/base/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/intel/ice/base/README b/drivers/net/intel/ice/base/README
index 6e17debcb2..97236b80ac 100644
--- a/drivers/net/intel/ice/base/README
+++ b/drivers/net/intel/ice/base/README
@@ -6,7 +6,7 @@ Intel® ICE driver
==================
This directory contains source code of ice base driver generated on
-2025-10-01 released by the team which develops
+2026-10-21 released by the team which develops
basic drivers for any ice NIC. The directory of base/ contains the
original source package.
This driver is valid for the product(s) listed below
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 0/9] Update ICE base driver
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (8 preceding siblings ...)
2026-10-22 16:52 ` [PATCH 9/9] net/ice/base: update version info Vladimir Medvedkin
@ 2026-10-23 10:17 ` Burakov, Anatoly
2026-10-23 13:56 ` Bruce Richardson
2026-10-23 10:39 ` Bruce Richardson
10 siblings, 1 reply; 14+ messages in thread
From: Burakov, Anatoly @ 2026-10-23 10:17 UTC (permalink / raw)
To: Vladimir Medvedkin, dev; +Cc: bruce.richardson
On 10/22/2026 6:51 PM, Vladimir Medvedkin wrote:
> Update the ICE base driver to the latest shared code snapshot:
>
> - Bounds check, integer overflow and type fixes
> - New capability and NVM definitions
> - New E835 10GBASE-T device ID
>
> Chinh Cao (2):
> net/ice/base: add NVM definitions for Wake-on-LAN config
> net/ice/base: add E835 10GBASE-T device ID
>
> Deepthi Kavalur (1):
> net/ice/base: fix loop counter type in recipe creation
>
> Janardhanan Arumugam (1):
> net/ice/base: fix out-of-bounds accesses in DDP and NVM code
>
> Krzysztof Galazka (1):
> net/ice/base: fix integer overflow in RL profile calculation
>
> Przemyslaw Gierszynski (1):
> net/ice/base: add RDE WoL override capability bit
>
> Stefan Wegrzyn (2):
> net/ice/base: add PQC certificate provisioning capability
> net/ice/base: add NVM write flags for eRoT minSREV update
>
> Vladimir Medvedkin (1):
> net/ice/base: update version info
>
> drivers/net/intel/ice/base/README | 2 +-
> drivers/net/intel/ice/base/ice_adminq_cmd.h | 6 ++++++
> drivers/net/intel/ice/base/ice_common.c | 6 ++++++
> drivers/net/intel/ice/base/ice_ddp.c | 19 ++++++++++++-------
> drivers/net/intel/ice/base/ice_devids.h | 14 ++++++++------
> drivers/net/intel/ice/base/ice_nvm.c | 4 ++--
> drivers/net/intel/ice/base/ice_sched.c | 18 ++++++++----------
> drivers/net/intel/ice/base/ice_switch.c | 2 +-
> drivers/net/intel/ice/base/ice_type.h | 16 +++++++++++++++-
> drivers/net/intel/ice/ice_ethdev.c | 1 +
> 10 files changed, 60 insertions(+), 28 deletions(-)
>
Series-acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
--
Thanks,
Anatoly
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/9] Update ICE base driver
2026-10-23 10:17 ` [PATCH 0/9] Update ICE base driver Burakov, Anatoly
@ 2026-10-23 13:56 ` Bruce Richardson
0 siblings, 0 replies; 14+ messages in thread
From: Bruce Richardson @ 2026-10-23 13:56 UTC (permalink / raw)
To: Burakov, Anatoly; +Cc: Vladimir Medvedkin, dev
On Fri, Oct 23, 2026 at 12:17:25PM +0200, Burakov, Anatoly wrote:
> On 10/22/2026 6:51 PM, Vladimir Medvedkin wrote:
> > Update the ICE base driver to the latest shared code snapshot:
> >
> > - Bounds check, integer overflow and type fixes
> > - New capability and NVM definitions
> > - New E835 10GBASE-T device ID
> >
> > Chinh Cao (2):
> > net/ice/base: add NVM definitions for Wake-on-LAN config
> > net/ice/base: add E835 10GBASE-T device ID
> >
> > Deepthi Kavalur (1):
> > net/ice/base: fix loop counter type in recipe creation
> >
> > Janardhanan Arumugam (1):
> > net/ice/base: fix out-of-bounds accesses in DDP and NVM code
> >
> > Krzysztof Galazka (1):
> > net/ice/base: fix integer overflow in RL profile calculation
> >
> > Przemyslaw Gierszynski (1):
> > net/ice/base: add RDE WoL override capability bit
> >
> > Stefan Wegrzyn (2):
> > net/ice/base: add PQC certificate provisioning capability
> > net/ice/base: add NVM write flags for eRoT minSREV update
> >
> > Vladimir Medvedkin (1):
> > net/ice/base: update version info
> >
> > drivers/net/intel/ice/base/README | 2 +-
> > drivers/net/intel/ice/base/ice_adminq_cmd.h | 6 ++++++
> > drivers/net/intel/ice/base/ice_common.c | 6 ++++++
> > drivers/net/intel/ice/base/ice_ddp.c | 19 ++++++++++++-------
> > drivers/net/intel/ice/base/ice_devids.h | 14 ++++++++------
> > drivers/net/intel/ice/base/ice_nvm.c | 4 ++--
> > drivers/net/intel/ice/base/ice_sched.c | 18 ++++++++----------
> > drivers/net/intel/ice/base/ice_switch.c | 2 +-
> > drivers/net/intel/ice/base/ice_type.h | 16 +++++++++++++++-
> > drivers/net/intel/ice/ice_ethdev.c | 1 +
> > 10 files changed, 60 insertions(+), 28 deletions(-)
> >
> Series-acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
>
Series applied to dpdk-next-net-intel.
Thanks,
/Bruce
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/9] Update ICE base driver
2026-10-22 16:51 [PATCH 0/9] Update ICE base driver Vladimir Medvedkin
` (9 preceding siblings ...)
2026-10-23 10:17 ` [PATCH 0/9] Update ICE base driver Burakov, Anatoly
@ 2026-10-23 10:39 ` Bruce Richardson
2026-10-23 13:00 ` Medvedkin, Vladimir
10 siblings, 1 reply; 14+ messages in thread
From: Bruce Richardson @ 2026-10-23 10:39 UTC (permalink / raw)
To: Vladimir Medvedkin; +Cc: dev, anatoly.burakov
On Thu, Oct 22, 2026 at 04:51:56PM +0000, Vladimir Medvedkin wrote:
> Update the ICE base driver to the latest shared code snapshot:
>
> - Bounds check, integer overflow and type fixes
> - New capability and NVM definitions
> - New E835 10GBASE-T device ID
>
> Chinh Cao (2):
> net/ice/base: add NVM definitions for Wake-on-LAN config
> net/ice/base: add E835 10GBASE-T device ID
>
> Deepthi Kavalur (1):
> net/ice/base: fix loop counter type in recipe creation
>
> Janardhanan Arumugam (1):
> net/ice/base: fix out-of-bounds accesses in DDP and NVM code
>
> Krzysztof Galazka (1):
> net/ice/base: fix integer overflow in RL profile calculation
>
> Przemyslaw Gierszynski (1):
> net/ice/base: add RDE WoL override capability bit
>
> Stefan Wegrzyn (2):
> net/ice/base: add PQC certificate provisioning capability
> net/ice/base: add NVM write flags for eRoT minSREV update
>
> Vladimir Medvedkin (1):
> net/ice/base: update version info
>
> drivers/net/intel/ice/base/README | 2 +-
> drivers/net/intel/ice/base/ice_adminq_cmd.h | 6 ++++++
> drivers/net/intel/ice/base/ice_common.c | 6 ++++++
> drivers/net/intel/ice/base/ice_ddp.c | 19 ++++++++++++-------
> drivers/net/intel/ice/base/ice_devids.h | 14 ++++++++------
> drivers/net/intel/ice/base/ice_nvm.c | 4 ++--
> drivers/net/intel/ice/base/ice_sched.c | 18 ++++++++----------
> drivers/net/intel/ice/base/ice_switch.c | 2 +-
> drivers/net/intel/ice/base/ice_type.h | 16 +++++++++++++++-
> drivers/net/intel/ice/ice_ethdev.c | 1 +
> 10 files changed, 60 insertions(+), 28 deletions(-)
>
CI shows a couple of failures when testing this patchset. I'm not sure if
they are false positives though (for example a flags autotest failure).
Can you please check and confirm?
/Bruce
^ permalink raw reply [flat|nested] 14+ messages in thread* RE: [PATCH 0/9] Update ICE base driver
2026-10-23 10:39 ` Bruce Richardson
@ 2026-10-23 13:00 ` Medvedkin, Vladimir
0 siblings, 0 replies; 14+ messages in thread
From: Medvedkin, Vladimir @ 2026-10-23 13:00 UTC (permalink / raw)
To: Richardson, Bruce; +Cc: dev@dpdk.org, Burakov, Anatoly
Hi Bruce,
It looks false positive to me.
-----Original Message-----
From: Richardson, Bruce <bruce.richardson@intel.com>
Sent: Friday, October 23, 2026 11:39 AM
To: Medvedkin, Vladimir <vladimir.medvedkin@intel.com>
Cc: dev@dpdk.org; Burakov, Anatoly <anatoly.burakov@intel.com>
Subject: Re: [PATCH 0/9] Update ICE base driver
On Thu, Oct 22, 2026 at 04:51:56PM +0000, Vladimir Medvedkin wrote:
> Update the ICE base driver to the latest shared code snapshot:
>
> - Bounds check, integer overflow and type fixes
> - New capability and NVM definitions
> - New E835 10GBASE-T device ID
>
> Chinh Cao (2):
> net/ice/base: add NVM definitions for Wake-on-LAN config
> net/ice/base: add E835 10GBASE-T device ID
>
> Deepthi Kavalur (1):
> net/ice/base: fix loop counter type in recipe creation
>
> Janardhanan Arumugam (1):
> net/ice/base: fix out-of-bounds accesses in DDP and NVM code
>
> Krzysztof Galazka (1):
> net/ice/base: fix integer overflow in RL profile calculation
>
> Przemyslaw Gierszynski (1):
> net/ice/base: add RDE WoL override capability bit
>
> Stefan Wegrzyn (2):
> net/ice/base: add PQC certificate provisioning capability
> net/ice/base: add NVM write flags for eRoT minSREV update
>
> Vladimir Medvedkin (1):
> net/ice/base: update version info
>
> drivers/net/intel/ice/base/README | 2 +-
> drivers/net/intel/ice/base/ice_adminq_cmd.h | 6 ++++++
> drivers/net/intel/ice/base/ice_common.c | 6 ++++++
> drivers/net/intel/ice/base/ice_ddp.c | 19 ++++++++++++-------
> drivers/net/intel/ice/base/ice_devids.h | 14 ++++++++------
> drivers/net/intel/ice/base/ice_nvm.c | 4 ++--
> drivers/net/intel/ice/base/ice_sched.c | 18 ++++++++----------
> drivers/net/intel/ice/base/ice_switch.c | 2 +-
> drivers/net/intel/ice/base/ice_type.h | 16 +++++++++++++++-
> drivers/net/intel/ice/ice_ethdev.c | 1 +
> 10 files changed, 60 insertions(+), 28 deletions(-)
>
CI shows a couple of failures when testing this patchset. I'm not sure if they are false positives though (for example a flags autotest failure).
Can you please check and confirm?
/Bruce
^ permalink raw reply [flat|nested] 14+ messages in thread