From: Bruce Richardson <bruce.richardson@intel.com>
To: "Morten Brørup" <mb@smartsharesystems.com>
Cc: <dev@dpdk.org>, Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,
"Jingjing Wu" <jingjing.wu@intel.com>,
Praveen Shetty <praveen.shetty@intel.com>,
"Hemant Agrawal" <hemant.agrawal@nxp.com>,
Sachin Saxena <sachin.saxena@oss.nxp.com>
Subject: Re: [PATCH v5] mempool: improve cache behaviour and performance
Date: Wed, 27 May 2026 09:48:08 +0100 [thread overview]
Message-ID: <ahavyHwTzyPPDkQ4@bricha3-mobl1.ger.corp.intel.com> (raw)
In-Reply-To: <98CBD80474FA8B44BF855DF32C47DC35F6589F@smartserver.smartshare.dk>
On Tue, May 26, 2026 at 07:45:24PM +0200, Morten Brørup wrote:
> > From: Morten Brørup [mailto:mb@smartsharesystems.com]
> > Sent: Tuesday, 26 May 2026 12.37
> >
> > > From: Bruce Richardson [mailto:bruce.richardson@intel.com]
> > > Sent: Tuesday, 26 May 2026 11.40
> > >
>
> [...]
>
> > > [In all this, I am making the assumption that burst size is well less
> > > than
> > > cache size. Also, similar logic would be applicable for the inverse
> > > scenario, e.g. flush to empty (and fill burst) and fill to 75%]
> >
> > I'm not so sure about this assumption.
> > With a cache size of 512 and a bursts of 64, the cache only holds 8
> > bursts.
> > 50% is 4 bursts, and 25% is only 2 bursts.
> >
> > Using a replenish/drain level in the middle requires 5 bursts in either
> > direction to pass the edge (and trigger replenish/flush).
> > Using a replenish/drain level 25% from the edge requires only 3 bursts
> > in the wrong direction to pass the edge (and trigger replenish/flush).
> > Much higher probability with random get/put.
> >
> > >
> > > Now, all said, I tend to agree that we want to leave space for a
> > decent
> > > size burst after a fill. That is why I think that filling to 75% is
> > > reasonable. After an alloc that triggers a fill, I don't want the
> > cache
> > > less than 50% full, but not completely full so there is room for a
> > free
> > > without a flush, and similarly for a free that triggers a flush, the
> > > cache
> > > should not be empty, but also should not be more than half full.
> > >
> > > One suggestion - we could always add a simple tunable that specifies
> > > the
> > > margin, or reserved entries for alloc and free. We can then guide in
> > > the
> > > docs that the value should be e.g. "zero for apps where alloc and
> > free
> > > take
> > > place on different cores. 20%-50% of cache is recommended where alloc
> > > and
> > > free take place on the same core"
> >
> > Yes, a simple tunable is a really good idea.
> >
> > At this point, I think we should optimize for use case #1, and go for
> > the 50% fill level.
> > Then we can add a tunable to optimize for use case #2 later. I will try
> > to come up with a draft for such a follow-up patch within the next few
> > days.
>
> Adding a tunable is not so simple...
> The choice of mempool cache algorithm (drain/replenish to 50% vs. drain/replenish completely) should be passed via the "flags" parameter in rte_mempool_create(), but rte_pktmbuf_pool_create() is missing the "flags" parameter.
> We can add it at the next ABI breaking release.
> WDYT?
>
I don't want this just a binary flag with two settings, I think it should
be an actual numeric value. Can we not use function versioning to add the
new parameter to all functions needing it, without worrying about ABI
breakage.
/Bruce
next prev parent reply other threads:[~2026-05-27 8:48 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 14:13 [PATCH] mempool: improve cache behaviour and performance Morten Brørup
2026-04-08 15:41 ` Stephen Hemminger
2026-04-09 10:25 ` [PATCH v2] " Morten Brørup
2026-04-09 11:05 ` [PATCH v3] " Morten Brørup
2026-04-15 13:40 ` Morten Brørup
2026-04-18 11:15 ` [PATCH v4] " Morten Brørup
2026-04-19 9:55 ` [PATCH v5] " Morten Brørup
2026-04-22 12:27 ` Morten Brørup
2026-04-27 15:21 ` Morten Brørup
2026-04-28 7:44 ` Andrew Rybchenko
2026-05-22 16:11 ` Bruce Richardson
2026-05-26 8:41 ` Morten Brørup
2026-05-26 9:39 ` Bruce Richardson
2026-05-26 10:37 ` Morten Brørup
2026-05-26 17:45 ` Morten Brørup
2026-05-27 8:48 ` Bruce Richardson [this message]
2026-05-27 9:22 ` Morten Brørup
2026-05-22 16:12 ` Bruce Richardson
2026-05-26 8:57 ` Morten Brørup
2026-05-26 14:00 ` [PATCH v6] " Morten Brørup
2026-05-26 16:00 ` Morten Brørup
2026-06-01 13:36 ` Thomas Monjalon
2026-06-01 13:51 ` Morten Brørup
2026-06-01 14:19 ` Thomas Monjalon
2026-06-01 14:27 ` Morten Brørup
2026-05-29 8:53 ` fengchengwen
2026-05-29 11:43 ` Morten Brørup
2026-05-27 11:36 ` [PATCH v6] net/idpf: update for new mempool cache algorithm Morten Brørup
2026-05-27 11:36 ` [PATCH v6] mempool/dpaa: " Morten Brørup
2026-05-27 11:36 ` [PATCH v6] mempool/dpaa2: " Morten Brørup
2026-06-01 16:40 ` [PATCH v7] mempool: improve cache behaviour and performance Morten Brørup
2026-06-03 15:44 ` Thomas Monjalon
2026-06-01 18:36 ` [PATCH v7] net/idpf: update for new mempool cache algorithm Morten Brørup
2026-06-01 18:36 ` [PATCH v7] mempool/dpaa: " Morten Brørup
2026-06-02 6:51 ` Morten Brørup
2026-06-01 18:36 ` [PATCH v7] mempool/dpaa2: " Morten Brørup
2026-06-02 6:53 ` Morten Brørup
2026-06-02 6:45 ` [PATCH v7] net/idpf: " Morten Brørup
2026-06-10 11:21 ` Morten Brørup
2026-06-10 11:31 ` Bruce Richardson
2026-06-10 12:17 ` Thomas Monjalon
2026-06-10 12:34 ` Bruce Richardson
2026-06-10 11:31 ` Morten Brørup
2026-06-04 11:48 ` [PATCH v8] mempool: improve cache behaviour and performance Morten Brørup
2026-06-04 13:57 ` Morten Brørup
2026-06-10 11:06 ` Thomas Monjalon
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