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* Re: [RFC] igb_uio: deprecate iomem and ioport mapping
From: Tan, Jianfeng @ 2016-12-05  7:04 UTC (permalink / raw)
  To: Stephen Hemminger; +Cc: dev@dpdk.org, david.marchand@6wind.com, Yigit, Ferruh
In-Reply-To: <20161202154706.3676195c@xeon-e3>

Hi Stephen,

> -----Original Message-----
> From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> Sent: Saturday, December 3, 2016 7:47 AM
> To: Tan, Jianfeng
> Cc: dev@dpdk.org; david.marchand@6wind.com; Yigit, Ferruh
> Subject: Re: [RFC] igb_uio: deprecate iomem and ioport mapping
> 
> On Thu,  1 Sep 2016 02:16:37 +0000
> Jianfeng Tan <jianfeng.tan@intel.com> wrote:
> 
> > Previously in igb_uio, iomem is mapped, and both ioport and io mem
> > are recorded into uio framework, which is duplicated and makes the
> > code too complex.
> >
> > For iomem, DPDK user space code never opens or reads files under
> > /sys/pci/bus/devices/xxxx:xx:xx.x/uio/uioY/maps/. Instead,
> > /sys/pci/bus/devices/xxxx:xx:xx.x/resourceY are used to map device
> > memory.
> >
> > For ioport, non-x86 platforms cannot read from files under
> > /sys/pci/bus/devices/xxxx:xx:xx.x/uio/uioY/portio/ directly, because
> > non-x86 platforms need to map port region for access in user space,
> > see non-x86 version pci_uio_ioport_map(). x86 platforms can use the
> > the same way as uio_pci_generic.
> >
> > This patch deprecates iomem and ioport mapping in igb_uio kernel
> > module, and adjusts the iomem implementation in both igb_uio and
> > uio_pci_generic:
> >   - for x86 platform, get ports info from /proc/ioports;
> >   - for non-x86 platform, map and get ports info by pci_uio_ioport_map().
> >
> > Note: this will affect those applications who are using files under
> > /sys/pci/bus/devices/xxxx:xx:xx.x/uio/uioY/maps/ and
> > /sys/pci/bus/devices/xxxx:xx:xx.x/uio/uioY/portio/.
> >
> > Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
> 
> What about people using older kernels with the new DPDK EAL and
> vice versa? 

There are two things planned in this proposal:
(1) deprecating iomem mapping in igb_uio, which is not used in DPDK code anyway.
(2) deprecating ioport mapping in igb_uio, which has effect on ioport mapping for x86 platforms. The way we use to make up is to leverage how uio_pci_generic does, aka, based on /proc/ioports, and this proc file is available at very early stage of Linux (Even before 2.6.32).

So I don't see a problem there when running the new DPDK EAL on older kernels.

On the other way, running old DPDK EAL on new kernels, and using new igb_uio, right? Oops, this should have problem. Thank you for pointing out this. So how about just removing iomem? And my motivation to clean igb_uio like this way is to fix a problem here: http://dpdk.org/dev/patchwork/patch/17495/.

> It makes sense to make igb_uio generic for non DPDK
> usage, so it should probably follow the other UIO drivers.
> 

Then the problem would be backward compatibility. I might need to reconsider this.

Thank you for reviewing!

Thanks,
Jianfeng

^ permalink raw reply

* Re: [PATCH 3/3] maintainers: add stable mailing list
From: Yuanhan Liu @ 2016-12-05  4:36 UTC (permalink / raw)
  To: Mcnamara, John; +Cc: dev@dpdk.org, Thomas Monjalon
In-Reply-To: <B27915DBBA3421428155699D51E4CFE20266E3DA@IRSMSX103.ger.corp.intel.com>

On Sun, Dec 04, 2016 at 04:36:36PM +0000, Mcnamara, John wrote:
> 
> 
> > -----Original Message-----
> > From: Yuanhan Liu [mailto:yuanhan.liu@linux.intel.com]
> > Sent: Thursday, December 1, 2016 7:07 AM
> > To: dev@dpdk.org
> > Cc: Thomas Monjalon <thomas.monjalon@6wind.com>; Mcnamara, John
> > <john.mcnamara@intel.com>; Yuanhan Liu <yuanhan.liu@linux.intel.com>
> > Subject: [PATCH 3/3] maintainers: add stable mailing list
> > 
> > Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
> > ---
> >  MAINTAINERS | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 3df1754..076e86c 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -35,6 +35,7 @@ F: scripts/test-build.sh  Stable Branches
> >  ---------------
> >  T: git://dpdk.org/dpdk-stable
> > +M: stable@dpdk.org
> 
> I acked this previously but looking at it again I'm not 100% sure that stable@dpdk.org
> should be the maintainer.
> 
> The glossary at the top of the file says:
> 
>     Descriptions of section entries:
>         M: Maintainer's Full Name <address@domain>
> 
> So maybe the entry should have your name and also stable@dpdk.org on a separate line.
> This would be clearer way of showing the stable release tree maintainer.

I actually just meant to add the stable mailing list addr (as the
subject says). Seems there are no such field for it?

	--yliu

^ permalink raw reply

* [PATCH v3] mempool: remove a redundant word "for" in comment
From: Wei Zhao @ 2016-12-05  3:40 UTC (permalink / raw)
  To: dev; +Cc: olivier.matz, Wei Zhao

There is a redundant repetition word "for" in commnet line of the
file rte_mempool.h after the definition of RTE_MEMPOOL_OPS_NAMESIZE.
The word "for"appear twice in line 359 and 360. One of them is
redundant, so delete it.

Fixes: 449c49b93a6b ("mempool: support handler operations")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
---

v3:
--checkpatch warnings fixed

v2:
--checkpatch errors fixed

---
 lib/librte_mempool/rte_mempool.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
index 440f3b1..911102b 100644
--- a/lib/librte_mempool/rte_mempool.h
+++ b/lib/librte_mempool/rte_mempool.h
@@ -357,7 +357,7 @@ void rte_mempool_check_cookies(const struct rte_mempool *mp,
  * Prototype for implementation specific data provisioning function.
  *
  * The function should provide the implementation specific memory for
- * for use by the other mempool ops functions in a given mempool ops struct.
+ * use by the other mempool ops functions in a given mempool ops struct.
  * E.g. the default ops provides an instance of the rte_ring for this purpose.
  * it will most likely point to a different type of data structure, and
  * will be transparent to the application programmer.
-- 
2.5.5

^ permalink raw reply related

* [PATCH v3] mempool: remove a redundant socket id assignment
From: Wei Zhao @ 2016-12-05  3:39 UTC (permalink / raw)
  To: dev; +Cc: olivier.matz, Wei Zhao

There is a redundant repetition mempool socket_id assignment in the
file rte_mempool.c in function rte_mempool_create_empty. The
statement "mp->socket_id = socket_id;"appear twice in line 821
and 824. One of them is redundant, so delete it.

Fixes: 85226f9c526b ("mempool: introduce a function to create an empty pool")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
---

v3:
--checkpatch warning fixed

v2:
--checkpatch error fixed

---
 lib/librte_mempool/rte_mempool.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index aa513b9..1c2aed8 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -818,7 +818,6 @@ rte_mempool_create_empty(const char *name, unsigned n, unsigned elt_size,
 		goto exit_unlock;
 	}
 	mp->mz = mz;
-	mp->socket_id = socket_id;
 	mp->size = n;
 	mp->flags = flags;
 	mp->socket_id = socket_id;
-- 
2.5.5

^ permalink raw reply related

* [PATCH v3] mempool: remove a redundant socket id assignment
From: Wei Zhao @ 2016-12-05  3:36 UTC (permalink / raw)
  To: dev; +Cc: olivier.matz, zhao wei

From: zhao wei <wei.zhao1@intel.com>

There is a redundant repetition mempool socket_id assignment in the
file rte_mempool.c in function rte_mempool_create_empty. The
statement "mp->socket_id = socket_id;"appear twice in line 821
and 824. One of them is redundant, so delete it.

Fixes: 85226f9c526b ("mempool: introduce a function to create an empty pool")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
---
 lib/librte_mempool/rte_mempool.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index aa513b9..1c2aed8 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -818,7 +818,6 @@ rte_mempool_create_empty(const char *name, unsigned n, unsigned elt_size,
 		goto exit_unlock;
 	}
 	mp->mz = mz;
-	mp->socket_id = socket_id;
 	mp->size = n;
 	mp->flags = flags;
 	mp->socket_id = socket_id;
-- 
2.5.5

^ permalink raw reply related

* [PATCH v3] mempool: remove a redundant socket id assignment
From: Wei Zhao @ 2016-12-05  3:08 UTC (permalink / raw)
  To: dev; +Cc: olivier.matz, zhao wei

From: zhao wei <wei.zhao1@intel.com>

There is a redundant repetition mempool socket_id assignment in the
file rte_mempool.c in function rte_mempool_create_empty. The
statement "mp->socket_id = socket_id;"appear twice in line 821
and 824. One of them is redundant, so delete it.

Fixes: 85226f9c526b ("mempool: introduce a function to create an empty pool")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
---
 lib/librte_mempool/rte_mempool.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index aa513b9..1c2aed8 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -818,7 +818,6 @@ rte_mempool_create_empty(const char *name, unsigned n, unsigned elt_size,
 		goto exit_unlock;
 	}
 	mp->mz = mz;
-	mp->socket_id = socket_id;
 	mp->size = n;
 	mp->flags = flags;
 	mp->socket_id = socket_id;
-- 
2.5.5

^ permalink raw reply related

* Re: [PATCH v2] mempool: remove a redundant word "for" in comment
From: Zhao1, Wei @ 2016-12-05  3:06 UTC (permalink / raw)
  To: Olivier Matz; +Cc: dev@dpdk.org
In-Reply-To: <20161128142518.6ed7b6e0@platinum>

Hi, olivier

> -----Original Message-----
> From: Olivier Matz [mailto:olivier.matz@6wind.com]
> Sent: Monday, November 28, 2016 9:25 PM
> To: Zhao1, Wei <wei.zhao1@intel.com>
> Cc: dev@dpdk.org
> Subject: Re: [PATCH v2] mempool: remove a redundant word "for" in
> comment
> 
> Hi Wei,
> 
> On Mon, 28 Nov 2016 09:42:12 +0100
> Olivier Matz <olivier.matz@6wind.com> wrote:
> > Hi Wenzhuo,
> 
> First, sorry for the mistake in your name my previous mail.
> 
> Please find below some other comments about the patch (on the form).
> 
> > On Sun, 27 Nov 2016 10:43:47 +0800
> > Wei Zhao <wei.zhao1@intel.com> wrote:
> >
> > > From: zhao wei <wei.zhao1@intel.com>
> > >
> > > There is a redundant repetition word "for" in commnet line of the
> 
> commnet -> comment
> 
> > > file rte_mempool.h after the definition of
> RTE_MEMPOOL_OPS_NAMESIZE.
> > > The word "for"appear twice in line 359 and 360.One of them is
> 
> Missing space after '"for"' and after '360.'
> 
> 
> > > redundant, so delete it.
> > >
> > > Fixes: 449c49b93a6b (" mempool: support handler operations")
> 
> We should have an empty line after the 'Fixes:' tag. The check-git-log.sh can
> help you to notice these errors.
> 
> Also, it is important that no spaces are added in the title of the commit. You
> can get the exact line with:
>   git log -1 --abbrev=12 --format='Fixes: %h (\"%s\")' <commitid>
> 
> > > Signed-off-by: zhao wei <wei.zhao1@intel.com>
> 
> The name in your .gitconfig should be the same than in you mail:
> Wei Zhao <wei.zhao1@intel.com>
> 
> > > Acked-by: John McNamara <john.mcnamara@intel.com>
> >
> > Acked-by: Olivier Matz <olivier.matz@6wind.com>
> >
> 
> Please, could you also check the same comments in the other patch?
> 
> Last thing: when doing another version of the patch, you should add a
> changelog that describes what was modified. They take place after the 3
> dashes.
> 
> Thank you for contributing.
> 
> Regards,
> Olivier

Thank you for your nicely guide to me,  I have found that I miss using check patch tool  last time.

^ permalink raw reply

* Re: [PATCH 30/31] net/i40e: support Linux VF to configure IRQ link list
From: Lu, Wenzhuo @ 2016-12-05  3:02 UTC (permalink / raw)
  To: Yigit, Ferruh, dev@dpdk.org; +Cc: Chen, Jing D, Iremonger, Bernard
In-Reply-To: <7a630948-71a5-c955-c373-76a7c12e288e@intel.com>

Hi Ferruh,
Thanks for the comments!

Hi Ferruh, Jing, Bernard,
As they're not functionality issues. Most of them are compile and typo issues. I'll fix them and send a V2.


Best regards
Wenzhuo Lu 

^ permalink raw reply

* Re: ixgbevf: support multicast packets from PF to VF
From: Lu, Wenzhuo @ 2016-12-05  2:01 UTC (permalink / raw)
  To: Dey, Souvik, dev@dpdk.org
In-Reply-To: <BN3PR03MB1494F031C81DCB6A612EB755DA8E0@BN3PR03MB1494.namprd03.prod.outlook.com>

Hi Souvik,
To my opinion, rte_eth_dev_set_mc_addr_list has nothing to do with rte_eth_allmulticast_enable. rte_eth_allmulticast_enable is enough for the multicast packets.
I'm curious about the 1, what MAC addresses are set by rte_eth_dev_set_mc_addr_list? 2, What multicast packets are sent?
Thanks.



Best regards
Wenzhuo Lu

From: Dey, Souvik [mailto:sodey@sonusnet.com]
Sent: Saturday, December 3, 2016 1:28 AM
To: dev@dpdk.org; Lu, Wenzhuo
Subject: RE: ixgbevf: support multicast packets from PF to VF

Adding wenzhuo.lu@intel.com<mailto:wenzhuo.lu@intel.com>

From: Dey, Souvik
Sent: Friday, December 2, 2016 12:27 PM
To: 'dev@dpdk.org' <dev@dpdk.org>
Subject: ixgbevf: support multicast packets from PF to VF

Hi All,
                I am trying to support multicast packet over SRIOV using kernel PF + DPDK VF(ixgbevf) drivers for ipv6. I am currently using 2.1 DPDK and found that there was a patch in 16.04 for "ixgbe: support multicast promiscuous mode on VF". So I have backported the patch to the 2.1 DPDK but still multicast packets were not coming up to the DPDK app. Then I tried to enable the rte_eth_dev_set_mc_addr_list and with the the packets were coming up properly. Now I have some doubts :


1.      Do we have to use both rte_eth_dev_set_mc_addr_list and rte_eth_allmulticast_enable to get the multicast packets.

2.      How do we get the mc_addr_list dynamically as I don't see we are using the kni_net_set_rx_mode in rte_kni. Without this the DPDK app will not have any idea to update the mc_addr_list in the PF.

3.      Is there any other patches which I should be using to get this functionality working.

I am using : DPDK -2.1
Host kernel - 4.4 ( ubuntu)
Guest kernel - 3.2 (Debian)
Drivers - ixgbe ( for both pf and vf).


Thanks in advance for the help and support.

--
Regards,
Souvik

^ permalink raw reply

* proposal deadline
From: Thomas Monjalon @ 2016-12-04 22:44 UTC (permalink / raw)
  To: dev

[-- Attachment #1: Type: text/plain, Size: 915 bytes --]

Hi all,

There were a lot of patches v1 submitted these last days, just before the
proposal deadline (December 4).
It's good to have a lot of features for 17.02, but it means we are going
to have a hard time to review, rework and integrate them.
I think we should make an effort to send our v1 patches (or RFC) much before
the deadline.
Or we can make the proposal window shorter, but it would be less flexible.
Another way to manage this huge flow: start reviewing the oldest ones.
And if there is not enough time for proper review of the latest series,
some will be postponed.

The statistics diagram of patches proposals (v1) per week are attached.
You can also find it at this URL:
	https://s12.postimg.org/g9uluz9u5/patchesv1.png
In case the diagram of v1 patches needs some comments, these were the
deadlines for feature proposal:
	2015 October 2
	2016 January 31
	2016 May 9
	2016 August 28
	2016 December 4

[-- Attachment #2: patchesv1.png --]
[-- Type: image/png, Size: 83330 bytes --]

^ permalink raw reply

* [PATCH] config: remove insecure warnings
From: Thomas Monjalon @ 2016-12-04 22:17 UTC (permalink / raw)
  To: dev

There was an option CONFIG_RTE_INSECURE_FUNCTION_WARNING (disabled by
default), which prevents from using some libc functions:
sprintf, snprintf, vsnprintf, strcpy, strncpy, strcat, strncat, sscanf,
strtok, strsep and strlen.

It's all about using them at the right place with the right precautions.
However, it is neither really possible nor a good advice to disable them.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
---
 config/common_base                           |  5 --
 doc/api/doxy-api-index.md                    |  1 -
 lib/librte_eal/common/Makefile               |  4 --
 lib/librte_eal/common/include/rte_warnings.h | 84 ----------------------------
 mk/target/generic/rte.vars.mk                |  6 --
 5 files changed, 100 deletions(-)
 delete mode 100644 lib/librte_eal/common/include/rte_warnings.h

diff --git a/config/common_base b/config/common_base
index 652a839..edb6a54 100644
--- a/config/common_base
+++ b/config/common_base
@@ -574,11 +574,6 @@ CONFIG_RTE_LIBRTE_PMD_VHOST=n
 CONFIG_RTE_LIBRTE_XEN_DOM0=n
 
 #
-# Enable warning directives
-#
-CONFIG_RTE_INSECURE_FUNCTION_WARNING=n
-
-#
 # Compile the test application
 #
 CONFIG_RTE_APP_TEST=y
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 6675f96..f3b3727 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -139,7 +139,6 @@ There are many libraries, so their headers may be grouped by topics:
   [hexdump]            (@ref rte_hexdump.h),
   [debug]              (@ref rte_debug.h),
   [log]                (@ref rte_log.h),
-  [warnings]           (@ref rte_warnings.h),
   [errno]              (@ref rte_errno.h)
 
 - **misc**:
diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index dfd64aa..a92c984 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -42,10 +42,6 @@ INC += rte_hexdump.h rte_devargs.h rte_dev.h rte_vdev.h
 INC += rte_pci_dev_feature_defs.h rte_pci_dev_features.h
 INC += rte_malloc.h rte_keepalive.h rte_time.h
 
-ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)
-INC += rte_warnings.h
-endif
-
 GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
 GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h
 # defined in mk/arch/$(RTE_ARCH)/rte.vars.mk
diff --git a/lib/librte_eal/common/include/rte_warnings.h b/lib/librte_eal/common/include/rte_warnings.h
deleted file mode 100644
index 54b545c..0000000
--- a/lib/librte_eal/common/include/rte_warnings.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Intel Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * Definitions of warnings for use of various insecure functions
- */
-
-#ifndef _RTE_WARNINGS_H_
-#define _RTE_WARNINGS_H_
-
-#ifdef RTE_INSECURE_FUNCTION_WARNING
-
-/* we need to include all used standard header files so that they appear
- * _before_ we poison the function names.
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#include <errno.h>
-#ifdef RTE_EXEC_ENV_LINUXAPP
-#include <dirent.h>
-#endif
-
-/* the following function are deemed not fully secure for use e.g. they
- * do not always null-terminate arguments */
-#pragma GCC poison sprintf strtok snprintf vsnprintf
-#pragma GCC poison strlen strcpy strcat
-#pragma GCC poison sscanf
-
-/* other unsafe functions may be implemented as macros so just undef them */
-#ifdef strsep
-#undef strsep
-#else
-#pragma GCC poison strsep
-#endif
-
-#ifdef strncpy
-#undef strncpy
-#else
-#pragma GCC poison strncpy
-#endif
-
-#ifdef strncat
-#undef strncat
-#else
-#pragma GCC poison strncat
-#endif
-
-#endif
-
-#endif /* RTE_WARNINGS_H */
diff --git a/mk/target/generic/rte.vars.mk b/mk/target/generic/rte.vars.mk
index b31e426..5d22a6a 100644
--- a/mk/target/generic/rte.vars.mk
+++ b/mk/target/generic/rte.vars.mk
@@ -125,9 +125,6 @@ LDFLAGS += -L$(RTE_OUTPUT)/lib
 ifeq ($(BUILDING_RTE_SDK),1)
 # building sdk
 CFLAGS += -include $(RTE_OUTPUT)/include/rte_config.h
-ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)
-CFLAGS += -include rte_warnings.h
-endif
 else
 # if we are building an external application, include SDK's lib and
 # includes too
@@ -136,9 +133,6 @@ ifneq ($(wildcard $(RTE_OUTPUT)/include/rte_config.h),)
 CFLAGS += -include $(RTE_OUTPUT)/include/rte_config.h
 endif
 CFLAGS += -include $(RTE_SDK_BIN)/include/rte_config.h
-ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)
-CFLAGS += -include rte_warnings.h
-endif
 LDFLAGS += -L$(RTE_SDK_BIN)/lib
 endif
 
-- 
2.7.0

^ permalink raw reply related

* [PATCH v1] doc: fix relative path of Nic table input file
From: John McNamara @ 2016-12-04 16:47 UTC (permalink / raw)
  To: dev; +Cc: stable, John McNamara

Fix relative path between sphinx conf.py file and Nic table file
to allow automatic build on ReadTheDocs.

Fixes: 9db3f52126fb ("doc: generate NIC overview table from ini files")

Signed-off-by: John McNamara <john.mcnamara@intel.com>
---
 doc/guides/conf.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/doc/guides/conf.py b/doc/guides/conf.py
index 149bcdb..29e8efb 100644
--- a/doc/guides/conf.py
+++ b/doc/guides/conf.py
@@ -312,7 +312,8 @@ def print_table_divider(outfile, num_cols):
 
 
 def setup(app):
-    generate_nic_overview_table('doc/guides/nics/overview_table.txt')
+    table_file = dirname(__file__) + '/nics/overview_table.txt'
+    generate_nic_overview_table(table_file)
 
     if LooseVersion(sphinx_version) < LooseVersion('1.3.1'):
         print('Upgrade sphinx to version >= 1.3.1 for '
-- 
2.7.4

^ permalink raw reply related

* Re: [PATCH 3/3] maintainers: add stable mailing list
From: Mcnamara, John @ 2016-12-04 16:36 UTC (permalink / raw)
  To: Yuanhan Liu, dev@dpdk.org; +Cc: Thomas Monjalon
In-Reply-To: <1480575999-14453-4-git-send-email-yuanhan.liu@linux.intel.com>



> -----Original Message-----
> From: Yuanhan Liu [mailto:yuanhan.liu@linux.intel.com]
> Sent: Thursday, December 1, 2016 7:07 AM
> To: dev@dpdk.org
> Cc: Thomas Monjalon <thomas.monjalon@6wind.com>; Mcnamara, John
> <john.mcnamara@intel.com>; Yuanhan Liu <yuanhan.liu@linux.intel.com>
> Subject: [PATCH 3/3] maintainers: add stable mailing list
> 
> Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3df1754..076e86c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -35,6 +35,7 @@ F: scripts/test-build.sh  Stable Branches
>  ---------------
>  T: git://dpdk.org/dpdk-stable
> +M: stable@dpdk.org

I acked this previously but looking at it again I'm not 100% sure that stable@dpdk.org
should be the maintainer.

The glossary at the top of the file says:

    Descriptions of section entries:
        M: Maintainer's Full Name <address@domain>

So maybe the entry should have your name and also stable@dpdk.org on a separate line.
This would be clearer way of showing the stable release tree maintainer.

John 

^ permalink raw reply

* [PATCH v1] net/i40e: set no drop for traffic class
From: Rory Sexton @ 2016-12-04 13:54 UTC (permalink / raw)
  To: jingjing.wu; +Cc: dev, nemanja.marjanovic, John McNamara, Rory Sexton

From: John McNamara <john.mcnamara@intel.com>

The default traffic class in i40e is set to drop versus on ixgbe
it isset to no drop. This means when packets build up in the RX
SRAM on the NIC, they are dropped, and they do this when the SW
descriptor rings fill up.

This patch changes this behaviour and our testing shows there
are no drops as a result.

Signed-off-by: Rory Sexton <rory.sexton@intel.com>
Signed-off-by: Nemanja Marjanovic <nemanja.marjanovic@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c |  1 +
 drivers/net/i40e/i40e_rxtx.c   | 12 ++++++++++++
 drivers/net/i40e/i40e_rxtx.h   |  1 +
 lib/librte_ether/rte_ethdev.h  | 24 ++++++++++++++++++++++++
 4 files changed, 38 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 67778ba..9702acb 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -553,6 +553,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
 	.get_eeprom                   = i40e_get_eeprom,
 	.mac_addr_set                 = i40e_set_default_mac_addr,
 	.mtu_set                      = i40e_dev_mtu_set,
+	.set_no_drop		      = i40e_set_no_drop,
 };
 
 /* store statistics names and its offset in stats structure */
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 7ae7d9f..02aeff4 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -783,6 +783,18 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 	return nb_rx;
 }
 
+uint32_t
+i40e_set_no_drop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+	struct i40e_rx_queue *rxq = dev->data->rx_queues[rx_queue_id];
+	struct i40e_hw *hw = I40E_VSI_TO_HW(rxq->vsi);
+
+	/* Set No Drop Traffic Class. */
+	I40E_WRITE_REG(hw, 0x1c0980, 0xff);
+
+	return 1;
+}
+
 uint16_t
 i40e_recv_scattered_pkts(void *rx_queue,
 			 struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h
index ecdb13c..47720e5 100644
--- a/drivers/net/i40e/i40e_rxtx.h
+++ b/drivers/net/i40e/i40e_rxtx.h
@@ -196,6 +196,7 @@ union i40e_tx_offload {
 	};
 };
 
+uint32_t i40e_set_no_drop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 9678179..a862101 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1113,6 +1113,10 @@ typedef int (*eth_queue_start_t)(struct rte_eth_dev *dev,
 				    uint16_t queue_id);
 /**< @internal Start rx and tx of a queue of an Ethernet device. */
 
+typedef uint32_t (*set_no_drop)(struct rte_eth_dev *dev,
+					uint16_t queue_id);
+/**< @internal Ethernet device configuration. */
+
 typedef int (*eth_queue_stop_t)(struct rte_eth_dev *dev,
 				    uint16_t queue_id);
 /**< @internal Stop rx and tx of a queue of an Ethernet device. */
@@ -1547,6 +1551,8 @@ struct eth_dev_ops {
 	eth_l2_tunnel_eth_type_conf_t l2_tunnel_eth_type_conf;
 	/** Enable/disable l2 tunnel offload functions */
 	eth_l2_tunnel_offload_set_t l2_tunnel_offload_set;
+	/** Read NIC SRAM .*/
+	set_no_drop set_no_drop;
 };
 
 /**
@@ -2730,6 +2736,24 @@ rte_eth_rx_descriptor_done(uint8_t port_id, uint16_t queue_id, uint16_t offset)
 }
 
 /**
+ * Sets port to no drop.
+ *
+ * @param port_id
+ *  The port identifier of the Ethernet device.
+ *
+ * @return
+ *  Nic occupancy in kilobytes.
+ */
+static inline uint32_t
+set_no_drop_tc(uint8_t port_id)
+{
+	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
+	uint32_t limit = (*dev->dev_ops->set_no_drop)(dev, 0);
+
+	return limit;
+}
+
+/**
  * Send a burst of output packets on a transmit queue of an Ethernet device.
  *
  * The rte_eth_tx_burst() function is invoked to transmit output packets
-- 
2.7.4

--------------------------------------------------------------
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Registered in Ireland
Registered Office: Collinstown Industrial Park, Leixlip, County Kildare
Registered Number: 308263


This e-mail and any attachments may contain confidential material for the sole
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^ permalink raw reply related

* [PATCH 32/32] net/dpaa2: enable stashing for LS2088A devices
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 1a25f07..dd8e8fb 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -229,6 +229,17 @@
 	options = options | DPNI_QUEUE_OPT_USER_CTX;
 	cfg.user_context = (uint64_t)(dpaa2_q);
 
+	/*if ls2088 or rev2 device, enable the stashing */
+	if ((qbman_get_version() & 0xFFFF0000) > QMAN_REV_4000) {
+		options |= DPNI_QUEUE_OPT_FLC;
+		cfg.flc.stash_control = true;
+		cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
+		/* 00 00 00 - last 6 bit represent annotation, context stashing,
+		*  data stashing setting 01 01 00 (0x14) to enable
+		*  1 line annotation, 1 line context
+		*/
+		cfg.flc.value |= 0x14;
+	}
 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 			     dpaa2_q->tc_index, flow_id, options, &cfg);
 	if (ret) {
-- 
1.9.1

^ permalink raw reply related

* [PATCH 31/32] net/dpaa2: add support for non hw buffer pool packet transmit
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_rxtx.c | 73 ++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 71 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 2fe902f..78342a1 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -194,6 +194,54 @@ static void __attribute__ ((noinline)) __attribute__((hot))
 		DPAA2_GET_FD_BPID(fd), DPAA2_GET_FD_LEN(fd));
 }
 
+
+static inline int __attribute__((hot))
+eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
+		    struct qbman_fd *fd, uint16_t bpid)
+{
+	struct rte_mbuf *m;
+	void *mb = NULL;
+
+	if (hw_mbuf_alloc_bulk(bpid_info[bpid].bp_list->buf_pool.mp, &mb, 1)) {
+		PMD_TX_LOG(WARNING, "Unable to allocated DPAA2 buffer");
+		rte_pktmbuf_free(mbuf);
+		return -1;
+	}
+	m = (struct rte_mbuf *)mb;
+	memcpy((char *)m->buf_addr + mbuf->data_off,
+	       (void *)((char *)mbuf->buf_addr + mbuf->data_off),
+		mbuf->pkt_len);
+
+	/* Copy required fields */
+	m->data_off = mbuf->data_off;
+	m->ol_flags = mbuf->ol_flags;
+	m->packet_type = mbuf->packet_type;
+	m->tx_offload = mbuf->tx_offload;
+
+	/*Resetting the buffer pool id and offset field*/
+	fd->simple.bpid_offset = 0;
+
+	DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(m));
+	DPAA2_SET_FD_LEN(fd, mbuf->data_len);
+	DPAA2_SET_FD_BPID(fd, bpid);
+	DPAA2_SET_FD_OFFSET(fd, mbuf->data_off);
+	DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
+
+	PMD_TX_LOG(DEBUG, " mbuf %p BMAN buf addr %p",
+		   (void *)mbuf, mbuf->buf_addr);
+
+	PMD_TX_LOG(DEBUG, " fdaddr =%lx bpid =%d meta =%d off =%d, len =%d",
+		   DPAA2_GET_FD_ADDR(fd),
+		DPAA2_GET_FD_BPID(fd),
+		bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
+		DPAA2_GET_FD_OFFSET(fd),
+		DPAA2_GET_FD_LEN(fd));
+	/*free the original packet */
+	rte_pktmbuf_free(mbuf);
+
+	return 0;
+}
+
 uint16_t
 dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 {
@@ -332,8 +380,28 @@ static void __attribute__ ((noinline)) __attribute__((hot))
 			DPAA2_RESET_FD_CTRL((&fd_arr[loop]));
 			DPAA2_SET_FD_FLC((&fd_arr[loop]), NULL);
 			mp = (*bufs)->pool;
-			bpid = mempool_to_bpid(mp);
-			eth_mbuf_to_fd(*bufs, &fd_arr[loop], bpid);
+			/* Not a hw_pkt pool allocated frame */
+			if (mp && !(mp->flags & MEMPOOL_F_HW_PKT_POOL)) {
+				PMD_TX_LOG(ERR, "non hw offload bufffer ");
+				/* alloc should be from the default buffer pool
+				attached to this interface */
+				if (priv->bp_list) {
+					bpid = priv->bp_list->buf_pool.bpid;
+				} else {
+					PMD_TX_LOG(ERR, "errr: why no bpool"
+						   " attached");
+					num_tx = 0;
+					goto skip_tx;
+				}
+				if (eth_copy_mbuf_to_fd(*bufs,
+							&fd_arr[loop], bpid)) {
+					bufs++;
+					continue;
+				}
+			} else {
+				bpid = mempool_to_bpid(mp);
+				eth_mbuf_to_fd(*bufs, &fd_arr[loop], bpid);
+			}
 			bufs++;
 		}
 		loop = 0;
@@ -346,5 +414,6 @@ static void __attribute__ ((noinline)) __attribute__((hot))
 		dpaa2_q->tx_pkts += frames_to_send;
 		nb_pkts -= frames_to_send;
 	}
+skip_tx:
 	return num_tx;
 }
-- 
1.9.1

^ permalink raw reply related

* [PATCH 30/32] net/dpaa2: frame queue based dq storage alloc
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/base/dpaa2_hw_dpio.c | 32 ++++++++++++++++++++++++++++++++
 drivers/net/dpaa2/base/dpaa2_hw_dpio.h |  8 ++++++++
 drivers/net/dpaa2/dpaa2_ethdev.c       |  7 +++----
 3 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpio.c b/drivers/net/dpaa2/base/dpaa2_hw_dpio.c
index 3b8f87d..38fa858 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpio.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpio.c
@@ -479,3 +479,35 @@ static inline struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(void)
 
 	return 0;
 }
+
+void
+dpaa2_free_dq_storage(struct queue_storage_info_t *q_storage)
+{
+	int i = 0;
+
+	for (i = 0; i < NUM_DQS_PER_QUEUE; i++) {
+		if (q_storage->dq_storage[i])
+			rte_free(q_storage->dq_storage[i]);
+	}
+}
+
+int
+dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage)
+{
+	int i = 0;
+
+	for (i = 0; i < NUM_DQS_PER_QUEUE; i++) {
+		q_storage->dq_storage[i] = rte_malloc(NULL,
+			DPAA2_DQRR_RING_SIZE * sizeof(struct qbman_result),
+			RTE_CACHE_LINE_SIZE);
+		if (!q_storage->dq_storage[i])
+			goto fail;
+	}
+	return 0;
+fail:
+	i -= 1;
+	while (i >= 0)
+		rte_free(q_storage->dq_storage[i]);
+
+	return -1;
+}
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpio.h b/drivers/net/dpaa2/base/dpaa2_hw_dpio.h
index 8480ce3..ccf2428 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpio.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpio.h
@@ -65,4 +65,12 @@ int dpaa2_create_dpio_device(struct dpaa2_vfio_device *vdev,
 			     struct vfio_device_info *obj_info,
 			     int object_id);
 
+/* allocate memory for FQ - dq storage */
+int
+dpaa2_alloc_dq_storage(struct queue_storage_info_t *q_storage);
+
+/* free memory for FQ- dq storage */
+void
+dpaa2_free_dq_storage(struct queue_storage_info_t *q_storage);
+
 #endif /* _DPAA2_HW_DPIO_H_ */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 2603a08..1a25f07 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -51,6 +51,7 @@
 
 #include <base/dpaa2_hw_dpbp.h>
 #include <base/dpaa2_hw_dpni.h>
+#include <base/dpaa2_hw_dpio.h>
 
 /* DPDK Interfaces */
 #include <dpaa2_ethdev.h>
@@ -122,9 +123,7 @@
 
 		memset(dpaa2_q->q_storage, 0,
 		       sizeof(struct queue_storage_info_t));
-		dpaa2_q->q_storage->dq_storage[0] = rte_malloc(NULL,
-			DPAA2_DQRR_RING_SIZE * sizeof(struct qbman_result),
-			RTE_CACHE_LINE_SIZE);
+		dpaa2_alloc_dq_storage(dpaa2_q->q_storage);
 	}
 
 	for (i = 0; i < priv->nb_tx_queues; i++) {
@@ -148,7 +147,7 @@
 	mc_q = priv->rx_vq[0];
 	while (i >= 0) {
 		dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
-		rte_free(dpaa2_q->q_storage->dq_storage[0]);
+		dpaa2_free_dq_storage(dpaa2_q->q_storage);
 		rte_free(dpaa2_q->q_storage);
 		priv->rx_vq[i--] = NULL;
 	}
-- 
1.9.1

^ permalink raw reply related

* [PATCH 29/32] net/dpaa2: rx packet parsing and packet type support
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 doc/guides/nics/features/dpaa2.ini           |   1 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h | 256 +++++++++++++++++++++++++++
 drivers/net/dpaa2/dpaa2_ethdev.c             |  23 +++
 drivers/net/dpaa2/dpaa2_rxtx.c               |  91 +++++++++-
 4 files changed, 370 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h

diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index a6b7964..0746d4b 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -10,6 +10,7 @@ Promiscuous mode     = Y
 RSS hash             = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
+Packet type parsing  = Y
 Linux VFIO           = Y
 ARMv8                = Y
 Usage doc            = Y
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
new file mode 100644
index 0000000..fdbd12e
--- /dev/null
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
@@ -0,0 +1,256 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
+ *   Copyright (c) 2016 NXP. All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Freescale Semiconductor, Inc nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ *
+ * DPNI packet parse results - implementation internal
+ */
+
+#ifndef _DPAA2_HW_DPNI_ANNOT_H_
+#define _DPAA2_HW_DPNI_ANNOT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Annotation valid bits in FD FRC */
+#define DPAA2_FD_FRC_FASV	0x8000
+#define DPAA2_FD_FRC_FAEADV	0x4000
+#define DPAA2_FD_FRC_FAPRV	0x2000
+#define DPAA2_FD_FRC_FAIADV	0x1000
+#define DPAA2_FD_FRC_FASWOV	0x0800
+#define DPAA2_FD_FRC_FAICFDV	0x0400
+
+/* Annotation bits in FD CTRL */
+#define DPAA2_FD_CTRL_ASAL	0x00020000      /* ASAL = 128 */
+#define DPAA2_FD_CTRL_PTA	0x00800000
+#define DPAA2_FD_CTRL_PTV1	0x00400000
+
+/* Frame annotation status */
+struct dpaa2_fas {
+	uint8_t reserved;
+	uint8_t ppid;
+	__le16 ifpid;
+	__le32 status;
+} __packed;
+
+/**
+ * HW Packet Annotation  Register structures
+ */
+struct dpaa2_annot_hdr {
+	/**<	word1: Frame Annotation Status (8 bytes)*/
+	uint64_t word1;
+
+	/**<	word2: Time Stamp (8 bytes)*/
+	uint64_t word2;
+
+	/**<	word3: Next Hdr + FAF Extension + FAF (2 + 2 + 4 bytes)*/
+	uint64_t word3;
+
+	/**<	word4: Frame Annotation Flags-FAF (8 bytes) */
+	uint64_t word4;
+
+	/**<	word5:
+		ShimOffset_1 + ShimOffset_2 + IPPIDOffset + EthOffset +
+		LLC+SNAPOffset + VLANTCIOffset_1 + VLANTCIOffset_n +
+		LastETypeOffset (1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 bytes)
+	*/
+	uint64_t word5;
+
+	/**<	word6:
+		PPPoEOffset + MPLSOffset_1 + MPLSOffset_n + ARPorIPOffset_1
+		+ IPOffset_norMInEncapO + GREOffset + L4Offset +
+		GTPorESPorIPSecOffset(1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 bytes)
+	*/
+	uint64_t word6;
+
+	/**<	word7:
+		RoutingHdrOfset1 + RoutingHdrOfset2 + NxtHdrOffset + IPv6FragOffset +
+		GrossRunningSum + RunningSum(1 + 1 + 1 + 1 + 2 + 2 bytes)
+	*/
+	uint64_t word7;
+
+	/**<	word8:
+		ParseErrorcode + Soft Parsing Context (1 + 7 bytes)
+	*/
+	uint64_t word8;
+};
+
+/**
+ * Internal Macros to get/set Packet annotation header
+ */
+
+/** General Macro to define a particular bit position*/
+#define BIT_POS(x)			((uint64_t)1 << ((x)))
+/** Set a bit in the variable */
+#define BIT_SET_AT_POS(var, pos)	(var |= (pos))
+/** Reset the bit in the variable */
+#define BIT_RESET_AT_POS(var, pos)	(var &= ~(pos))
+/** Check the bit is set in the variable */
+#define BIT_ISSET_AT_POS(var, pos)	((var & (pos)) ? 1 : 0)
+/**
+ * Macrso to define bit position in word3
+ */
+#define NEXT_HDR(var)			((uint64_t)var & 0xFFFF000000000000)
+#define FAF_EXTN_IPV6_ROUTE_HDR_PRESENT(var)	BIT_POS(16)
+#define FAF_EXTN_RESERVED(var)		((uint64_t)var & 0x00007FFF00000000)
+#define FAF_USER_DEFINED_RESERVED(var)	((uint64_t)var & 0x00000000FF000000)
+#define SHIM_SHELL_SOFT_PARSING_ERRROR		BIT_POS(23)
+#define PARSING_ERROR				BIT_POS(22)
+#define L2_ETH_MAC_PRESENT			BIT_POS(21)
+#define L2_ETH_MAC_UNICAST			BIT_POS(20)
+#define L2_ETH_MAC_MULTICAST			BIT_POS(19)
+#define L2_ETH_MAC_BROADCAST			BIT_POS(18)
+#define L2_ETH_FRAME_IS_BPDU			BIT_POS(17)
+#define L2_ETH_FCOE_PRESENT			BIT_POS(16)
+#define L2_ETH_FIP_PRESENT			BIT_POS(15)
+#define L2_ETH_PARSING_ERROR			BIT_POS(14)
+#define L2_LLC_SNAP_PRESENT			BIT_POS(13)
+#define L2_UNKNOWN_LLC_OUI			BIT_POS(12)
+#define L2_LLC_SNAP_ERROR			BIT_POS(11)
+#define L2_VLAN_1_PRESENT			BIT_POS(10)
+#define L2_VLAN_N_PRESENT			BIT_POS(9)
+#define L2_VLAN_CFI_BIT_PRESENT			BIT_POS(8)
+#define L2_VLAN_PARSING_ERROR			BIT_POS(7)
+#define L2_PPPOE_PPP_PRESENT			BIT_POS(6)
+#define L2_PPPOE_PPP_PARSING_ERROR		BIT_POS(5)
+#define L2_MPLS_1_PRESENT			BIT_POS(4)
+#define L2_MPLS_N_PRESENT			BIT_POS(3)
+#define L2_MPLS_PARSING_ERROR			BIT_POS(2)
+#define L2_ARP_PRESENT				BIT_POS(1)
+#define L2_ARP_PARSING_ERROR			BIT_POS(0)
+/**
+ * Macrso to define bit position in word4
+ */
+#define L2_UNKNOWN_PROTOCOL			BIT_POS(63)
+#define L2_SOFT_PARSING_ERROR			BIT_POS(62)
+#define L3_IPV4_1_PRESENT			BIT_POS(61)
+#define L3_IPV4_1_UNICAST			BIT_POS(60)
+#define L3_IPV4_1_MULTICAST			BIT_POS(59)
+#define L3_IPV4_1_BROADCAST			BIT_POS(58)
+#define L3_IPV4_N_PRESENT			BIT_POS(57)
+#define L3_IPV4_N_UNICAST			BIT_POS(56)
+#define L3_IPV4_N_MULTICAST			BIT_POS(55)
+#define L3_IPV4_N_BROADCAST			BIT_POS(54)
+#define L3_IPV6_1_PRESENT			BIT_POS(53)
+#define L3_IPV6_1_UNICAST			BIT_POS(52)
+#define L3_IPV6_1_MULTICAST			BIT_POS(51)
+#define L3_IPV6_N_PRESENT			BIT_POS(50)
+#define L3_IPV6_N_UNICAST			BIT_POS(49)
+#define L3_IPV6_N_MULTICAST			BIT_POS(48)
+#define L3_IP_1_OPT_PRESENT			BIT_POS(47)
+#define L3_IP_1_UNKNOWN_PROTOCOL		BIT_POS(46)
+#define L3_IP_1_MORE_FRAGMENT			BIT_POS(45)
+#define L3_IP_1_FIRST_FRAGMENT			BIT_POS(44)
+#define L3_IP_1_PARSING_ERROR			BIT_POS(43)
+#define L3_IP_N_OPT_PRESENT			BIT_POS(42)
+#define L3_IP_N_UNKNOWN_PROTOCOL		BIT_POS(41)
+#define L3_IP_N_MORE_FRAGMENT			BIT_POS(40)
+#define L3_IP_N_FIRST_FRAGMENT			BIT_POS(39)
+#define L3_PROTO_ICMP_PRESENT			BIT_POS(38)
+#define L3_PROTO_IGMP_PRESENT			BIT_POS(37)
+#define L3_PROTO_ICMPV6_PRESENT			BIT_POS(36)
+#define L3_PROTO_UDP_LIGHT_PRESENT		BIT_POS(35)
+#define L3_IP_N_PARSING_ERROR			BIT_POS(34)
+#define L3_MIN_ENCAP_PRESENT			BIT_POS(33)
+#define L3_MIN_ENCAP_SBIT_PRESENT		BIT_POS(32)
+#define L3_MIN_ENCAP_PARSING_ERROR		BIT_POS(31)
+#define L3_PROTO_GRE_PRESENT			BIT_POS(30)
+#define L3_PROTO_GRE_RBIT_PRESENT		BIT_POS(29)
+#define L3_PROTO_GRE_PARSING_ERROR		BIT_POS(28)
+#define L3_IP_UNKNOWN_PROTOCOL			BIT_POS(27)
+#define L3_SOFT_PARSING_ERROR			BIT_POS(26)
+#define L3_PROTO_UDP_PRESENT			BIT_POS(25)
+#define L3_PROTO_UDP_PARSING_ERROR		BIT_POS(24)
+#define L3_PROTO_TCP_PRESENT			BIT_POS(23)
+#define L3_PROTO_TCP_OPT_PRESENT		BIT_POS(22)
+#define L3_PROTO_TCP_CTRL_BIT_6_TO_11_PRESENT	BIT_POS(21)
+#define L3_PROTO_TCP_CTRL_BIT_3_TO_5_PRESENT	BIT_POS(20)
+#define L3_PROTO_TCP_PARSING_ERROR		BIT_POS(19)
+#define L3_PROTO_IPSEC_PRESENT			BIT_POS(18)
+#define L3_PROTO_IPSEC_ESP_PRESENT		BIT_POS(17)
+#define L3_PROTO_IPSEC_AH_PRESENT		BIT_POS(16)
+#define L3_PROTO_IPSEC_PARSING_ERROR		BIT_POS(15)
+#define L3_PROTO_SCTP_PRESENT			BIT_POS(14)
+#define L3_PROTO_SCTP_PARSING_ERROR		BIT_POS(13)
+#define L3_PROTO_DCCP_PRESENT			BIT_POS(12)
+#define L3_PROTO_DCCP_PARSING_ERROR		BIT_POS(11)
+#define L4_UNKNOWN_PROTOCOL			BIT_POS(10)
+#define L4_SOFT_PARSING_ERROR			BIT_POS(9)
+#define L3_PROTO_GTP_PRESENT			BIT_POS(8)
+#define L3_PROTO_GTP_PARSING_ERROR		BIT_POS(7)
+#define L3_PROTO_ESP_PRESENT			BIT_POS(6)
+#define L3_PROTO_ESP_PARSING_ERROR		BIT_POS(5)
+#define L3_PROTO_ISCSI_PRESENT			BIT_POS(4)
+#define L3_PROTO_CAPWAN__CTRL_PRESENT		BIT_POS(3)
+#define L3_PROTO_CAPWAN__DATA_PRESENT		BIT_POS(2)
+#define L5_SOFT_PARSING_ERROR			BIT_POS(1)
+#define L3_IPV6_ROUTE_HDR_PRESENT		BIT_POS(0)
+
+/* Debug frame, otherwise supposed to be discarded */
+#define DPAA2_ETH_FAS_DISC	      0x80000000
+/* MACSEC frame */
+#define DPAA2_ETH_FAS_MS		0x40000000
+#define DPAA2_ETH_FAS_PTP	       0x08000000
+/* Ethernet multicast frame */
+#define DPAA2_ETH_FAS_MC		0x04000000
+/* Ethernet broadcast frame */
+#define DPAA2_ETH_FAS_BC		0x02000000
+#define DPAA2_ETH_FAS_KSE	       0x00040000
+#define DPAA2_ETH_FAS_EOFHE	     0x00020000
+#define DPAA2_ETH_FAS_MNLE	      0x00010000
+#define DPAA2_ETH_FAS_TIDE	      0x00008000
+#define DPAA2_ETH_FAS_PIEE	      0x00004000
+/* Frame length error */
+#define DPAA2_ETH_FAS_FLE	       0x00002000
+/* Frame physical error; our favourite pastime */
+#define DPAA2_ETH_FAS_FPE	       0x00001000
+#define DPAA2_ETH_FAS_PTE	       0x00000080
+#define DPAA2_ETH_FAS_ISP	       0x00000040
+#define DPAA2_ETH_FAS_PHE	       0x00000020
+#define DPAA2_ETH_FAS_BLE	       0x00000010
+/* L3 csum validation performed */
+#define DPAA2_ETH_FAS_L3CV	      0x00000008
+/* L3 csum error */
+#define DPAA2_ETH_FAS_L3CE	      0x00000004
+/* L4 csum validation performed */
+#define DPAA2_ETH_FAS_L4CV	      0x00000002
+/* L4 csum error */
+#define DPAA2_ETH_FAS_L4CE	      0x00000001
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index b3c2229..2603a08 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -315,6 +315,28 @@
 	PMD_INIT_FUNC_TRACE();
 }
 
+static const uint32_t *
+dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
+{
+	static const uint32_t ptypes[] = {
+		/*todo -= add more types */
+		RTE_PTYPE_L2_ETHER,
+		RTE_PTYPE_L3_IPV4,
+		RTE_PTYPE_L3_IPV4_EXT,
+		RTE_PTYPE_L3_IPV6,
+		RTE_PTYPE_L3_IPV6_EXT,
+		RTE_PTYPE_L4_TCP,
+		RTE_PTYPE_L4_UDP,
+		RTE_PTYPE_L4_SCTP,
+		RTE_PTYPE_L4_ICMP,
+		RTE_PTYPE_UNKNOWN
+	};
+
+	if (dev->rx_pkt_burst == dpaa2_dev_rx)
+		return ptypes;
+	return NULL;
+}
+
 static int
 dpaa2_dev_start(struct rte_eth_dev *dev)
 {
@@ -521,6 +543,7 @@
 	.promiscuous_enable   = dpaa2_dev_promiscuous_enable,
 	.promiscuous_disable  = dpaa2_dev_promiscuous_disable,
 	.dev_infos_get	   = dpaa2_dev_info_get,
+	.dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
 	.mtu_set           = dpaa2_dev_mtu_set,
 	.rx_queue_setup    = dpaa2_dev_rx_queue_setup,
 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index ba002be..2fe902f 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -50,9 +50,90 @@
 #include <base/dpaa2_hw_dpbp.h>
 #include <base/dpaa2_hw_dpni.h>
 #include <base/dpaa2_hw_dpio.h>
+#include <base/dpaa2_hw_dpni_annot.h>
 
 /* DPDP Interfaces */
 #include <dpaa2_ethdev.h>
+static inline uint32_t __attribute__((hot))
+dpaa2_dev_rx_parse(uint64_t hw_annot_addr)
+{
+	uint32_t pkt_type = RTE_PTYPE_UNKNOWN;
+	struct dpaa2_annot_hdr *annotation =
+			(struct dpaa2_annot_hdr *)hw_annot_addr;
+
+	PMD_RX_LOG(DEBUG, "annotation = 0x%lx   ", annotation->word4);
+
+	if (BIT_ISSET_AT_POS(annotation->word3, L2_ARP_PRESENT)) {
+		pkt_type = RTE_PTYPE_L2_ETHER_ARP;
+		goto parse_done;
+	} else if (BIT_ISSET_AT_POS(annotation->word3, L2_ETH_MAC_PRESENT)) {
+		pkt_type = RTE_PTYPE_L2_ETHER;
+	} else {
+		goto parse_done;
+	}
+
+	if (BIT_ISSET_AT_POS(annotation->word4, L3_IPV4_1_PRESENT |
+			     L3_IPV4_N_PRESENT)) {
+		pkt_type |= RTE_PTYPE_L3_IPV4;
+		if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_1_OPT_PRESENT |
+			L3_IP_N_OPT_PRESENT))
+			pkt_type |= RTE_PTYPE_L3_IPV4_EXT;
+
+	} else if (BIT_ISSET_AT_POS(annotation->word4, L3_IPV6_1_PRESENT |
+		  L3_IPV6_N_PRESENT)) {
+		pkt_type |= RTE_PTYPE_L3_IPV6;
+		if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_1_OPT_PRESENT |
+		    L3_IP_N_OPT_PRESENT))
+			pkt_type |= RTE_PTYPE_L3_IPV6_EXT;
+	} else {
+		goto parse_done;
+	}
+
+	if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_1_FIRST_FRAGMENT |
+	    L3_IP_1_MORE_FRAGMENT |
+	    L3_IP_N_FIRST_FRAGMENT |
+	    L3_IP_N_MORE_FRAGMENT)) {
+		pkt_type |= RTE_PTYPE_L4_FRAG;
+		goto parse_done;
+	} else {
+		pkt_type |= RTE_PTYPE_L4_NONFRAG;
+	}
+
+	if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_UDP_PRESENT))
+		pkt_type |= RTE_PTYPE_L4_UDP;
+
+	else if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_TCP_PRESENT))
+		pkt_type |= RTE_PTYPE_L4_TCP;
+
+	else if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_SCTP_PRESENT))
+		pkt_type |= RTE_PTYPE_L4_SCTP;
+
+	else if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_ICMP_PRESENT))
+		pkt_type |= RTE_PTYPE_L4_ICMP;
+
+	else if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_UNKNOWN_PROTOCOL))
+		pkt_type |= RTE_PTYPE_UNKNOWN;
+
+parse_done:
+	return pkt_type;
+}
+
+static inline void __attribute__((hot))
+dpaa2_dev_rx_offload(uint64_t hw_annot_addr, struct rte_mbuf *mbuf)
+{
+	struct dpaa2_annot_hdr *annotation =
+		(struct dpaa2_annot_hdr *)hw_annot_addr;
+
+	if (BIT_ISSET_AT_POS(annotation->word3,
+			     L2_VLAN_1_PRESENT | L2_VLAN_N_PRESENT))
+		mbuf->ol_flags |= PKT_RX_VLAN_PKT;
+
+	if (BIT_ISSET_AT_POS(annotation->word8, DPAA2_ETH_FAS_L3CE))
+		mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
+
+	if (BIT_ISSET_AT_POS(annotation->word8, DPAA2_ETH_FAS_L4CE))
+		mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
+}
 
 static inline struct rte_mbuf *__attribute__((hot))
 eth_fd_to_mbuf(const struct qbman_fd *fd)
@@ -69,7 +150,15 @@ static inline struct rte_mbuf *__attribute__((hot))
 	mbuf->data_len = DPAA2_GET_FD_LEN(fd);
 	mbuf->pkt_len = mbuf->data_len;
 
-	mbuf->packet_type = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4;
+	/* Parse the packet */
+	/* parse results are after the private - sw annotation area */
+	mbuf->packet_type = dpaa2_dev_rx_parse(
+			(uint64_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
+			 + DPAA2_FD_PTA_SIZE);
+
+	dpaa2_dev_rx_offload((uint64_t)DPAA2_IOVA_TO_VADDR(
+			     DPAA2_GET_FD_ADDR(fd)) +
+			     DPAA2_FD_PTA_SIZE, mbuf);
 
 	mbuf->next = NULL;
 	rte_mbuf_refcnt_set(mbuf, 1);
-- 
1.9.1

^ permalink raw reply related

* [PATCH 28/32] net/dpaa2: add support for physical address usages
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

DPAA2 HW accelerators with ARM SMMU can be configured
to use virtual or physical address from users space.
Adding support for Physical address (default).

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 config/defconfig_arm64-dpaa2-linuxapp-gcc |  1 +
 drivers/net/dpaa2/Makefile                |  1 +
 drivers/net/dpaa2/base/dpaa2_hw_dpbp.c    |  1 +
 drivers/net/dpaa2/base/dpaa2_hw_pvt.h     | 59 +++++++++++++++++++++++++++++++
 4 files changed, 62 insertions(+)

diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index bcb6e88..7dc6d2d 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -50,5 +50,6 @@ CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
 # Compile software PMD backed by NXP DPAA2 files
 #
 CONFIG_RTE_LIBRTE_DPAA2_PMD=y
+CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 9e693cd..a8c3c04 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -42,6 +42,7 @@ else
 CFLAGS += -O3
 CFLAGS += $(WERROR_FLAGS)
 endif
+CFLAGS +=-Wno-unused-function
 
 CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2
 CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/mc
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c b/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c
index 2b30036..5b7d593 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c
@@ -322,6 +322,7 @@ int hw_mbuf_alloc_bulk(struct rte_mempool *pool,
 			 * i.e. first buffer is valid,
 			 * remaining 6 buffers may be null
 			 */
+			DPAA2_MODIFY_IOVA_TO_VADDR(bufs[i], uint64_t);
 			obj_table[n] = (struct rte_mbuf *)(bufs[i] - mbuf_size);
 			rte_mbuf_refcnt_set((struct rte_mbuf *)obj_table[n], 0);
 			PMD_TX_LOG(DEBUG, "Acquired %p address %p from BMAN",
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
index d116fcd..a1afa23 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
@@ -169,8 +169,67 @@ struct qbman_fle {
  */
 #define DPAA2_EQ_RESP_ALWAYS		1
 
+#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
+/* todo - this is costly, need to write a fast coversion routine */
+static void *dpaa2_mem_ptov(phys_addr_t paddr)
+{
+	const struct rte_memseg *memseg = rte_eal_get_physmem_layout();
+	int i;
+
+	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
+		if (paddr >= memseg[i].phys_addr &&
+		   (char *)paddr < (char *)memseg[i].phys_addr + memseg[i].len)
+			return (void *)(memseg[i].addr_64
+				+ (paddr - memseg[i].phys_addr));
+	}
+	return NULL;
+}
+
+static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
+{
+	const struct rte_memseg *memseg = rte_eal_get_physmem_layout();
+	int i;
+
+	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
+		if (vaddr >= memseg[i].addr_64 &&
+		    vaddr < memseg[i].addr_64 + memseg[i].len)
+			return memseg[i].phys_addr
+				+ (vaddr - memseg[i].addr_64);
+	}
+	return (phys_addr_t)(NULL);
+}
+
+/**
+ * When we are using Physical addresses as IO Virtual Addresses,
+ * Need to call conversion routines dpaa2_mem_vtop & dpaa2_mem_ptov
+ * whereever required.
+ * These routines are called with help of below MACRO's
+ */
+
+#define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) (mbuf->buf_physaddr)
+
+/**
+ * macro to convert Virtual address to IOVA
+ */
+#define DPAA2_VADDR_TO_IOVA(_vaddr) dpaa2_mem_vtop((uint64_t)(_vaddr))
+
+/**
+ * macro to convert IOVA to Virtual address
+ */
+#define DPAA2_IOVA_TO_VADDR(_iova) dpaa2_mem_ptov((phys_addr_t)(_iova))
+
+/**
+ * macro to convert modify the memory containing IOVA to Virtual address
+ */
+#define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type) \
+	{_mem = (_type)(dpaa2_mem_ptov((phys_addr_t)(_mem))); }
+
+#else	/* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */
+
 #define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) (mbuf->buf_addr)
 #define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr)
 #define DPAA2_IOVA_TO_VADDR(_iova) (_iova)
+#define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type)
 
+#endif /* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */
 #endif
-- 
1.9.1

^ permalink raw reply related

* [PATCH 24/32] net/dpaa2: add support for l3 and l4 checksum offload
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 doc/guides/nics/features/dpaa2.ini    |  2 +
 drivers/net/dpaa2/base/dpaa2_hw_pvt.h |  6 +++
 drivers/net/dpaa2/dpaa2_ethdev.c      | 71 +++++++++++++++++++++++++++++++++--
 3 files changed, 76 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index 20152a0..d50c62e 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -6,6 +6,8 @@
 [Features]
 Queue start/stop     = Y
 RSS hash             = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
 Linux VFIO           = Y
 ARMv8                = Y
 Usage doc            = Y
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
index 7e34ea8..a4959a1 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
@@ -37,6 +37,12 @@
 #include <fsl_mc_sys.h>
 #include <fsl_qbman_portal.h>
 
+#ifndef false
+#define false      0
+#endif
+#ifndef true
+#define true       1
+#endif
 #define DPAA2_DQRR_RING_SIZE	16
 	/** <Maximum number of slots available in RX ring*/
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 9080e56..ee79f05 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -73,6 +73,17 @@
 	dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 	dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 	dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
+	dev_info->rx_offload_capa =
+		DEV_RX_OFFLOAD_IPV4_CKSUM |
+		DEV_RX_OFFLOAD_UDP_CKSUM |
+		DEV_RX_OFFLOAD_TCP_CKSUM |
+		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
+	dev_info->tx_offload_capa =
+		DEV_TX_OFFLOAD_IPV4_CKSUM |
+		DEV_TX_OFFLOAD_UDP_CKSUM |
+		DEV_TX_OFFLOAD_TCP_CKSUM |
+		DEV_TX_OFFLOAD_SCTP_CKSUM |
+		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
 	dev_info->speed_capa = ETH_LINK_SPEED_1G |
 			ETH_LINK_SPEED_2_5G |
 			ETH_LINK_SPEED_10G;
@@ -256,8 +267,13 @@
 	memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 	memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 
-	tc_id = 0;
-	flow_id = tx_queue_id;
+	if (priv->num_tc == 1) {
+		tc_id = 0;
+		flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
+	} else {
+		tc_id = tx_queue_id;
+		flow_id = 0;
+	}
 
 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 			     tc_id, flow_id, options, &tx_flow_cfg);
@@ -306,6 +322,7 @@
 	struct dpaa2_dev_priv *priv = data->dev_private;
 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 	struct dpni_queue cfg;
+	struct dpni_error_cfg	err_cfg;
 	uint16_t qdid;
 	struct dpni_queue_id qid;
 	struct dpaa2_queue *dpaa2_q;
@@ -341,6 +358,48 @@
 		dpaa2_q->fqid = qid.fqid;
 	}
 
+	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+			       DPNI_OFF_RX_L3_CSUM, true);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
+		return ret;
+	}
+
+	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+			       DPNI_OFF_RX_L4_CSUM, true);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
+		return ret;
+	}
+
+	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+			       DPNI_OFF_TX_L3_CSUM, true);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
+		return ret;
+	}
+
+	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+			       DPNI_OFF_TX_L4_CSUM, true);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
+		return ret;
+	}
+
+	/*checksum errors, send them to normal path and set it in annotation */
+	err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
+
+	err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
+	err_cfg.set_frame_annotation = true;
+
+	ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
+				       priv->token, &err_cfg);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
+			     "code = %d\n", ret);
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -457,7 +516,13 @@
 	 */
 	priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
 
-	priv->nb_tx_queues = attr.num_queues;
+	if (attr.num_tcs == 1)
+		priv->nb_tx_queues = attr.num_queues;
+	else
+		priv->nb_tx_queues = attr.num_tcs;
+
+	PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
+	PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
 
 	eth_dev->data->nb_rx_queues = priv->nb_rx_queues;
 	eth_dev->data->nb_tx_queues = priv->nb_tx_queues;
-- 
1.9.1

^ permalink raw reply related

* [PATCH 27/32] net/dpaa2: add packet rx and tx support
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/Makefile            |   2 +-
 drivers/net/dpaa2/base/dpaa2_hw_pvt.h |  58 ++++++++
 drivers/net/dpaa2/dpaa2_ethdev.c      |   3 +
 drivers/net/dpaa2/dpaa2_ethdev.h      |   2 +
 drivers/net/dpaa2/dpaa2_rxtx.c        | 261 ++++++++++++++++++++++++++++++++++
 5 files changed, 325 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/dpaa2/dpaa2_rxtx.c

diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 4ed0de3..9e693cd 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -61,7 +61,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += base/dpaa2_hw_dpni.c
 
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_vfio.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_bus.c
-# Interfaces with DPDK
+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_ethdev.c
 
 # library dependencies
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
index 2eaca40..d116fcd 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
@@ -43,10 +43,19 @@
 #ifndef true
 #define true       1
 #endif
+#define lower_32_bits(x) ((uint32_t)(x))
+#define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
 
+#ifndef ETH_ADDR_LEN
+#define ETH_ADDR_LEN			6
+#endif
 #ifndef ETH_VLAN_HLEN
 #define ETH_VLAN_HLEN   4 /** < Vlan Header Length */
 #endif
+
+#define MAX_TX_RING_SLOTS	8
+	/** <Maximum number of slots available in TX ring*/
+
 #define DPAA2_DQRR_RING_SIZE	16
 	/** <Maximum number of slots available in RX ring*/
 
@@ -113,6 +122,55 @@ struct dpaa2_queue {
 /*! Global MCP list */
 extern void *(*mcp_ptr_list);
 
+/* Refer to Table 7-3 in SEC BG */
+struct qbman_fle {
+	uint32_t addr_lo;
+	uint32_t addr_hi;
+	uint32_t length;
+	/* FMT must be 00, MSB is final bit  */
+	uint32_t fin_bpid_offset;
+	uint32_t frc;
+	uint32_t reserved[3]; /* Not used currently */
+};
+
+/*Macros to define operations on FD*/
+#define DPAA2_SET_FD_ADDR(fd, addr) do {			\
+	fd->simple.addr_lo = lower_32_bits((uint64_t)addr);	\
+	fd->simple.addr_hi = upper_32_bits((uint64_t)addr);	\
+} while (0)
+#define DPAA2_SET_FD_LEN(fd, length)	fd->simple.len = length
+#define DPAA2_SET_FD_BPID(fd, bpid)	(fd->simple.bpid_offset |= bpid)
+#define DPAA2_SET_FD_OFFSET(fd, offset)	\
+	((fd->simple.bpid_offset |= (uint32_t)(offset) << 16))
+#define DPAA2_RESET_FD_CTRL(fd)	fd->simple.ctrl = 0
+
+#define	DPAA2_SET_FD_ASAL(fd, asal)	(fd->simple.ctrl |= (asal << 16))
+#define DPAA2_SET_FD_FLC(fd, addr)	do { \
+	fd->simple.flc_lo = lower_32_bits((uint64_t)addr);	\
+	fd->simple.flc_hi = upper_32_bits((uint64_t)addr);	\
+} while (0)
+#define DPAA2_GET_FD_ADDR(fd)	\
+((uint64_t)((((uint64_t)(fd->simple.addr_hi)) << 32) + fd->simple.addr_lo))
+
+#define DPAA2_GET_FD_LEN(fd)	(fd->simple.len)
+#define DPAA2_GET_FD_BPID(fd)	((fd->simple.bpid_offset & 0x00003FFF))
+#define DPAA2_GET_FD_OFFSET(fd)	((fd->simple.bpid_offset & 0x0FFF0000) >> 16)
+#define DPAA2_INLINE_MBUF_FROM_BUF(buf, meta_data_size) \
+	((struct rte_mbuf *)((uint64_t)buf - meta_data_size))
+
+#define DPAA2_ASAL_VAL (DPAA2_MBUF_HW_ANNOTATION / 64)
+
+/* Only Enqueue Error responses will be
+ * pushed on FQID_ERR of Enqueue FQ
+ */
+#define DPAA2_EQ_RESP_ERR_FQ		0
+/* All Enqueue responses will be pushed on address
+ * set with qbman_eq_desc_set_response
+ */
+#define DPAA2_EQ_RESP_ALWAYS		1
+
+#define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) (mbuf->buf_addr)
 #define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr)
+#define DPAA2_IOVA_TO_VADDR(_iova) (_iova)
 
 #endif
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index f941e89..b3c2229 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -683,5 +683,8 @@
 	}
 
 	eth_dev->dev_ops = &dpaa2_ethdev_ops;
+	eth_dev->rx_pkt_burst = dpaa2_dev_rx;
+	eth_dev->tx_pkt_burst = dpaa2_dev_tx;
+
 	return 0;
 }
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 0295868..f2d78ec 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -35,5 +35,7 @@
 #define _DPAA2_ETHDEV_H
 
 int dpaa2_dev_init(struct rte_eth_dev *eth_dev);
+uint16_t dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
+uint16_t dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
 
 #endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
new file mode 100644
index 0000000..ba002be
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -0,0 +1,261 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
+ *   Copyright (c) 2016 NXP. All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Freescale Semiconductor, Inc nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <time.h>
+#include <net/if.h>
+
+#include <rte_mbuf.h>
+#include <rte_ethdev.h>
+#include <rte_malloc.h>
+#include <rte_memcpy.h>
+#include <rte_string_fns.h>
+#include <rte_dev.h>
+#include <rte_ethdev.h>
+
+/* DPAA2 Global constants */
+#include <dpaa2_logs.h>
+
+/* DPAA2 Base interface files */
+#include <base/dpaa2_hw_pvt.h>
+#include <base/dpaa2_hw_dpbp.h>
+#include <base/dpaa2_hw_dpni.h>
+#include <base/dpaa2_hw_dpio.h>
+
+/* DPDP Interfaces */
+#include <dpaa2_ethdev.h>
+
+static inline struct rte_mbuf *__attribute__((hot))
+eth_fd_to_mbuf(const struct qbman_fd *fd)
+{
+	struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
+		DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
+			bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
+
+	/* need to repopulated some of the fields,
+	as they may have changed in last transmission*/
+	mbuf->nb_segs = 1;
+	mbuf->ol_flags = 0;
+	mbuf->data_off = DPAA2_GET_FD_OFFSET(fd);
+	mbuf->data_len = DPAA2_GET_FD_LEN(fd);
+	mbuf->pkt_len = mbuf->data_len;
+
+	mbuf->packet_type = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4;
+
+	mbuf->next = NULL;
+	rte_mbuf_refcnt_set(mbuf, 1);
+
+	PMD_RX_LOG(DEBUG, "to mbuf - mbuf =%p, mbuf->buf_addr =%p, off = %d,"
+		"fd_off=%d fd =%lx, meta = %d  bpid =%d, len=%d\n",
+		mbuf, mbuf->buf_addr, mbuf->data_off,
+		DPAA2_GET_FD_OFFSET(fd), DPAA2_GET_FD_ADDR(fd),
+		bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
+		DPAA2_GET_FD_BPID(fd), DPAA2_GET_FD_LEN(fd));
+
+	return mbuf;
+}
+
+static void __attribute__ ((noinline)) __attribute__((hot))
+eth_mbuf_to_fd(struct rte_mbuf *mbuf,
+	       struct qbman_fd *fd, uint16_t bpid)
+{
+	/*Resetting the buffer pool id and offset field*/
+	fd->simple.bpid_offset = 0;
+
+	DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
+	DPAA2_SET_FD_LEN(fd, mbuf->data_len);
+	DPAA2_SET_FD_BPID(fd, bpid);
+	DPAA2_SET_FD_OFFSET(fd, mbuf->data_off);
+	DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
+
+	PMD_TX_LOG(DEBUG, "mbuf =%p, mbuf->buf_addr =%p, off = %d,"
+		"fd_off=%d fd =%lx, meta = %d  bpid =%d, len=%d\n",
+		mbuf, mbuf->buf_addr, mbuf->data_off,
+		DPAA2_GET_FD_OFFSET(fd), DPAA2_GET_FD_ADDR(fd),
+		bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
+		DPAA2_GET_FD_BPID(fd), DPAA2_GET_FD_LEN(fd));
+}
+
+uint16_t
+dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
+{
+	/* Function is responsible to receive frames for a given device and VQ*/
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+	struct qbman_result *dq_storage;
+	uint32_t fqid = dpaa2_q->fqid;
+	int ret, num_rx = 0;
+	uint8_t is_last = 0, status;
+	struct qbman_swp *swp;
+	const struct qbman_fd *fd;
+	struct qbman_pull_desc pulldesc;
+	struct rte_eth_dev *dev = dpaa2_q->dev;
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failure in affining portal\n");
+			return 0;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+	dq_storage = dpaa2_q->q_storage->dq_storage[0];
+
+	qbman_pull_desc_clear(&pulldesc);
+	qbman_pull_desc_set_numframes(&pulldesc,
+				      (nb_pkts > DPAA2_DQRR_RING_SIZE) ?
+				       DPAA2_DQRR_RING_SIZE : nb_pkts);
+	qbman_pull_desc_set_fq(&pulldesc, fqid);
+	/* todo optimization - we can have dq_storage_phys available*/
+	qbman_pull_desc_set_storage(&pulldesc, dq_storage,
+			(dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+
+	/*Issue a volatile dequeue command. */
+	while (1) {
+		if (qbman_swp_pull(swp, &pulldesc)) {
+			PMD_RX_LOG(ERR, "VDQ command is not issued."
+				   "QBMAN is busy\n");
+			/* Portal was busy, try again */
+			continue;
+		}
+		break;
+	};
+
+	/* Receive the packets till Last Dequeue entry is found with
+	 * respect to the above issues PULL command.
+	 */
+	while (!is_last) {
+		struct rte_mbuf *mbuf;
+		/*Check if the previous issued command is completed.
+		*Also seems like the SWP is shared between the Ethernet Driver
+		*and the SEC driver.*/
+		while (!qbman_check_command_complete(swp, dq_storage))
+			;
+		/* Loop until the dq_storage is updated with
+		 * new token by QBMAN */
+		while (!qbman_result_has_new_result(swp, dq_storage))
+			;
+		/* Check whether Last Pull command is Expired and
+		setting Condition for Loop termination */
+		if (qbman_result_DQ_is_pull_complete(dq_storage)) {
+			is_last = 1;
+			/* Check for valid frame. */
+			status = (uint8_t)qbman_result_DQ_flags(dq_storage);
+			if (unlikely((status & QBMAN_DQ_STAT_VALIDFRAME) == 0))
+				continue;
+		}
+
+		fd = qbman_result_DQ_fd(dq_storage);
+		mbuf = (struct rte_mbuf *)DPAA2_IOVA_TO_VADDR(
+			DPAA2_GET_FD_ADDR(fd)
+			 - bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
+		/* Prefeth mbuf */
+		rte_prefetch0(mbuf);
+		/* Prefetch Annotation address for the parse results */
+		rte_prefetch0((void *)((uint64_t)DPAA2_GET_FD_ADDR(fd)
+						+ DPAA2_FD_PTA_SIZE + 16));
+
+		bufs[num_rx] = eth_fd_to_mbuf(fd);
+		bufs[num_rx]->port = dev->data->port_id;
+
+		num_rx++;
+		dq_storage++;
+	} /* End of Packet Rx loop */
+
+	dpaa2_q->rx_pkts += num_rx;
+
+	/*Return the total number of packets received to DPAA2 app*/
+	return num_rx;
+}
+
+/*
+ * Callback to handle sending packets through WRIOP based interface
+ */
+uint16_t
+dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
+{
+	/* Function to transmit the frames to given device and VQ*/
+	uint32_t loop;
+	int32_t ret;
+	struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
+	uint32_t frames_to_send;
+	struct rte_mempool *mp;
+	struct qbman_eq_desc eqdesc;
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+	struct qbman_swp *swp;
+	uint16_t num_tx = 0;
+	uint16_t bpid;
+	struct rte_eth_dev *dev = dpaa2_q->dev;
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failure in affining portal\n");
+			return 0;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	PMD_TX_LOG(DEBUG, "===> dev =%p, fqid =%d", dev, dpaa2_q->fqid);
+
+	/*Prepare enqueue descriptor*/
+	qbman_eq_desc_clear(&eqdesc);
+	qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
+	qbman_eq_desc_set_response(&eqdesc, 0, 0);
+	qbman_eq_desc_set_qd(&eqdesc, priv->qdid,
+			     dpaa2_q->flow_id, dpaa2_q->tc_index);
+
+	/*Clear the unused FD fields before sending*/
+	while (nb_pkts) {
+		frames_to_send = (nb_pkts >> 3) ? MAX_TX_RING_SLOTS : nb_pkts;
+
+		for (loop = 0; loop < frames_to_send; loop++) {
+			fd_arr[loop].simple.frc = 0;
+			DPAA2_RESET_FD_CTRL((&fd_arr[loop]));
+			DPAA2_SET_FD_FLC((&fd_arr[loop]), NULL);
+			mp = (*bufs)->pool;
+			bpid = mempool_to_bpid(mp);
+			eth_mbuf_to_fd(*bufs, &fd_arr[loop], bpid);
+			bufs++;
+		}
+		loop = 0;
+		while (loop < frames_to_send) {
+			loop += qbman_swp_send_multiple(swp, &eqdesc,
+					&fd_arr[loop], frames_to_send - loop);
+		}
+
+		num_tx += frames_to_send;
+		dpaa2_q->tx_pkts += frames_to_send;
+		nb_pkts -= frames_to_send;
+	}
+	return num_tx;
+}
-- 
1.9.1

^ permalink raw reply related

* [PATCH 26/32] net/dpaa2: add mtu config support
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 doc/guides/nics/features/dpaa2.ini    |  1 +
 drivers/net/dpaa2/base/dpaa2_hw_pvt.h |  4 ++++
 drivers/net/dpaa2/dpaa2_ethdev.c      | 33 +++++++++++++++++++++++++++++++++
 3 files changed, 38 insertions(+)

diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index b7c274a..a6b7964 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -5,6 +5,7 @@
 ;
 [Features]
 Queue start/stop     = Y
+MTU update           = Y
 Promiscuous mode     = Y
 RSS hash             = Y
 L3 checksum offload  = Y
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
index a4959a1..2eaca40 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
@@ -43,6 +43,10 @@
 #ifndef true
 #define true       1
 #endif
+
+#ifndef ETH_VLAN_HLEN
+#define ETH_VLAN_HLEN   4 /** < Vlan Header Length */
+#endif
 #define DPAA2_DQRR_RING_SIZE	16
 	/** <Maximum number of slots available in RX ring*/
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index d0a652f..f941e89 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -481,6 +481,38 @@
 	if (ret < 0)
 		RTE_LOG(ERR, PMD, "Unable to disable promiscuous mode %d", ret);
 }
+
+static int
+dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
+{
+	int ret;
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
+
+	PMD_INIT_FUNC_TRACE();
+
+	if (dpni == NULL) {
+		RTE_LOG(ERR, PMD, "dpni is NULL");
+		return -EINVAL;
+	}
+
+	/* check that mtu is within the allowed range */
+	if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
+		return -EINVAL;
+
+	/* Set the Max Rx frame length as 'mtu' +
+	 * Maximum Ethernet header length */
+	ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
+					mtu + ETH_VLAN_HLEN);
+	if (ret) {
+		PMD_DRV_LOG(ERR, "setting the max frame length failed");
+		return -1;
+	}
+	PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
+	return 0;
+}
+
 static struct eth_dev_ops dpaa2_ethdev_ops = {
 	.dev_configure	  = dpaa2_eth_dev_configure,
 	.dev_start	      = dpaa2_dev_start,
@@ -489,6 +521,7 @@
 	.promiscuous_enable   = dpaa2_dev_promiscuous_enable,
 	.promiscuous_disable  = dpaa2_dev_promiscuous_disable,
 	.dev_infos_get	   = dpaa2_dev_info_get,
+	.mtu_set           = dpaa2_dev_mtu_set,
 	.rx_queue_setup    = dpaa2_dev_rx_queue_setup,
 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
 	.tx_queue_setup    = dpaa2_dev_tx_queue_setup,
-- 
1.9.1

^ permalink raw reply related

* [PATCH 25/32] net/dpaa2: add support for promiscuous mode
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 doc/guides/nics/features/dpaa2.ini |  1 +
 drivers/net/dpaa2/dpaa2_ethdev.c   | 41 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index d50c62e..b7c274a 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -5,6 +5,7 @@
 ;
 [Features]
 Queue start/stop     = Y
+Promiscuous mode     = Y
 RSS hash             = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index ee79f05..d0a652f 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -442,11 +442,52 @@
 	}
 }
 
+static void
+dpaa2_dev_promiscuous_enable(
+		struct rte_eth_dev *dev)
+{
+	int ret;
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+
+	PMD_INIT_FUNC_TRACE();
+
+	if (dpni == NULL) {
+		RTE_LOG(ERR, PMD, "dpni is NULL");
+		return;
+	}
+
+	ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
+	if (ret < 0)
+		RTE_LOG(ERR, PMD, "Unable to enable promiscuous mode %d", ret);
+}
+
+static void
+dpaa2_dev_promiscuous_disable(
+		struct rte_eth_dev *dev)
+{
+	int ret;
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+
+	PMD_INIT_FUNC_TRACE();
+
+	if (dpni == NULL) {
+		RTE_LOG(ERR, PMD, "dpni is NULL");
+		return;
+	}
+
+	ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
+	if (ret < 0)
+		RTE_LOG(ERR, PMD, "Unable to disable promiscuous mode %d", ret);
+}
 static struct eth_dev_ops dpaa2_ethdev_ops = {
 	.dev_configure	  = dpaa2_eth_dev_configure,
 	.dev_start	      = dpaa2_dev_start,
 	.dev_stop	      = dpaa2_dev_stop,
 	.dev_close	      = dpaa2_dev_close,
+	.promiscuous_enable   = dpaa2_dev_promiscuous_enable,
+	.promiscuous_disable  = dpaa2_dev_promiscuous_disable,
 	.dev_infos_get	   = dpaa2_dev_info_get,
 	.rx_queue_setup    = dpaa2_dev_rx_queue_setup,
 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
-- 
1.9.1

^ permalink raw reply related

* [PATCH 23/32] net/dpaa2: attach the buffer pool to dpni
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 56 +++++++++++++++++++++++++++++
 drivers/net/dpaa2/base/dpaa2_hw_dpni.h |  6 ++++
 drivers/net/dpaa2/base/dpaa2_hw_pvt.h  | 10 ++++++
 drivers/net/dpaa2/dpaa2_ethdev.c       | 65 ++++++++++++++++++++++++++++++++++
 4 files changed, 137 insertions(+)

diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index b26d5a7..0271cd2 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -48,6 +48,7 @@
 
 #include <base/dpaa2_hw_pvt.h>
 #include <base/dpaa2_hw_dpni.h>
+#include <base/dpaa2_hw_dpbp.h>
 
 static void
 dpaa2_distset_to_dpkg_profile_cfg(
@@ -285,3 +286,58 @@ int dpaa2_remove_flow_dist(
 	}
 	kg_cfg->num_extracts = i;
 }
+
+int
+dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
+		     void *blist)
+{
+	/* Function to attach a DPNI with a buffer pool list. Buffer pool list
+	 * handle is passed in blist.
+	 */
+	int32_t retcode;
+	struct fsl_mc_io *dpni = priv->hw;
+	struct dpni_pools_cfg bpool_cfg;
+	struct dpaa2_bp_list *bp_list = (struct dpaa2_bp_list *)blist;
+	struct dpni_buffer_layout layout;
+	int tot_size;
+
+	/* ... rx buffer layout .
+	Check alignment for buffer layouts first*/
+
+	/* ... rx buffer layout ... */
+	tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM;
+	tot_size = RTE_ALIGN_CEIL(tot_size,
+				  DPAA2_PACKET_LAYOUT_ALIGN);
+
+	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
+	layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
+
+	layout.data_head_room =
+		tot_size - DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION;
+	retcode = dpni_set_buffer_layout(dpni, CMD_PRI_LOW, priv->token,
+					 DPNI_QUEUE_RX, &layout);
+	if (retcode) {
+		PMD_INIT_LOG(ERR, "Err(%d) in setting rx buffer layout\n",
+			     retcode);
+		return retcode;
+	}
+
+	/*Attach buffer pool to the network interface as described by the user*/
+	bpool_cfg.num_dpbp = 1;
+	bpool_cfg.pools[0].dpbp_id = bp_list->buf_pool.dpbp_node->dpbp_id;
+	bpool_cfg.pools[0].backup_pool = 0;
+	bpool_cfg.pools[0].buffer_size =
+		RTE_ALIGN_CEIL(bp_list->buf_pool.size,
+			       256 /*DPAA2_PACKET_LAYOUT_ALIGN*/);
+
+	retcode = dpni_set_pools(dpni, CMD_PRI_LOW, priv->token, &bpool_cfg);
+	if (retcode != 0) {
+		PMD_INIT_LOG(ERR, "Error in attaching the buffer pool list"
+				" bpid = %d Error code = %d\n",
+				bpool_cfg.pools[0].dpbp_id, retcode);
+		return retcode;
+	}
+
+	priv->bp_list = bp_list;
+	return 0;
+}
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni.h
index 70d52b6..6d97bc9 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.h
@@ -37,6 +37,9 @@
 #include <fsl_dpni.h>
 #include <fsl_mc_sys.h>
 
+#define DPAA2_MIN_RX_BUF_SIZE 512
+#define DPAA2_MAX_RX_PKT_LEN  10240 /*WRIOP support*/
+
 #define MAX_TCS			DPNI_MAX_TC
 #define MAX_RX_QUEUES		16
 #define MAX_TX_QUEUES		16
@@ -63,6 +66,7 @@ struct dpaa2_dev_priv {
 	void *rx_vq[MAX_RX_QUEUES];
 	void *tx_vq[MAX_TX_QUEUES];
 
+	struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */
 	uint32_t options;
 	uint16_t num_dist_per_tc[MAX_TCS];
 	uint8_t max_mac_filters;
@@ -77,4 +81,6 @@ int dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
 int dpaa2_remove_flow_dist(struct rte_eth_dev *eth_dev,
 			   uint8_t tc_index);
 
+int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv, void *blist);
+
 #endif /* _DPAA2_DPNI_H_ */
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
index abc70ac..7e34ea8 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
@@ -50,6 +50,16 @@
 #define DPAA2_MBUF_MAX_ACQ_REL	7
 
 #define MAX_BPID 256
+#define DPAA2_MBUF_HW_ANNOTATION	64
+#define DPAA2_FD_PTA_SIZE		64
+
+#if (DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) > RTE_PKTMBUF_HEADROOM
+#error "Annotation requirement is more than RTE_PKTMBUF_HEADROOM"
+#endif
+
+/* we will re-use the HEADROOM for annotation in RX */
+#define DPAA2_HW_BUF_RESERVE	0
+#define DPAA2_PACKET_LAYOUT_ALIGN	64 /*changing from 256 */
 
 struct dpaa2_dpio_dev {
 	TAILQ_ENTRY(dpaa2_dpio_dev) next;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 65c3384..9080e56 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -46,8 +46,12 @@
 #include <rte_dpaa2.h>
 
 #include <dpaa2_logs.h>
+/* DPAA2 Base interface files */
 #include <base/dpaa2_hw_pvt.h>
+
+#include <base/dpaa2_hw_dpbp.h>
 #include <base/dpaa2_hw_dpni.h>
+
 /* DPDK Interfaces */
 #include <dpaa2_ethdev.h>
 
@@ -65,6 +69,8 @@
 	dev_info->if_index = priv->hw_id;
 
 	dev_info->max_mac_addrs = priv->max_mac_filters;
+	dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
+	dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 	dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 	dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 	dev_info->speed_capa = ETH_LINK_SPEED_1G |
@@ -188,6 +194,7 @@
 	struct dpni_queue cfg;
 	uint8_t options = 0;
 	uint8_t flow_id;
+	uint32_t bpid;
 	int ret;
 
 	PMD_INIT_FUNC_TRACE();
@@ -195,6 +202,13 @@
 	PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
 		     dev, rx_queue_id, mb_pool, rx_conf);
 
+	if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
+		bpid = mempool_to_bpid(mb_pool);
+		ret = dpaa2_attach_bp_list(priv,
+					   bpid_info[bpid].bp_list);
+		if (ret)
+			return ret;
+	}
 	dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 	dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 
@@ -389,7 +403,9 @@
 	struct fsl_mc_io *dpni_dev;
 	struct dpni_attr attr;
 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
+	struct dpni_buffer_layout layout;
 	int i, ret, hw_id;
+	int tot_size;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -478,6 +494,55 @@
 		return -ret;
 	}
 
+	/* ... rx buffer layout ... */
+	tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM;
+	tot_size = RTE_ALIGN_CEIL(tot_size,
+				  DPAA2_PACKET_LAYOUT_ALIGN);
+
+	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
+	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
+				DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
+				DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
+				DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
+
+	layout.pass_frame_status = 1;
+	layout.data_head_room = tot_size
+		- DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION;
+	layout.private_data_size = DPAA2_FD_PTA_SIZE;
+	layout.pass_parser_result = 1;
+	PMD_INIT_LOG(DEBUG, "Tot_size = %d, head room = %d, private = %d",
+		     tot_size, layout.data_head_room, layout.private_data_size);
+	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
+				     DPNI_QUEUE_RX, &layout);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Err(%d) in setting rx buffer layout", ret);
+		return -1;
+	}
+
+	/* ... tx buffer layout ... */
+	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
+	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	layout.pass_frame_status = 1;
+	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
+				     DPNI_QUEUE_TX, &layout);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer"
+				  " layout", ret);
+		return -1;
+	}
+
+	/* ... tx-conf and error buffer layout ... */
+	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
+	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	layout.pass_frame_status = 1;
+	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
+				     DPNI_QUEUE_TX_CONFIRM, &layout);
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer"
+				  " layout", ret);
+		return -1;
+	}
+
 	eth_dev->dev_ops = &dpaa2_ethdev_ops;
 	return 0;
 }
-- 
1.9.1

^ permalink raw reply related

* [PATCH 22/32] net/dpaa2: configure mac address at init
From: Hemant Agrawal @ 2016-12-04 18:17 UTC (permalink / raw)
  To: dev; +Cc: thomas.monjalon, bruce.richardson, shreyansh.jain, Hemant Agrawal
In-Reply-To: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/base/dpaa2_hw_dpni.h |  3 +++
 drivers/net/dpaa2/dpaa2_ethdev.c       | 26 ++++++++++++++++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni.h
index c109396..70d52b6 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.h
@@ -63,7 +63,10 @@ struct dpaa2_dev_priv {
 	void *rx_vq[MAX_RX_QUEUES];
 	void *tx_vq[MAX_TX_QUEUES];
 
+	uint32_t options;
 	uint16_t num_dist_per_tc[MAX_TCS];
+	uint8_t max_mac_filters;
+	uint8_t max_vlan_filters;
 	uint8_t num_tc;
 	uint8_t flags; /*dpaa2 config flags */
 };
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 094296a..65c3384 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -64,8 +64,12 @@
 	dev_info->driver_name = drivername;
 	dev_info->if_index = priv->hw_id;
 
+	dev_info->max_mac_addrs = priv->max_mac_filters;
 	dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 	dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
+	dev_info->speed_capa = ETH_LINK_SPEED_1G |
+			ETH_LINK_SPEED_2_5G |
+			ETH_LINK_SPEED_10G;
 }
 
 static int
@@ -444,6 +448,9 @@
 
 	priv->hw = dpni_dev;
 	priv->hw_id = hw_id;
+	priv->options = attr.options;
+	priv->max_mac_filters = attr.mac_filter_entries;
+	priv->max_vlan_filters = attr.vlan_filter_entries;
 	priv->flags = 0;
 
 	ret = dpaa2_alloc_rx_tx_queues(eth_dev);
@@ -452,6 +459,25 @@
 		return -ret;
 	}
 
+	/* Allocate memory for storing MAC addresses */
+	eth_dev->data->mac_addrs = rte_zmalloc("dpni",
+		ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
+	if (eth_dev->data->mac_addrs == NULL) {
+		PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
+						"store MAC addresses",
+				ETHER_ADDR_LEN * attr.mac_filter_entries);
+		return -ENOMEM;
+	}
+
+	ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
+					priv->token,
+			(uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
+	if (ret) {
+		PMD_INIT_LOG(ERR, "DPNI get mac address failed:"
+					" Error Code = %d\n", ret);
+		return -ret;
+	}
+
 	eth_dev->dev_ops = &dpaa2_ethdev_ops;
 	return 0;
 }
-- 
1.9.1

^ permalink raw reply related


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