* Re: [PATCH 1/2] ethdev: fix name index in xstats Api
From: Remy Horton @ 2017-01-03 10:03 UTC (permalink / raw)
To: Olivier Matz, dev, thomas.monjalon; +Cc: stable
In-Reply-To: <1481881454-17382-1-git-send-email-olivier.matz@6wind.com>
Been away, hence the somewhat late review..
On 16/12/2016 09:44, Olivier Matz wrote:
[..]
> Today, each 'id' returned by rte_eth_xstats_get() is equal to the index
> in the returned array, making this value useless. It also prevents a
> driver from having different indexes for names and value, like in the
> example below:
My original intention was to give free reign over what id numbers are
used, but for reasons I've now forgotten the implementation ended up
making everything sequential.
> CC: stable@dpdk.org
> Fixes: bd6aa172cf35 ("ethdev: fetch extended statistics with integer ids")
>
> Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Remy Horton <remy.horton@intel.com>
^ permalink raw reply
* Re: [PATCH v2 2/2] ethdev: clarify xstats Api documentation
From: Remy Horton @ 2017-01-03 10:03 UTC (permalink / raw)
To: Olivier Matz, dev, thomas.monjalon; +Cc: john.mcnamara, stable
In-Reply-To: <1482525348-32443-1-git-send-email-olivier.matz@6wind.com>
On 23/12/2016 20:35, Olivier Matz wrote:
> Reword the Api documentation of xstats ethdev.
>
> CC: stable@dpdk.org
> Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Remy Horton <remy.horton@intel.com>
^ permalink raw reply
* Re: XL710 with i40e driver drops packets on RX even on a small rates.
From: Martin Weiser @ 2017-01-03 12:18 UTC (permalink / raw)
To: dev
In-Reply-To: <36decaa4-44b4-de6a-0360-e9647720e419@samsung.com>
Hello,
we are also seeing this issue on one of our test systems while it does
not occur on other test systems with the same DPDK version (we tested
16.11 and current master).
The system that we can reproduce this issue on also has a X552 ixgbe NIC
which can forward the exact same traffic using the same testpmd
parameters without a problem.
Even if we install a 82599ES ixgbe NIC in the same PCI slot that the
XL710 was in the 82599ES can forward the traffic without any drops.
Like in the issue reported by Ilya all packet drops occur on the testpmd
side and are accounted as 'imissed'. Increasing the number of rx
descriptors only helps a little at low packet rates.
Drops start occurring at pretty low packet rates like 100000 packets per
second.
Any suggestions would be greatly appreciated.
Best regards,
Martin
On 22.08.16 14:06, Ilya Maximets wrote:
> Hello, All.
>
> I've faced with a really bad situation with packet drops on a small
> packet rates (~45 Kpps) while using XL710 NIC with i40e DPDK driver.
>
> The issue was found while testing PHY-VM-PHY scenario with OVS and
> confirmed on PHY-PHY scenario with testpmd.
>
> DPDK version 16.07 was used in all cases.
> XL710 firmware-version: f5.0.40043 a1.5 n5.04 e2505
>
> Test description (PHY-PHY):
>
> * Following cmdline was used:
>
> # n_desc=2048
> # ./testpmd -c 0xf -n 2 --socket-mem=8192,0 -w 0000:05:00.0 -v \
> -- --burst=32 --txd=${n_desc} --rxd=${n_desc} \
> --rxq=1 --txq=1 --nb-cores=1 \
> --eth-peer=0,a0:00:00:00:00:00 --forward-mode=mac
>
> * DPDK-Pktgen application was used as a traffic generator.
> Single flow generated.
>
> Results:
>
> * Packet size: 128B, rate: 90% of 10Gbps (~7.5 Mpps):
>
> On the generator's side:
>
> Total counts:
> Tx : 759034368 packets
> Rx : 759033239 packets
> Lost : 1129 packets
>
> Average rates:
> Tx : 7590344 pps
> Rx : 7590332 pps
> Lost : 11 pps
>
> All of this dropped packets are RX-dropped on testpmd's side:
>
> +++++++++++++++ Accumulated forward statistics for all ports+++++++++++++++
> RX-packets: 759033239 RX-dropped: 1129 RX-total: 759034368
> TX-packets: 759033239 TX-dropped: 0 TX-total: 759033239
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>
> At the same time 10G NIC with IXGBE driver works perfectly
> without any packet drops in the same scenario.
>
> Much worse situation with PHY-VM-PHY scenario with OVS:
>
> * testpmd application used inside guest to forward incoming packets.
> (almost same cmdline as for PHY-PHY)
>
> * For packet size 256 B on rate 1% of 10Gbps (~45 Kpps):
>
> Total counts:
> Tx : 1358112 packets
> Rx : 1357990 packets
> Lost : 122 packets
>
> Average rates:
> Tx : 45270 pps
> Rx : 45266 pps
> Lost : 4 pps
>
> All of this 122 dropped packets can be found in rx_dropped counter:
>
> # ovs-vsctl get interface dpdk0 statistics:rx_dropped
> 122
>
> And again, no issues with IXGBE on the exactly same scenario.
>
>
> Results of my investigation:
>
> * I found that all of this packets are 'imissed'. This means that rx
> descriptor ring was overflowed.
>
> * I've modified i40e driver to check the real number of free descriptors
> that was not still filled by the NIC and found that HW fills
> rx descriptors with uneven rate. Looks like it fills them using
> a huge batches.
>
> * So, root cause of packet drops with XL710 is somehow uneven rate of
> filling of the hw rx descriptors by the NIC. This leads to exhausting
> of rx descriptors and packet drops by the hardware. 10G IXGBE NIC works
> more smoothly and driver is able to refill hw ring with rx descriptors
> in time.
>
> * The issue becomes worse with OVS because of much bigger latencies
> between 'rte_eth_rx_burst()' calls.
>
> The easiest solution for this problem is to increase number of RX descriptors.
> Increasing up to 4096 eliminates packet drops but decreases the performance a lot:
>
> For OVS PHY-VM-PHY scenario by 10%
> For OVS PHY-PHY scenario by 20%
> For tespmd PHY-PHY scenario by 17% (22.1 Mpps --> 18.2 Mpps for 64B packets)
>
> As a result we have a trade-off between zero drop rate on small packet rates and
> the higher maximum performance that is very sad.
>
> Using of 16B descriptors doesn't really help with performance.
> Upgrading the firmware from version 4.4 to 5.04 didn't help with drops.
>
> Any thoughts? Can anyone reproduce this?
>
> Best regards, Ilya Maximets.
^ permalink raw reply
* Re: [PATCH v5 00/20] Decouple ethdev from PCI device
From: Ferruh Yigit @ 2017-01-03 12:20 UTC (permalink / raw)
To: Thomas Monjalon, Jan Blunck
Cc: dev, shreyansh.jain, david.marchand, stephen, Andrew Rybchenko,
Alejandro Lucero
In-Reply-To: <3218207.eTF77IRQHx@xps13>
On 12/25/2016 10:33 PM, Thomas Monjalon wrote:
> 2016-12-23 16:57, Jan Blunck:
>> This repost addresses the review comments of Thomas Monjalon to completely
>> remove the ethdev helper to further decrease the coupling of the ethdev and
>> the eal layers. This required me to squash together all patches using the
>> rte_eth_dev_to_pci() helper into "Decouple from PCI device" patch. As
>> discussed privately I'll keep the PCI information in rte_eth_dev_info
>> untouched.
>
> Applied with some trivial fixes, thanks
>
I rebased these changes into next-net tree. And need to update some sfc
and nfp patches [1] there.
Andrew, Alejandro,
Can you please review your driver in the latest next-net tree?
Thanks,
ferruh
[1]
nfp:
net/nfp: add Rx interrupts
sfc:
net/sfc: support link status change interrupt
net/sfc: interrupts support sufficient for event queue init
net/sfc: implement driver operation to init device on attach
net/sfc: libefx-based PMD stub sufficient to build and init
^ permalink raw reply
* Re: [PATCH v5 00/20] Decouple ethdev from PCI device
From: Ferruh Yigit @ 2017-01-03 12:24 UTC (permalink / raw)
To: Thomas Monjalon, Jan Blunck
Cc: dev, shreyansh.jain, david.marchand, stephen, Adrien Mazarguil,
Nelio Laranjeiro
In-Reply-To: <3218207.eTF77IRQHx@xps13>
On 12/25/2016 10:33 PM, Thomas Monjalon wrote:
> 2016-12-23 16:57, Jan Blunck:
>> This repost addresses the review comments of Thomas Monjalon to completely
>> remove the ethdev helper to further decrease the coupling of the ethdev and
>> the eal layers. This required me to squash together all patches using the
>> rte_eth_dev_to_pci() helper into "Decouple from PCI device" patch. As
>> discussed privately I'll keep the PCI information in rte_eth_dev_info
>> untouched.
>
> Applied with some trivial fixes, thanks
>
Getting following build error for mlx5 [1], it is mainly because verbs.h
also using container_of macro.
[1]
In file included from
.../x86_64-native-linuxapp-gcc/include/rte_mbuf.h:57:0,
from .../x86_64-native-linuxapp-gcc/include/rte_ether.h:52,
from .../drivers/net/mlx5/mlx5_trigger.c:38:
/usr/include/infiniband/verbs.h: In function ‘verbs_get_device’:
.../x86_64-native-linuxapp-gcc/include/rte_common.h:350:40: error:
initialization discards ‘const’ qualifier from pointer target type
[-Werror=discarded-qualifiers]
typeof(((type *)0)->member) *_ptr = (ptr); \
^
^ permalink raw reply
* [PATCH v3] crypto/aesni_gcm: migration from MB library to ISA-L
From: Piotr Azarewicz @ 2017-01-03 13:02 UTC (permalink / raw)
To: pablo.de.lara.guarch, dev
In-Reply-To: <1482864823-9164-1-git-send-email-michalx.k.jastrzebski@intel.com>
Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer
Crypto library.This patch reimplement the device using ISA-L Crypto
library: https://github.com/01org/isa-l_crypto.
The migration entailed the following additional support for:
* GMAC algorithm.
* 256-bit cipher key.
* Session-less mode.
* Out-of place processing
* Scatter-gatter support for chained mbufs (only out-of place and
destination mbuf must be contiguous)
Verified current unit tests and added new unit tests to verify new
functionalities.
Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
---
To be applied on top of:
[dpdk-dev] [PATCH v2 0/3] Fix iv sizes in crypto drivers capabilities
v3 changes:
- rebase on top of dpdk-next-crypto
v2 changes:
- implement native scatter-gatter support for chained mbufs (only out-of
place and destination mbuf must be contiguous)
- write unit test for session-less mode
- write unit test for out-of place processing
- add support for GMAC authentication algorithm
app/test/test_cryptodev.c | 739 +++++++++++++++++++---
app/test/test_cryptodev_gcm_test_vectors.h | 487 +++++++++++++-
doc/guides/cryptodevs/aesni_gcm.rst | 23 +-
doc/guides/rel_notes/release_17_02.rst | 13 +
drivers/crypto/aesni_gcm/Makefile | 8 +-
drivers/crypto/aesni_gcm/aesni_gcm_ops.h | 95 +--
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 307 ++++-----
drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 49 +-
drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h | 15 +-
mk/rte.app.mk | 3 +-
10 files changed, 1356 insertions(+), 383 deletions(-)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index ba6bbb5..ecbf765 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -3979,16 +3979,48 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
}
static int
+create_gcm_xforms(struct rte_crypto_op *op,
+ enum rte_crypto_cipher_operation cipher_op,
+ uint8_t *key, const uint8_t key_len,
+ const uint8_t aad_len, const uint8_t auth_len,
+ enum rte_crypto_auth_operation auth_op)
+{
+ TEST_ASSERT_NOT_NULL(rte_crypto_op_sym_xforms_alloc(op, 2),
+ "failed to allocate space for crypto transforms");
+
+ struct rte_crypto_sym_op *sym_op = op->sym;
+
+ /* Setup Cipher Parameters */
+ sym_op->xform->type = RTE_CRYPTO_SYM_XFORM_CIPHER;
+ sym_op->xform->cipher.algo = RTE_CRYPTO_CIPHER_AES_GCM;
+ sym_op->xform->cipher.op = cipher_op;
+ sym_op->xform->cipher.key.data = key;
+ sym_op->xform->cipher.key.length = key_len;
+
+ TEST_HEXDUMP(stdout, "key:", key, key_len);
+
+ /* Setup Authentication Parameters */
+ sym_op->xform->next->type = RTE_CRYPTO_SYM_XFORM_AUTH;
+ sym_op->xform->next->auth.algo = RTE_CRYPTO_AUTH_AES_GCM;
+ sym_op->xform->next->auth.op = auth_op;
+ sym_op->xform->next->auth.digest_length = auth_len;
+ sym_op->xform->next->auth.add_auth_data_length = aad_len;
+ sym_op->xform->next->auth.key.length = 0;
+ sym_op->xform->next->auth.key.data = NULL;
+ sym_op->xform->next->next = NULL;
+
+ return 0;
+}
+
+static int
create_gcm_operation(enum rte_crypto_cipher_operation op,
- const uint8_t *auth_tag, const unsigned auth_tag_len,
- const uint8_t *iv, const unsigned iv_len,
- const uint8_t *aad, const unsigned aad_len,
- const unsigned data_len, unsigned data_pad_len)
+ const struct gcm_test_data *tdata)
{
struct crypto_testsuite_params *ts_params = &testsuite_params;
struct crypto_unittest_params *ut_params = &unittest_params;
- unsigned iv_pad_len = 0, aad_buffer_len;
+ uint8_t *plaintext, *ciphertext;
+ unsigned int iv_pad_len, aad_pad_len, plaintext_pad_len;
/* Generate Crypto op data structure */
ut_params->op = rte_crypto_op_alloc(ts_params->op_mpool,
@@ -3998,63 +4030,118 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
struct rte_crypto_sym_op *sym_op = ut_params->op->sym;
- sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
- ut_params->ibuf, auth_tag_len);
- TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
- "no room to append digest");
- sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
- ut_params->ibuf, data_pad_len);
- sym_op->auth.digest.length = auth_tag_len;
-
- if (op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
- rte_memcpy(sym_op->auth.digest.data, auth_tag, auth_tag_len);
- TEST_HEXDUMP(stdout, "digest:",
- sym_op->auth.digest.data,
- sym_op->auth.digest.length);
- }
+ /* Append aad data */
+ aad_pad_len = RTE_ALIGN_CEIL(tdata->aad.len, 16);
+ sym_op->auth.aad.data = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+ aad_pad_len);
+ TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
+ "no room to append aad");
- /* iv */
- iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
+ sym_op->auth.aad.length = tdata->aad.len;
+ sym_op->auth.aad.phys_addr =
+ rte_pktmbuf_mtophys(ut_params->ibuf);
+ memcpy(sym_op->auth.aad.data, tdata->aad.data, tdata->aad.len);
+ TEST_HEXDUMP(stdout, "aad:", sym_op->auth.aad.data,
+ sym_op->auth.aad.length);
+ /* Prepend iv */
+ iv_pad_len = RTE_ALIGN_CEIL(tdata->iv.len, 16);
sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
ut_params->ibuf, iv_pad_len);
TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
memset(sym_op->cipher.iv.data, 0, iv_pad_len);
sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
- sym_op->cipher.iv.length = iv_len;
+ sym_op->cipher.iv.length = tdata->iv.len;
- rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+ rte_memcpy(sym_op->cipher.iv.data, tdata->iv.data, tdata->iv.len);
+ TEST_HEXDUMP(stdout, "iv:", sym_op->cipher.iv.data,
+ sym_op->cipher.iv.length);
- /*
- * Always allocate the aad up to the block size.
- * The cryptodev API calls out -
- * - the array must be big enough to hold the AAD, plus any
- * space to round this up to the nearest multiple of the
- * block size (16 bytes).
- */
- aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 16);
+ /* Append plaintext/ciphertext */
+ if (op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
+ plaintext_pad_len = RTE_ALIGN_CEIL(tdata->plaintext.len, 16);
+ plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+ plaintext_pad_len);
+ TEST_ASSERT_NOT_NULL(plaintext, "no room to append plaintext");
- sym_op->auth.aad.data = (uint8_t *)rte_pktmbuf_prepend(
- ut_params->ibuf, aad_buffer_len);
- TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
- "no room to prepend aad");
- sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
- ut_params->ibuf);
- sym_op->auth.aad.length = aad_len;
+ memcpy(plaintext, tdata->plaintext.data, tdata->plaintext.len);
+ TEST_HEXDUMP(stdout, "plaintext:", plaintext,
+ tdata->plaintext.len);
- memset(sym_op->auth.aad.data, 0, aad_buffer_len);
- rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
+ if (ut_params->obuf) {
+ ciphertext = (uint8_t *)rte_pktmbuf_append(
+ ut_params->obuf,
+ plaintext_pad_len + aad_pad_len +
+ iv_pad_len);
+ TEST_ASSERT_NOT_NULL(ciphertext,
+ "no room to append ciphertext");
- TEST_HEXDUMP(stdout, "iv:", sym_op->cipher.iv.data, iv_pad_len);
- TEST_HEXDUMP(stdout, "aad:",
- sym_op->auth.aad.data, aad_len);
+ memset(ciphertext + aad_pad_len + iv_pad_len, 0,
+ tdata->ciphertext.len);
+ }
+ } else {
+ plaintext_pad_len = RTE_ALIGN_CEIL(tdata->ciphertext.len, 16);
+ ciphertext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+ plaintext_pad_len);
+ TEST_ASSERT_NOT_NULL(ciphertext,
+ "no room to append ciphertext");
- sym_op->cipher.data.length = data_len;
- sym_op->cipher.data.offset = aad_buffer_len + iv_pad_len;
+ memcpy(ciphertext, tdata->ciphertext.data,
+ tdata->ciphertext.len);
+ TEST_HEXDUMP(stdout, "ciphertext:", ciphertext,
+ tdata->ciphertext.len);
- sym_op->auth.data.offset = aad_buffer_len + iv_pad_len;
- sym_op->auth.data.length = data_len;
+ if (ut_params->obuf) {
+ plaintext = (uint8_t *)rte_pktmbuf_append(
+ ut_params->obuf,
+ plaintext_pad_len + aad_pad_len +
+ iv_pad_len);
+ TEST_ASSERT_NOT_NULL(plaintext,
+ "no room to append plaintext");
+
+ memset(plaintext + aad_pad_len + iv_pad_len, 0,
+ tdata->plaintext.len);
+ }
+ }
+
+ /* Append digest data */
+ if (op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
+ sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
+ ut_params->obuf ? ut_params->obuf :
+ ut_params->ibuf,
+ tdata->auth_tag.len);
+ TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
+ "no room to append digest");
+ memset(sym_op->auth.digest.data, 0, tdata->auth_tag.len);
+ sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
+ ut_params->obuf ? ut_params->obuf :
+ ut_params->ibuf,
+ plaintext_pad_len +
+ aad_pad_len + iv_pad_len);
+ sym_op->auth.digest.length = tdata->auth_tag.len;
+ } else {
+ sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
+ ut_params->ibuf, tdata->auth_tag.len);
+ TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
+ "no room to append digest");
+ sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
+ ut_params->ibuf,
+ plaintext_pad_len + aad_pad_len + iv_pad_len);
+ sym_op->auth.digest.length = tdata->auth_tag.len;
+
+ rte_memcpy(sym_op->auth.digest.data, tdata->auth_tag.data,
+ tdata->auth_tag.len);
+ TEST_HEXDUMP(stdout, "digest:",
+ sym_op->auth.digest.data,
+ sym_op->auth.digest.length);
+ }
+
+ sym_op->cipher.data.length = tdata->plaintext.len;
+ sym_op->cipher.data.offset = aad_pad_len + iv_pad_len;
+
+ sym_op->auth.data.length = tdata->plaintext.len;
+ sym_op->auth.data.offset = aad_pad_len + iv_pad_len;
return 0;
}
@@ -4066,9 +4153,9 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
struct crypto_unittest_params *ut_params = &unittest_params;
int retval;
-
- uint8_t *plaintext, *ciphertext, *auth_tag;
+ uint8_t *ciphertext, *auth_tag;
uint16_t plaintext_pad_len;
+ uint32_t i;
/* Create GCM session */
retval = create_gcm_session(ts_params->valid_devs[0],
@@ -4079,31 +4166,20 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
if (retval < 0)
return retval;
-
- ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+ if (tdata->aad.len > MBUF_SIZE) {
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->large_mbuf_pool);
+ /* Populate full size of add data */
+ for (i = 32; i < GMC_MAX_AAD_LENGTH; i += 32)
+ memcpy(&tdata->aad.data[i], &tdata->aad.data[0], 32);
+ } else
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
/* clear mbuf payload */
memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
rte_pktmbuf_tailroom(ut_params->ibuf));
- /*
- * Append data which is padded to a multiple
- * of the algorithms block size
- */
- plaintext_pad_len = RTE_ALIGN_CEIL(tdata->plaintext.len, 16);
-
- plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
- plaintext_pad_len);
- memcpy(plaintext, tdata->plaintext.data, tdata->plaintext.len);
-
- TEST_HEXDUMP(stdout, "plaintext:", plaintext, tdata->plaintext.len);
-
- /* Create GCM opertaion */
- retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_ENCRYPT,
- tdata->auth_tag.data, tdata->auth_tag.len,
- tdata->iv.data, tdata->iv.len,
- tdata->aad.data, tdata->aad.len,
- tdata->plaintext.len, plaintext_pad_len);
+ /* Create GCM operation */
+ retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_ENCRYPT, tdata);
if (retval < 0)
return retval;
@@ -4118,14 +4194,18 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
"crypto op processing failed");
+ plaintext_pad_len = RTE_ALIGN_CEIL(tdata->plaintext.len, 16);
+
if (ut_params->op->sym->m_dst) {
ciphertext = rte_pktmbuf_mtod(ut_params->op->sym->m_dst,
uint8_t *);
auth_tag = rte_pktmbuf_mtod_offset(ut_params->op->sym->m_dst,
uint8_t *, plaintext_pad_len);
} else {
- ciphertext = plaintext;
- auth_tag = plaintext + plaintext_pad_len;
+ ciphertext = rte_pktmbuf_mtod_offset(ut_params->op->sym->m_src,
+ uint8_t *,
+ ut_params->op->sym->cipher.data.offset);
+ auth_tag = ciphertext + plaintext_pad_len;
}
TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, tdata->ciphertext.len);
@@ -4191,15 +4271,68 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
}
static int
+test_mb_AES_GCM_auth_encryption_test_case_256_1(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_1);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_256_2(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_2);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_256_3(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_3);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_256_4(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_4);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_256_5(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_5);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_256_6(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_6);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_256_7(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_256_7);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_aad_1(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_aad_1);
+}
+
+static int
+test_mb_AES_GCM_auth_encryption_test_case_aad_2(void)
+{
+ return test_mb_AES_GCM_authenticated_encryption(&gcm_test_case_aad_2);
+}
+
+static int
test_mb_AES_GCM_authenticated_decryption(const struct gcm_test_data *tdata)
{
struct crypto_testsuite_params *ts_params = &testsuite_params;
struct crypto_unittest_params *ut_params = &unittest_params;
int retval;
-
- uint8_t *plaintext, *ciphertext;
- uint16_t ciphertext_pad_len;
+ uint8_t *plaintext;
+ uint32_t i;
/* Create GCM session */
retval = create_gcm_session(ts_params->valid_devs[0],
@@ -4210,31 +4343,23 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
if (retval < 0)
return retval;
-
/* alloc mbuf and set payload */
- ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+ if (tdata->aad.len > MBUF_SIZE) {
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->large_mbuf_pool);
+ /* Populate full size of add data */
+ for (i = 32; i < GMC_MAX_AAD_LENGTH; i += 32)
+ memcpy(&tdata->aad.data[i], &tdata->aad.data[0], 32);
+ } else
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
rte_pktmbuf_tailroom(ut_params->ibuf));
- ciphertext_pad_len = RTE_ALIGN_CEIL(tdata->ciphertext.len, 16);
-
- ciphertext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
- ciphertext_pad_len);
- memcpy(ciphertext, tdata->ciphertext.data, tdata->ciphertext.len);
-
- TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, tdata->ciphertext.len);
-
- /* Create GCM opertaion */
- retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_DECRYPT,
- tdata->auth_tag.data, tdata->auth_tag.len,
- tdata->iv.data, tdata->iv.len,
- tdata->aad.data, tdata->aad.len,
- tdata->ciphertext.len, ciphertext_pad_len);
+ /* Create GCM operation */
+ retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_DECRYPT, tdata);
if (retval < 0)
return retval;
-
rte_crypto_op_attach_sym_session(ut_params->op, ut_params->sess);
ut_params->op->sym->m_src = ut_params->ibuf;
@@ -4250,7 +4375,9 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
plaintext = rte_pktmbuf_mtod(ut_params->op->sym->m_dst,
uint8_t *);
else
- plaintext = ciphertext;
+ plaintext = rte_pktmbuf_mtod_offset(ut_params->op->sym->m_src,
+ uint8_t *,
+ ut_params->op->sym->cipher.data.offset);
TEST_HEXDUMP(stdout, "plaintext:", plaintext, tdata->ciphertext.len);
@@ -4310,6 +4437,358 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
}
static int
+test_mb_AES_GCM_auth_decryption_test_case_256_1(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_1);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_256_2(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_2);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_256_3(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_3);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_256_4(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_4);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_256_5(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_5);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_256_6(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_6);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_256_7(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_256_7);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_aad_1(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_aad_1);
+}
+
+static int
+test_mb_AES_GCM_auth_decryption_test_case_aad_2(void)
+{
+ return test_mb_AES_GCM_authenticated_decryption(&gcm_test_case_aad_2);
+}
+
+static int
+test_AES_GCM_authenticated_encryption_oop(const struct gcm_test_data *tdata)
+{
+ struct crypto_testsuite_params *ts_params = &testsuite_params;
+ struct crypto_unittest_params *ut_params = &unittest_params;
+
+ int retval;
+ uint8_t *ciphertext, *auth_tag;
+ uint16_t plaintext_pad_len;
+
+ /* Create GCM session */
+ retval = create_gcm_session(ts_params->valid_devs[0],
+ RTE_CRYPTO_CIPHER_OP_ENCRYPT,
+ tdata->key.data, tdata->key.len,
+ tdata->aad.len, tdata->auth_tag.len,
+ RTE_CRYPTO_AUTH_OP_GENERATE);
+ if (retval < 0)
+ return retval;
+
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+ ut_params->obuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+ /* clear mbuf payload */
+ memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+ rte_pktmbuf_tailroom(ut_params->ibuf));
+ memset(rte_pktmbuf_mtod(ut_params->obuf, uint8_t *), 0,
+ rte_pktmbuf_tailroom(ut_params->obuf));
+
+ /* Create GCM operation */
+ retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_ENCRYPT, tdata);
+ if (retval < 0)
+ return retval;
+
+ rte_crypto_op_attach_sym_session(ut_params->op, ut_params->sess);
+
+ ut_params->op->sym->m_src = ut_params->ibuf;
+ ut_params->op->sym->m_dst = ut_params->obuf;
+
+ /* Process crypto operation */
+ TEST_ASSERT_NOT_NULL(process_crypto_request(ts_params->valid_devs[0],
+ ut_params->op), "failed to process sym crypto op");
+
+ TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
+ "crypto op processing failed");
+
+ plaintext_pad_len = RTE_ALIGN_CEIL(tdata->plaintext.len, 16);
+
+ ciphertext = rte_pktmbuf_mtod_offset(ut_params->obuf, uint8_t *,
+ ut_params->op->sym->cipher.data.offset);
+ auth_tag = ciphertext + plaintext_pad_len;
+
+ TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, tdata->ciphertext.len);
+ TEST_HEXDUMP(stdout, "auth tag:", auth_tag, tdata->auth_tag.len);
+
+ /* Validate obuf */
+ TEST_ASSERT_BUFFERS_ARE_EQUAL(
+ ciphertext,
+ tdata->ciphertext.data,
+ tdata->ciphertext.len,
+ "GCM Ciphertext data not as expected");
+
+ TEST_ASSERT_BUFFERS_ARE_EQUAL(
+ auth_tag,
+ tdata->auth_tag.data,
+ tdata->auth_tag.len,
+ "GCM Generated auth tag not as expected");
+
+ return 0;
+
+}
+
+static int
+test_mb_AES_GCM_authenticated_encryption_oop(void)
+{
+ return test_AES_GCM_authenticated_encryption_oop(&gcm_test_case_5);
+}
+
+static int
+test_AES_GCM_authenticated_decryption_oop(const struct gcm_test_data *tdata)
+{
+ struct crypto_testsuite_params *ts_params = &testsuite_params;
+ struct crypto_unittest_params *ut_params = &unittest_params;
+
+ int retval;
+ uint8_t *plaintext;
+
+ /* Create GCM session */
+ retval = create_gcm_session(ts_params->valid_devs[0],
+ RTE_CRYPTO_CIPHER_OP_DECRYPT,
+ tdata->key.data, tdata->key.len,
+ tdata->aad.len, tdata->auth_tag.len,
+ RTE_CRYPTO_AUTH_OP_VERIFY);
+ if (retval < 0)
+ return retval;
+
+ /* alloc mbuf and set payload */
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+ ut_params->obuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+ memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+ rte_pktmbuf_tailroom(ut_params->ibuf));
+ memset(rte_pktmbuf_mtod(ut_params->obuf, uint8_t *), 0,
+ rte_pktmbuf_tailroom(ut_params->obuf));
+
+ /* Create GCM operation */
+ retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_DECRYPT, tdata);
+ if (retval < 0)
+ return retval;
+
+ rte_crypto_op_attach_sym_session(ut_params->op, ut_params->sess);
+
+ ut_params->op->sym->m_src = ut_params->ibuf;
+ ut_params->op->sym->m_dst = ut_params->obuf;
+
+ /* Process crypto operation */
+ TEST_ASSERT_NOT_NULL(process_crypto_request(ts_params->valid_devs[0],
+ ut_params->op), "failed to process sym crypto op");
+
+ TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
+ "crypto op processing failed");
+
+ plaintext = rte_pktmbuf_mtod_offset(ut_params->obuf, uint8_t *,
+ ut_params->op->sym->cipher.data.offset);
+
+ TEST_HEXDUMP(stdout, "plaintext:", plaintext, tdata->ciphertext.len);
+
+ /* Validate obuf */
+ TEST_ASSERT_BUFFERS_ARE_EQUAL(
+ plaintext,
+ tdata->plaintext.data,
+ tdata->plaintext.len,
+ "GCM plaintext data not as expected");
+
+ TEST_ASSERT_EQUAL(ut_params->op->status,
+ RTE_CRYPTO_OP_STATUS_SUCCESS,
+ "GCM authentication failed");
+ return 0;
+}
+
+static int
+test_mb_AES_GCM_authenticated_decryption_oop(void)
+{
+ return test_AES_GCM_authenticated_decryption_oop(&gcm_test_case_5);
+}
+
+static int
+test_AES_GCM_authenticated_encryption_sessionless(
+ const struct gcm_test_data *tdata)
+{
+ struct crypto_testsuite_params *ts_params = &testsuite_params;
+ struct crypto_unittest_params *ut_params = &unittest_params;
+
+ int retval;
+ uint8_t *ciphertext, *auth_tag;
+ uint16_t plaintext_pad_len;
+ uint8_t key[tdata->key.len + 1];
+
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+ /* clear mbuf payload */
+ memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+ rte_pktmbuf_tailroom(ut_params->ibuf));
+
+ /* Create GCM operation */
+ retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_ENCRYPT, tdata);
+ if (retval < 0)
+ return retval;
+
+ /* Create GCM xforms */
+ memcpy(key, tdata->key.data, tdata->key.len);
+ retval = create_gcm_xforms(ut_params->op,
+ RTE_CRYPTO_CIPHER_OP_ENCRYPT,
+ key, tdata->key.len,
+ tdata->aad.len, tdata->auth_tag.len,
+ RTE_CRYPTO_AUTH_OP_GENERATE);
+ if (retval < 0)
+ return retval;
+
+ ut_params->op->sym->m_src = ut_params->ibuf;
+
+ TEST_ASSERT_EQUAL(ut_params->op->sym->sess_type,
+ RTE_CRYPTO_SYM_OP_SESSIONLESS,
+ "crypto op session type not sessionless");
+
+ /* Process crypto operation */
+ TEST_ASSERT_NOT_NULL(process_crypto_request(ts_params->valid_devs[0],
+ ut_params->op), "failed to process sym crypto op");
+
+ TEST_ASSERT_NOT_NULL(ut_params->op, "failed crypto process");
+
+ TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
+ "crypto op status not success");
+
+ plaintext_pad_len = RTE_ALIGN_CEIL(tdata->plaintext.len, 16);
+
+ ciphertext = rte_pktmbuf_mtod_offset(ut_params->ibuf, uint8_t *,
+ ut_params->op->sym->cipher.data.offset);
+ auth_tag = ciphertext + plaintext_pad_len;
+
+ TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, tdata->ciphertext.len);
+ TEST_HEXDUMP(stdout, "auth tag:", auth_tag, tdata->auth_tag.len);
+
+ /* Validate obuf */
+ TEST_ASSERT_BUFFERS_ARE_EQUAL(
+ ciphertext,
+ tdata->ciphertext.data,
+ tdata->ciphertext.len,
+ "GCM Ciphertext data not as expected");
+
+ TEST_ASSERT_BUFFERS_ARE_EQUAL(
+ auth_tag,
+ tdata->auth_tag.data,
+ tdata->auth_tag.len,
+ "GCM Generated auth tag not as expected");
+
+ return 0;
+
+}
+
+static int
+test_mb_AES_GCM_authenticated_encryption_sessionless(void)
+{
+ return test_AES_GCM_authenticated_encryption_sessionless(
+ &gcm_test_case_5);
+}
+
+static int
+test_AES_GCM_authenticated_decryption_sessionless(
+ const struct gcm_test_data *tdata)
+{
+ struct crypto_testsuite_params *ts_params = &testsuite_params;
+ struct crypto_unittest_params *ut_params = &unittest_params;
+
+ int retval;
+ uint8_t *plaintext;
+ uint8_t key[tdata->key.len + 1];
+
+ /* alloc mbuf and set payload */
+ ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+ memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+ rte_pktmbuf_tailroom(ut_params->ibuf));
+
+ /* Create GCM operation */
+ retval = create_gcm_operation(RTE_CRYPTO_CIPHER_OP_DECRYPT, tdata);
+ if (retval < 0)
+ return retval;
+
+ /* Create GCM xforms */
+ memcpy(key, tdata->key.data, tdata->key.len);
+ retval = create_gcm_xforms(ut_params->op,
+ RTE_CRYPTO_CIPHER_OP_DECRYPT,
+ key, tdata->key.len,
+ tdata->aad.len, tdata->auth_tag.len,
+ RTE_CRYPTO_AUTH_OP_VERIFY);
+ if (retval < 0)
+ return retval;
+
+ ut_params->op->sym->m_src = ut_params->ibuf;
+
+ TEST_ASSERT_EQUAL(ut_params->op->sym->sess_type,
+ RTE_CRYPTO_SYM_OP_SESSIONLESS,
+ "crypto op session type not sessionless");
+
+ /* Process crypto operation */
+ TEST_ASSERT_NOT_NULL(process_crypto_request(ts_params->valid_devs[0],
+ ut_params->op), "failed to process sym crypto op");
+
+ TEST_ASSERT_NOT_NULL(ut_params->op, "failed crypto process");
+
+ TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
+ "crypto op status not success");
+
+ plaintext = rte_pktmbuf_mtod_offset(ut_params->ibuf, uint8_t *,
+ ut_params->op->sym->cipher.data.offset);
+
+ TEST_HEXDUMP(stdout, "plaintext:", plaintext, tdata->ciphertext.len);
+
+ /* Validate obuf */
+ TEST_ASSERT_BUFFERS_ARE_EQUAL(
+ plaintext,
+ tdata->plaintext.data,
+ tdata->plaintext.len,
+ "GCM plaintext data not as expected");
+
+ TEST_ASSERT_EQUAL(ut_params->op->status,
+ RTE_CRYPTO_OP_STATUS_SUCCESS,
+ "GCM authentication failed");
+ return 0;
+}
+
+static int
+test_mb_AES_GCM_authenticated_decryption_sessionless(void)
+{
+ return test_AES_GCM_authenticated_decryption_sessionless(
+ &gcm_test_case_5);
+}
+
+static int
test_stats(void)
{
struct crypto_testsuite_params *ts_params = &testsuite_params;
@@ -6740,6 +7219,82 @@ struct test_crypto_vector {
TEST_CASE_ST(ut_setup, ut_teardown,
test_mb_AES_GCM_authenticated_decryption_test_case_7),
+ /** AES GCM Authenticated Encryption 256 bits key */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_2),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_3),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_4),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_5),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_6),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_7),
+
+ /** AES GCM Authenticated Decryption 256 bits key */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_2),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_3),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_4),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_5),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_6),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_256_7),
+
+ /** AES GCM Authenticated Encryption big aad size */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_aad_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_aad_2),
+
+ /** AES GCM Authenticated Decryption big aad size */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_aad_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_decryption_test_case_aad_2),
+
+ /** AES GMAC Authentication */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GMAC_authentication_test_case_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GMAC_authentication_verify_test_case_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GMAC_authentication_test_case_3),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GMAC_authentication_verify_test_case_3),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GMAC_authentication_test_case_4),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GMAC_authentication_verify_test_case_4),
+
+ /** Negative tests */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ authentication_verify_AES128_GMAC_fail_data_corrupt),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ authentication_verify_AES128_GMAC_fail_tag_corrupt),
+
+ /** Out of place tests */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_oop),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_oop),
+
+ /** Session-less tests */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_sessionless),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_sessionless),
+
TEST_CASES_END() /**< NULL terminate unit test array */
}
};
diff --git a/app/test/test_cryptodev_gcm_test_vectors.h b/app/test/test_cryptodev_gcm_test_vectors.h
index df984fc..3cb004e 100644
--- a/app/test/test_cryptodev_gcm_test_vectors.h
+++ b/app/test/test_cryptodev_gcm_test_vectors.h
@@ -33,7 +33,17 @@
#ifndef TEST_CRYPTODEV_GCM_TEST_VECTORS_H_
#define TEST_CRYPTODEV_GCM_TEST_VECTORS_H_
-#define GMAC_LARGE_PLAINTEXT_LENGTH 65376
+#define GMAC_LARGE_PLAINTEXT_LENGTH 65344
+#define GMC_MAX_AAD_LENGTH 65536
+#define GMC_LARGE_AAD_LENGTH 65296
+
+static uint8_t gcm_aad_zero_text[GMC_MAX_AAD_LENGTH] = { 0 };
+
+static uint8_t gcm_aad_text[GMC_MAX_AAD_LENGTH] = {
+ 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef,
+ 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef,
+ 0x00, 0xf1, 0xe2, 0xd3, 0xc4, 0xb5, 0xa6, 0x97,
+ 0x88, 0x79, 0x6a, 0x5b, 0x4c, 0x3d, 0x2e, 0x1f };
struct gcm_test_data {
@@ -48,7 +58,7 @@ struct gcm_test_data {
} iv;
struct {
- uint8_t data[64];
+ uint8_t *data;
unsigned len;
} aad;
@@ -111,7 +121,7 @@ struct gmac_test_data {
.len = 12
},
.aad = {
- .data = { 0 },
+ .data = gcm_aad_zero_text,
.len = 0
},
.plaintext = {
@@ -148,7 +158,7 @@ struct gmac_test_data {
.len = 12
},
.aad = {
- .data = { 0 },
+ .data = gcm_aad_zero_text,
.len = 0
},
.plaintext = {
@@ -186,7 +196,7 @@ struct gmac_test_data {
.len = 12
},
.aad = {
- .data = { 0 },
+ .data = gcm_aad_zero_text,
.len = 0
},
.plaintext = {
@@ -238,8 +248,7 @@ struct gmac_test_data {
.len = 12
},
.aad = {
- .data = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+ .data = gcm_aad_zero_text,
.len = 8
},
.plaintext = {
@@ -294,8 +303,7 @@ struct gmac_test_data {
.len = 12
},
.aad = {
- .data = {
- 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef },
+ .data = gcm_aad_text,
.len = 8
},
.plaintext = {
@@ -346,15 +354,11 @@ struct gmac_test_data {
.iv = {
.data = {
0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
- 0xde, 0xca, 0xf8, 0x88
- },
+ 0xde, 0xca, 0xf8, 0x88 },
.len = 12
},
.aad = {
- .data = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00
- },
+ .data = gcm_aad_zero_text,
.len = 12
},
.plaintext = {
@@ -409,10 +413,7 @@ struct gmac_test_data {
.len = 12
},
.aad = {
- .data = {
- 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef,
- 0xfe, 0xed, 0xfa, 0xce
- },
+ .data = gcm_aad_text,
.len = 12
},
.plaintext = {
@@ -450,6 +451,450 @@ struct gmac_test_data {
}
};
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_1 = {
+ .key = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_zero_text,
+ .len = 0
+ },
+ .plaintext = {
+ .data = { 0x00 },
+ .len = 0
+ },
+ .ciphertext = {
+ .data = { 0x00 },
+ .len = 0
+ },
+ .auth_tag = {
+ .data = {
+ 0x53, 0x0F, 0x8A, 0xFB, 0xC7, 0x45, 0x36, 0xB9,
+ 0xA9, 0x63, 0xB4, 0xF1, 0xC4, 0xCB, 0x73, 0x8B },
+ .len = 16
+ }
+};
+
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_2 = {
+ .key = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_zero_text,
+ .len = 0
+ },
+ .plaintext = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+ .len = 16
+ },
+ .ciphertext = {
+ .data = {
+ 0xCE, 0xA7, 0x40, 0x3D, 0x4D, 0x60, 0x6B, 0x6E,
+ 0x07, 0x4E, 0xC5, 0xD3, 0xBA, 0xF3, 0x9D, 0x18 },
+ .len = 16
+ },
+ .auth_tag = {
+ .data = {
+ 0xD0, 0xD1, 0xC8, 0xA7, 0x99, 0x99, 0x6B, 0xF0,
+ 0x26, 0x5B, 0x98, 0xB5, 0xD4, 0x8A, 0xB9, 0x19 },
+ .len = 16
+ }
+};
+
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_3 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_zero_text,
+ .len = 0
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39, 0x1a, 0xaf, 0xd2, 0x55 },
+ .len = 64
+ },
+ .ciphertext = {
+ .data = {
+ 0x05, 0xA2, 0x39, 0xA5, 0xE1, 0x1A, 0x74, 0xEA,
+ 0x6B, 0x2A, 0x55, 0xF6, 0xD7, 0x88, 0x44, 0x7E,
+ 0x93, 0x7E, 0x23, 0x64, 0x8D, 0xF8, 0xD4, 0x04,
+ 0x3B, 0x40, 0xEF, 0x6D, 0x7C, 0x6B, 0xF3, 0xB9,
+ 0x50, 0x15, 0x97, 0x5D, 0xB8, 0x28, 0xA1, 0xD5,
+ 0x22, 0xDE, 0x36, 0x26, 0xD0, 0x6A, 0x7A, 0xC0,
+ 0xB5, 0x14, 0x36, 0xAF, 0x3A, 0xC6, 0x50, 0xAB,
+ 0xFA, 0x47, 0xC8, 0x2E, 0xF0, 0x68, 0xE1, 0x3E },
+ .len = 64
+ },
+ .auth_tag = {
+ .data = {
+ 0x64, 0xAF, 0x1D, 0xFB, 0xE8, 0x0D, 0x37, 0xD8,
+ 0x92, 0xC3, 0xB9, 0x1D, 0xD3, 0x08, 0xAB, 0xFC },
+ .len = 16
+ }
+};
+
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_4 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_zero_text,
+ .len = 8
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39 },
+ .len = 60
+ },
+ .ciphertext = {
+ .data = {
+ 0x05, 0xA2, 0x39, 0xA5, 0xE1, 0x1A, 0x74, 0xEA,
+ 0x6B, 0x2A, 0x55, 0xF6, 0xD7, 0x88, 0x44, 0x7E,
+ 0x93, 0x7E, 0x23, 0x64, 0x8D, 0xF8, 0xD4, 0x04,
+ 0x3B, 0x40, 0xEF, 0x6D, 0x7C, 0x6B, 0xF3, 0xB9,
+ 0x50, 0x15, 0x97, 0x5D, 0xB8, 0x28, 0xA1, 0xD5,
+ 0x22, 0xDE, 0x36, 0x26, 0xD0, 0x6A, 0x7A, 0xC0,
+ 0xB5, 0x14, 0x36, 0xAF, 0x3A, 0xC6, 0x50, 0xAB,
+ 0xFA, 0x47, 0xC8, 0x2E },
+ .len = 60
+ },
+ .auth_tag = {
+ .data = {
+ 0x63, 0x16, 0x91, 0xAE, 0x17, 0x05, 0x5E, 0xA6,
+ 0x6D, 0x0A, 0x51, 0xE2, 0x50, 0x21, 0x85, 0x4A },
+ .len = 16
+ }
+
+};
+
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_5 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_text,
+ .len = 8
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39 },
+ .len = 60
+ },
+ .ciphertext = {
+ .data = {
+ 0x05, 0xA2, 0x39, 0xA5, 0xE1, 0x1A, 0x74, 0xEA,
+ 0x6B, 0x2A, 0x55, 0xF6, 0xD7, 0x88, 0x44, 0x7E,
+ 0x93, 0x7E, 0x23, 0x64, 0x8D, 0xF8, 0xD4, 0x04,
+ 0x3B, 0x40, 0xEF, 0x6D, 0x7C, 0x6B, 0xF3, 0xB9,
+ 0x50, 0x15, 0x97, 0x5D, 0xB8, 0x28, 0xA1, 0xD5,
+ 0x22, 0xDE, 0x36, 0x26, 0xD0, 0x6A, 0x7A, 0xC0,
+ 0xB5, 0x14, 0x36, 0xAF, 0x3A, 0xC6, 0x50, 0xAB,
+ 0xFA, 0x47, 0xC8, 0x2E },
+ .len = 60
+ },
+ .auth_tag = {
+ .data = {
+ 0xA7, 0x99, 0xAC, 0xB8, 0x27, 0xDA, 0xB1, 0x82,
+ 0x79, 0xFD, 0x83, 0x73, 0x52, 0x4D, 0xDB, 0xF1 },
+ .len = 16
+ }
+
+};
+
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_6 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_zero_text,
+ .len = 12
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39 },
+ .len = 60
+ },
+ .ciphertext = {
+ .data = {
+ 0x05, 0xA2, 0x39, 0xA5, 0xE1, 0x1A, 0x74, 0xEA,
+ 0x6B, 0x2A, 0x55, 0xF6, 0xD7, 0x88, 0x44, 0x7E,
+ 0x93, 0x7E, 0x23, 0x64, 0x8D, 0xF8, 0xD4, 0x04,
+ 0x3B, 0x40, 0xEF, 0x6D, 0x7C, 0x6B, 0xF3, 0xB9,
+ 0x50, 0x15, 0x97, 0x5D, 0xB8, 0x28, 0xA1, 0xD5,
+ 0x22, 0xDE, 0x36, 0x26, 0xD0, 0x6A, 0x7A, 0xC0,
+ 0xB5, 0x14, 0x36, 0xAF, 0x3A, 0xC6, 0x50, 0xAB,
+ 0xFA, 0x47, 0xC8, 0x2E },
+ .len = 60
+ },
+ .auth_tag = {
+ .data = {
+ 0x5D, 0xA5, 0x0E, 0x53, 0x64, 0x7F, 0x3F, 0xAE,
+ 0x1A, 0x1F, 0xC0, 0xB0, 0xD8, 0xBE, 0xF2, 0x64 },
+ .len = 16
+ }
+};
+
+/** AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_256_7 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_text,
+ .len = 12
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39 },
+ .len = 60
+ },
+ .ciphertext = {
+ .data = {
+ 0x05, 0xA2, 0x39, 0xA5, 0xE1, 0x1A, 0x74, 0xEA,
+ 0x6B, 0x2A, 0x55, 0xF6, 0xD7, 0x88, 0x44, 0x7E,
+ 0x93, 0x7E, 0x23, 0x64, 0x8D, 0xF8, 0xD4, 0x04,
+ 0x3B, 0x40, 0xEF, 0x6D, 0x7C, 0x6B, 0xF3, 0xB9,
+ 0x50, 0x15, 0x97, 0x5D, 0xB8, 0x28, 0xA1, 0xD5,
+ 0x22, 0xDE, 0x36, 0x26, 0xD0, 0x6A, 0x7A, 0xC0,
+ 0xB5, 0x14, 0x36, 0xAF, 0x3A, 0xC6, 0x50, 0xAB,
+ 0xFA, 0x47, 0xC8, 0x2E },
+ .len = 60
+ },
+ .auth_tag = {
+ .data = {
+ 0x4E, 0xD0, 0x91, 0x95, 0x83, 0xA9, 0x38, 0x72,
+ 0x09, 0xA9, 0xCE, 0x5F, 0x89, 0x06, 0x4E, 0xC8 },
+ .len = 16
+ }
+};
+
+/** variable AAD AES-128 Test Vectors */
+static const struct gcm_test_data gcm_test_case_aad_1 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08 },
+ .len = 16
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_text,
+ .len = GMC_LARGE_AAD_LENGTH
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39, 0x1a, 0xaf, 0xd2, 0x55 },
+ .len = 64
+ },
+ .ciphertext = {
+ .data = {
+ 0x42, 0x83, 0x1E, 0xC2, 0x21, 0x77, 0x74, 0x24,
+ 0x4B, 0x72, 0x21, 0xB7, 0x84, 0xD0, 0xD4, 0x9C,
+ 0xE3, 0xAA, 0x21, 0x2F, 0x2C, 0x02, 0xA4, 0xE0,
+ 0x35, 0xC1, 0x7E, 0x23, 0x29, 0xAC, 0xA1, 0x2E,
+ 0x21, 0xD5, 0x14, 0xB2, 0x54, 0x66, 0x93, 0x1C,
+ 0x7D, 0x8F, 0x6A, 0x5A, 0xAC, 0x84, 0xAA, 0x05,
+ 0x1B, 0xA3, 0x0B, 0x39, 0x6A, 0x0A, 0xAC, 0x97,
+ 0x3D, 0x58, 0xE0, 0x91, 0x47, 0x3F, 0x59, 0x85
+ },
+ .len = 64
+ },
+ .auth_tag = {
+ .data = {
+ 0xCA, 0x70, 0xAF, 0x96, 0xA8, 0x5D, 0x40, 0x47,
+ 0x0C, 0x3C, 0x48, 0xF5, 0xF0, 0xF5, 0xA5, 0x7D
+ },
+ .len = 16
+ }
+};
+
+/** variable AAD AES-256 Test Vectors */
+static const struct gcm_test_data gcm_test_case_aad_2 = {
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 },
+ .len = 12
+ },
+ .aad = {
+ .data = gcm_aad_text,
+ .len = GMC_LARGE_AAD_LENGTH
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39, 0x1a, 0xaf, 0xd2, 0x55 },
+ .len = 64
+ },
+ .ciphertext = {
+ .data = {
+ 0x05, 0xA2, 0x39, 0xA5, 0xE1, 0x1A, 0x74, 0xEA,
+ 0x6B, 0x2A, 0x55, 0xF6, 0xD7, 0x88, 0x44, 0x7E,
+ 0x93, 0x7E, 0x23, 0x64, 0x8D, 0xF8, 0xD4, 0x04,
+ 0x3B, 0x40, 0xEF, 0x6D, 0x7C, 0x6B, 0xF3, 0xB9,
+ 0x50, 0x15, 0x97, 0x5D, 0xB8, 0x28, 0xA1, 0xD5,
+ 0x22, 0xDE, 0x36, 0x26, 0xD0, 0x6A, 0x7A, 0xC0,
+ 0xB5, 0x14, 0x36, 0xAF, 0x3A, 0xC6, 0x50, 0xAB,
+ 0xFA, 0x47, 0xC8, 0x2E, 0xF0, 0x68, 0xE1, 0x3E
+ },
+ .len = 64
+ },
+ .auth_tag = {
+ .data = {
+ 0xBA, 0x06, 0xDA, 0xA1, 0x91, 0xE1, 0xFE, 0x22,
+ 0x59, 0xDA, 0x67, 0xAF, 0x9D, 0xA5, 0x43, 0x94
+ },
+ .len = 16
+ }
+};
+
/** GMAC Test Vectors */
static uint8_t gmac_plaintext[GMAC_LARGE_PLAINTEXT_LENGTH] = {
0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
@@ -1228,8 +1673,8 @@ struct cryptodev_perf_test_data {
},
.gmac_tag = {
.data = {
- 0x88, 0x82, 0xb4, 0x93, 0x8f, 0x04, 0xcd, 0x06,
- 0xfd, 0xac, 0x6d, 0x8b, 0x9c, 0x9e, 0x8f, 0xec
+ 0x3f, 0x07, 0xcb, 0xb9, 0x86, 0x3a, 0xea, 0xc2,
+ 0x2f, 0x3a, 0x2a, 0x93, 0xd8, 0x09, 0x6b, 0xda
},
.len = 16
}
diff --git a/doc/guides/cryptodevs/aesni_gcm.rst b/doc/guides/cryptodevs/aesni_gcm.rst
index 04bf43c..184b71c 100644
--- a/doc/guides/cryptodevs/aesni_gcm.rst
+++ b/doc/guides/cryptodevs/aesni_gcm.rst
@@ -32,10 +32,8 @@ AES-NI GCM Crypto Poll Mode Driver
The AES-NI GCM PMD (**librte_pmd_aesni_gcm**) provides poll mode crypto driver
-support for utilizing Intel multi buffer library (see AES-NI Multi-buffer PMD documentation
-to learn more about it, including installation).
-
-The AES-NI GCM PMD has current only been tested on Fedora 21 64-bit with gcc.
+support for utilizing Intel ISA-L crypto library, which provides operation acceleration
+through the AES-NI instruction sets for AES-GCM authenticated cipher algorithm.
Features
--------
@@ -49,16 +47,21 @@ Cipher algorithms:
Authentication algorithms:
* RTE_CRYPTO_AUTH_AES_GCM
+* RTE_CRYPTO_AUTH_AES_GMAC
+
+Installation
+------------
+
+To build DPDK with the AESNI_GCM_PMD the user is required to install
+the ``libisal_crypto`` library in the build environment.
+For download and more details please visit `<https://github.com/01org/isa-l_crypto>`_.
Initialization
--------------
In order to enable this virtual crypto PMD, user must:
-* Export the environmental variable AESNI_MULTI_BUFFER_LIB_PATH with the path where
- the library was extracted.
-
-* Build the multi buffer library (go to Installation section in AES-NI MB PMD documentation).
+* Install the ISA-L crypto library (explained in Installation section).
* Set CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=y in config/common_base.
@@ -86,9 +89,7 @@ Example:
Limitations
-----------
-* Chained mbufs are not supported.
+* Chained mbufs are supported but only out-of-place (destination mbuf must be contiguous).
* Hash only is not supported.
* Cipher only is not supported.
-* Only in-place is currently supported (destination address is the same as source address).
-* Only supports session-oriented API implementation (session-less APIs are not supported).
* Not performance tuned.
diff --git a/doc/guides/rel_notes/release_17_02.rst b/doc/guides/rel_notes/release_17_02.rst
index 5ab7019..fad945b 100644
--- a/doc/guides/rel_notes/release_17_02.rst
+++ b/doc/guides/rel_notes/release_17_02.rst
@@ -68,6 +68,19 @@ New Features
* Support for single operations (cipher only and authentication only).
+* **Updated the AES-NI GCM PMD.**
+
+ The AES-NI GCM PMD was migrated from MB library to ISA-L library.
+ The migration entailed the following additional support for:
+
+ * GMAC algorithm.
+ * 256-bit cipher key.
+ * Session-less mode.
+ * Out-of place processing
+ * Scatter-gatter support for chained mbufs (only out-of place and destination
+ mbuf must be contiguous)
+
+
Resolved Issues
---------------
diff --git a/drivers/crypto/aesni_gcm/Makefile b/drivers/crypto/aesni_gcm/Makefile
index 5898cae..fb17fbf 100644
--- a/drivers/crypto/aesni_gcm/Makefile
+++ b/drivers/crypto/aesni_gcm/Makefile
@@ -31,9 +31,6 @@
include $(RTE_SDK)/mk/rte.vars.mk
ifneq ($(MAKECMDGOALS),clean)
-ifeq ($(AESNI_MULTI_BUFFER_LIB_PATH),)
-$(error "Please define AESNI_MULTI_BUFFER_LIB_PATH environment variable")
-endif
endif
# library name
@@ -50,10 +47,7 @@ LIBABIVER := 1
EXPORT_MAP := rte_pmd_aesni_gcm_version.map
# external library dependencies
-CFLAGS += -I$(AESNI_MULTI_BUFFER_LIB_PATH)
-CFLAGS += -I$(AESNI_MULTI_BUFFER_LIB_PATH)/include
-LDLIBS += -L$(AESNI_MULTI_BUFFER_LIB_PATH) -lIPSec_MB
-LDLIBS += -lcrypto
+LDLIBS += -lisal_crypto
# library source files
SRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += aesni_gcm_pmd.c
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_ops.h b/drivers/crypto/aesni_gcm/aesni_gcm_ops.h
index c399068..e9de654 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_ops.h
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_ops.h
@@ -37,91 +37,26 @@
#define LINUX
#endif
-#include <gcm_defines.h>
-#include <aux_funcs.h>
+#include <isa-l_crypto/aes_gcm.h>
-/** Supported vector modes */
-enum aesni_gcm_vector_mode {
- RTE_AESNI_GCM_NOT_SUPPORTED = 0,
- RTE_AESNI_GCM_SSE,
- RTE_AESNI_GCM_AVX,
- RTE_AESNI_GCM_AVX2
-};
-
-typedef void (*aes_keyexp_128_enc_t)(void *key, void *enc_exp_keys);
+typedef void (*aesni_gcm_init_t)(struct gcm_data *my_ctx_data,
+ uint8_t *iv,
+ uint8_t const *aad,
+ uint64_t aad_len);
-typedef void (*aesni_gcm_t)(gcm_data *my_ctx_data, u8 *out, const u8 *in,
- u64 plaintext_len, u8 *iv, const u8 *aad, u64 aad_len,
- u8 *auth_tag, u64 auth_tag_len);
+typedef void (*aesni_gcm_update_t)(struct gcm_data *my_ctx_data,
+ uint8_t *out,
+ const uint8_t *in,
+ uint64_t plaintext_len);
-typedef void (*aesni_gcm_precomp_t)(gcm_data *my_ctx_data, u8 *hash_subkey);
+typedef void (*aesni_gcm_finalize_t)(struct gcm_data *my_ctx_data,
+ uint8_t *auth_tag,
+ uint64_t auth_tag_len);
-/** GCM library function pointer table */
struct aesni_gcm_ops {
- struct {
- struct {
- aes_keyexp_128_enc_t aes128_enc;
- /**< AES128 enc key expansion */
- } keyexp;
- /**< Key expansion functions */
- } aux; /**< Auxiliary functions */
-
- struct {
- aesni_gcm_t enc; /**< GCM encode function pointer */
- aesni_gcm_t dec; /**< GCM decode function pointer */
- aesni_gcm_precomp_t precomp; /**< GCM pre-compute */
- } gcm; /**< GCM functions */
+ aesni_gcm_init_t init;
+ aesni_gcm_update_t update;
+ aesni_gcm_finalize_t finalize;
};
-
-static const struct aesni_gcm_ops gcm_ops[] = {
- [RTE_AESNI_GCM_NOT_SUPPORTED] = {
- .aux = {
- .keyexp = {
- NULL
- }
- },
- .gcm = {
- NULL
- }
- },
- [RTE_AESNI_GCM_SSE] = {
- .aux = {
- .keyexp = {
- aes_keyexp_128_enc_sse
- }
- },
- .gcm = {
- aesni_gcm_enc_sse,
- aesni_gcm_dec_sse,
- aesni_gcm_precomp_sse
- }
- },
- [RTE_AESNI_GCM_AVX] = {
- .aux = {
- .keyexp = {
- aes_keyexp_128_enc_avx,
- }
- },
- .gcm = {
- aesni_gcm_enc_avx_gen2,
- aesni_gcm_dec_avx_gen2,
- aesni_gcm_precomp_avx_gen2
- }
- },
- [RTE_AESNI_GCM_AVX2] = {
- .aux = {
- .keyexp = {
- aes_keyexp_128_enc_avx2,
- }
- },
- .gcm = {
- aesni_gcm_enc_avx_gen4,
- aesni_gcm_dec_avx_gen4,
- aesni_gcm_precomp_avx_gen4
- }
- }
-};
-
-
#endif /* _AESNI_GCM_OPS_H_ */
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index af3d60f..0c501a5 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -30,8 +30,6 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <openssl/aes.h>
-
#include <rte_common.h>
#include <rte_config.h>
#include <rte_hexdump.h>
@@ -44,6 +42,34 @@
#include "aesni_gcm_pmd_private.h"
+/** GCM encode functions pointer table */
+static const struct aesni_gcm_ops aesni_gcm_enc[] = {
+ [AESNI_GCM_KEY_128] = {
+ aesni_gcm128_init,
+ aesni_gcm128_enc_update,
+ aesni_gcm128_enc_finalize
+ },
+ [AESNI_GCM_KEY_256] = {
+ aesni_gcm256_init,
+ aesni_gcm256_enc_update,
+ aesni_gcm256_enc_finalize
+ }
+};
+
+/** GCM decode functions pointer table */
+static const struct aesni_gcm_ops aesni_gcm_dec[] = {
+ [AESNI_GCM_KEY_128] = {
+ aesni_gcm128_init,
+ aesni_gcm128_dec_update,
+ aesni_gcm128_dec_finalize
+ },
+ [AESNI_GCM_KEY_256] = {
+ aesni_gcm256_init,
+ aesni_gcm256_dec_update,
+ aesni_gcm256_dec_finalize
+ }
+};
+
/**
* Global static parameter used to create a unique name for each AES-NI multi
* buffer crypto device.
@@ -65,112 +91,68 @@
return 0;
}
-static int
-aesni_gcm_calculate_hash_sub_key(uint8_t *hsubkey, unsigned hsubkey_length,
- uint8_t *aeskey, unsigned aeskey_length)
-{
- uint8_t key[aeskey_length] __rte_aligned(16);
- AES_KEY enc_key;
-
- if (hsubkey_length % 16 != 0 && aeskey_length % 16 != 0)
- return -EFAULT;
-
- memcpy(key, aeskey, aeskey_length);
-
- if (AES_set_encrypt_key(key, aeskey_length << 3, &enc_key) != 0)
- return -EFAULT;
-
- AES_encrypt(hsubkey, hsubkey, &enc_key);
-
- return 0;
-}
-
-/** Get xform chain order */
-static int
-aesni_gcm_get_mode(const struct rte_crypto_sym_xform *xform)
-{
- /*
- * GCM only supports authenticated encryption or authenticated
- * decryption, all other options are invalid, so we must have exactly
- * 2 xform structs chained together
- */
- if (xform->next == NULL || xform->next->next != NULL)
- return -1;
-
- if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
- xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
- return AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
- }
-
- if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
- xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
- return AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
- }
-
- return -1;
-}
-
/** Parse crypto xform chain and set private session parameters */
int
-aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
- struct aesni_gcm_session *sess,
+aesni_gcm_set_session_parameters(struct aesni_gcm_session *sess,
const struct rte_crypto_sym_xform *xform)
{
- const struct rte_crypto_sym_xform *auth_xform = NULL;
- const struct rte_crypto_sym_xform *cipher_xform = NULL;
-
- uint8_t hsubkey[16] __rte_aligned(16) = { 0 };
+ const struct rte_crypto_sym_xform *auth_xform;
+ const struct rte_crypto_sym_xform *cipher_xform;
- /* Select Crypto operation - hash then cipher / cipher then hash */
- switch (aesni_gcm_get_mode(xform)) {
- case AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION:
- sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
+ if (xform->next == NULL || xform->next->next != NULL) {
+ GCM_LOG_ERR("Two and only two chained xform required");
+ return -EINVAL;
+ }
- cipher_xform = xform;
+ if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+ xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
auth_xform = xform->next;
- break;
- case AESNI_GCM_OP_AUTHENTICATED_DECRYPTION:
- sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
-
+ cipher_xform = xform;
+ } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+ xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
auth_xform = xform;
cipher_xform = xform->next;
- break;
- default:
- GCM_LOG_ERR("Unsupported operation chain order parameter");
+ } else {
+ GCM_LOG_ERR("Cipher and auth xform required");
return -EINVAL;
}
- /* We only support AES GCM */
- if (cipher_xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_GCM &&
- auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GCM)
+ if (!(cipher_xform->cipher.algo == RTE_CRYPTO_CIPHER_AES_GCM &&
+ (auth_xform->auth.algo == RTE_CRYPTO_AUTH_AES_GCM ||
+ auth_xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC))) {
+ GCM_LOG_ERR("We only support AES GCM and AES GMAC");
return -EINVAL;
+ }
- /* Select cipher direction */
- if (sess->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION &&
- cipher_xform->cipher.op !=
- RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
- GCM_LOG_ERR("xform chain (CIPHER/AUTH) and cipher operation "
- "(DECRYPT) specified are an invalid selection");
- return -EINVAL;
- } else if (sess->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION &&
- cipher_xform->cipher.op !=
- RTE_CRYPTO_CIPHER_OP_DECRYPT) {
- GCM_LOG_ERR("xform chain (AUTH/CIPHER) and cipher operation "
- "(ENCRYPT) specified are an invalid selection");
+ /* Select Crypto operation */
+ if (cipher_xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
+ auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
+ sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
+ else if (cipher_xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
+ auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
+ sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
+ else {
+ GCM_LOG_ERR("Cipher/Auth operations: Encrypt/Generate or"
+ " Decrypt/Verify are valid only");
return -EINVAL;
}
- /* Expand GCM AES128 key */
- (*gcm_ops->aux.keyexp.aes128_enc)(cipher_xform->cipher.key.data,
- sess->gdata.expanded_keys);
+ /* Check key length and calculate GCM pre-compute. */
+ switch (cipher_xform->cipher.key.length) {
+ case 16:
+ aesni_gcm128_pre(cipher_xform->cipher.key.data, &sess->gdata);
+ sess->key = AESNI_GCM_KEY_128;
- /* Calculate hash sub key here */
- aesni_gcm_calculate_hash_sub_key(hsubkey, sizeof(hsubkey),
- cipher_xform->cipher.key.data,
- cipher_xform->cipher.key.length);
+ break;
+ case 32:
+ aesni_gcm256_pre(cipher_xform->cipher.key.data, &sess->gdata);
+ sess->key = AESNI_GCM_KEY_256;
- /* Calculate GCM pre-compute */
- (*gcm_ops->gcm.precomp)(&sess->gdata, hsubkey);
+ break;
+ default:
+ GCM_LOG_ERR("Unsupported cipher key length");
+ return -EINVAL;
+ }
return 0;
}
@@ -194,10 +176,10 @@
return sess;
sess = (struct aesni_gcm_session *)
- ((struct rte_cryptodev_session *)_sess)->_private;
+ ((struct rte_cryptodev_sym_session *)_sess)->_private;
- if (unlikely(aesni_gcm_set_session_parameters(qp->ops,
- sess, op->xform) != 0)) {
+ if (unlikely(aesni_gcm_set_session_parameters(sess,
+ op->xform) != 0)) {
rte_mempool_put(qp->sess_mp, _sess);
sess = NULL;
}
@@ -217,19 +199,45 @@
*
*/
static int
-process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_sym_op *op,
+process_gcm_crypto_op(struct rte_crypto_sym_op *op,
struct aesni_gcm_session *session)
{
uint8_t *src, *dst;
- struct rte_mbuf *m = op->m_src;
+ struct rte_mbuf *m_src = op->m_src;
+ uint32_t offset = op->cipher.data.offset;
+ uint32_t part_len, total_len, data_len;
+
+ RTE_ASSERT(m_src != NULL);
+
+ while (offset >= m_src->data_len) {
+ offset -= m_src->data_len;
+ m_src = m_src->next;
+
+ RTE_ASSERT(m_src != NULL);
+ }
+
+ data_len = m_src->data_len - offset;
+ part_len = (data_len < op->cipher.data.length) ? data_len :
+ op->cipher.data.length;
+
+ /* Destination buffer is required when segmented source buffer */
+ RTE_ASSERT((part_len == op->cipher.data.length) ||
+ ((part_len != op->cipher.data.length) &&
+ (op->m_dst != NULL)));
+ /* Segmented destination buffer is not supported */
+ RTE_ASSERT((op->m_dst == NULL) ||
+ ((op->m_dst != NULL) &&
+ rte_pktmbuf_is_contiguous(op->m_dst)));
+
- src = rte_pktmbuf_mtod(m, uint8_t *) + op->cipher.data.offset;
dst = op->m_dst ?
rte_pktmbuf_mtod_offset(op->m_dst, uint8_t *,
op->cipher.data.offset) :
- rte_pktmbuf_mtod_offset(m, uint8_t *,
+ rte_pktmbuf_mtod_offset(op->m_src, uint8_t *,
op->cipher.data.offset);
+ src = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);
+
/* sanity checks */
if (op->cipher.iv.length != 16 && op->cipher.iv.length != 12 &&
op->cipher.iv.length != 0) {
@@ -246,48 +254,81 @@
*iv_padd = rte_bswap32(1);
}
- if (op->auth.aad.length != 12 && op->auth.aad.length != 8 &&
- op->auth.aad.length != 0) {
- GCM_LOG_ERR("iv");
- return -1;
- }
-
if (op->auth.digest.length != 16 &&
op->auth.digest.length != 12 &&
- op->auth.digest.length != 8 &&
- op->auth.digest.length != 0) {
- GCM_LOG_ERR("iv");
+ op->auth.digest.length != 8) {
+ GCM_LOG_ERR("digest");
return -1;
}
if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
- (*qp->ops->gcm.enc)(&session->gdata, dst, src,
- (uint64_t)op->cipher.data.length,
+ aesni_gcm_enc[session->key].init(&session->gdata,
op->cipher.iv.data,
op->auth.aad.data,
- (uint64_t)op->auth.aad.length,
+ (uint64_t)op->auth.aad.length);
+
+ aesni_gcm_enc[session->key].update(&session->gdata, dst, src,
+ (uint64_t)part_len);
+ total_len = op->cipher.data.length - part_len;
+
+ while (total_len) {
+ dst += part_len;
+ m_src = m_src->next;
+
+ RTE_ASSERT(m_src != NULL);
+
+ src = rte_pktmbuf_mtod(m_src, uint8_t *);
+ part_len = (m_src->data_len < total_len) ?
+ m_src->data_len : total_len;
+
+ aesni_gcm_enc[session->key].update(&session->gdata,
+ dst, src,
+ (uint64_t)part_len);
+ total_len -= part_len;
+ }
+
+ aesni_gcm_enc[session->key].finalize(&session->gdata,
op->auth.digest.data,
(uint64_t)op->auth.digest.length);
- } else if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
- uint8_t *auth_tag = (uint8_t *)rte_pktmbuf_append(m,
+ } else { /* session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION */
+ uint8_t *auth_tag = (uint8_t *)rte_pktmbuf_append(op->m_dst ?
+ op->m_dst : op->m_src,
op->auth.digest.length);
if (!auth_tag) {
- GCM_LOG_ERR("iv");
+ GCM_LOG_ERR("auth_tag");
return -1;
}
- (*qp->ops->gcm.dec)(&session->gdata, dst, src,
- (uint64_t)op->cipher.data.length,
+ aesni_gcm_dec[session->key].init(&session->gdata,
op->cipher.iv.data,
op->auth.aad.data,
- (uint64_t)op->auth.aad.length,
+ (uint64_t)op->auth.aad.length);
+
+ aesni_gcm_dec[session->key].update(&session->gdata, dst, src,
+ (uint64_t)part_len);
+ total_len = op->cipher.data.length - part_len;
+
+ while (total_len) {
+ dst += part_len;
+ m_src = m_src->next;
+
+ RTE_ASSERT(m_src != NULL);
+
+ src = rte_pktmbuf_mtod(m_src, uint8_t *);
+ part_len = (m_src->data_len < total_len) ?
+ m_src->data_len : total_len;
+
+ aesni_gcm_dec[session->key].update(&session->gdata,
+ dst, src,
+ (uint64_t)part_len);
+ total_len -= part_len;
+ }
+
+ aesni_gcm_dec[session->key].finalize(&session->gdata,
auth_tag,
(uint64_t)op->auth.digest.length);
- } else {
- GCM_LOG_ERR("iv");
- return -1;
}
return 0;
@@ -377,7 +418,7 @@
break;
}
- retval = process_gcm_crypto_op(qp, ops[i]->sym, sess);
+ retval = process_gcm_crypto_op(ops[i]->sym, sess);
if (retval < 0) {
ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
qp->qp_stats.enqueue_err_count++;
@@ -415,7 +456,6 @@
struct rte_cryptodev *dev;
char crypto_dev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
struct aesni_gcm_private *internals;
- enum aesni_gcm_vector_mode vector_mode;
/* Check CPU for support for AES instruction set */
if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
@@ -423,18 +463,6 @@
return -EFAULT;
}
- /* Check CPU for supported vector instruction set */
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
- vector_mode = RTE_AESNI_GCM_AVX2;
- else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
- vector_mode = RTE_AESNI_GCM_AVX;
- else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
- vector_mode = RTE_AESNI_GCM_SSE;
- else {
- GCM_LOG_ERR("Vector instructions are not supported by CPU");
- return -EFAULT;
- }
-
/* create a unique device name */
if (create_unique_device_name(crypto_dev_name,
RTE_CRYPTODEV_NAME_MAX_LEN) != 0) {
@@ -461,25 +489,8 @@
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
RTE_CRYPTODEV_FF_CPU_AESNI;
- switch (vector_mode) {
- case RTE_AESNI_GCM_SSE:
- dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
- break;
- case RTE_AESNI_GCM_AVX:
- dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
- break;
- case RTE_AESNI_GCM_AVX2:
- dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
- break;
- default:
- break;
- }
-
- /* Set vector instructions mode supported */
internals = dev->data->dev_private;
- internals->vector_mode = vector_mode;
-
internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
internals->max_nb_sessions = init_params->max_nb_sessions;
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c
index c51f82a..2362006 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c
@@ -39,17 +39,17 @@
#include "aesni_gcm_pmd_private.h"
static const struct rte_cryptodev_capabilities aesni_gcm_pmd_capabilities[] = {
- { /* AES GCM (AUTH) */
+ { /* AES GMAC (AUTH) */
.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
{.sym = {
.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
{.auth = {
- .algo = RTE_CRYPTO_AUTH_AES_GCM,
+ .algo = RTE_CRYPTO_AUTH_AES_GMAC,
.block_size = 16,
.key_size = {
.min = 16,
- .max = 16,
- .increment = 0
+ .max = 32,
+ .increment = 16
},
.digest_size = {
.min = 8,
@@ -57,9 +57,34 @@
.increment = 4
},
.aad_size = {
+ .min = 0,
+ .max = 65535,
+ .increment = 1
+ }
+ }, }
+ }, }
+ },
+ { /* AES GCM (AUTH) */
+ .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+ {.sym = {
+ .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+ {.auth = {
+ .algo = RTE_CRYPTO_AUTH_AES_GCM,
+ .block_size = 16,
+ .key_size = {
+ .min = 16,
+ .max = 32,
+ .increment = 16
+ },
+ .digest_size = {
.min = 8,
- .max = 12,
+ .max = 16,
.increment = 4
+ },
+ .aad_size = {
+ .min = 0,
+ .max = 65535,
+ .increment = 1
}
}, }
}, }
@@ -73,8 +98,8 @@
.block_size = 16,
.key_size = {
.min = 16,
- .max = 16,
- .increment = 0
+ .max = 32,
+ .increment = 16
},
.iv_size = {
.min = 12,
@@ -221,7 +246,6 @@
int socket_id)
{
struct aesni_gcm_qp *qp = NULL;
- struct aesni_gcm_private *internals = dev->data->dev_private;
/* Free memory prior to re-allocation if needed. */
if (dev->data->queue_pairs[qp_id] != NULL)
@@ -239,8 +263,6 @@
if (aesni_gcm_pmd_qp_set_unique_name(dev, qp))
goto qp_setup_cleanup;
- qp->ops = &gcm_ops[internals->vector_mode];
-
qp->processed_pkts = aesni_gcm_pmd_qp_create_processed_pkts_ring(qp,
qp_conf->nb_descriptors, socket_id);
if (qp->processed_pkts == NULL)
@@ -291,18 +313,15 @@
/** Configure a aesni gcm session from a crypto xform chain */
static void *
-aesni_gcm_pmd_session_configure(struct rte_cryptodev *dev,
+aesni_gcm_pmd_session_configure(struct rte_cryptodev *dev __rte_unused,
struct rte_crypto_sym_xform *xform, void *sess)
{
- struct aesni_gcm_private *internals = dev->data->dev_private;
-
if (unlikely(sess == NULL)) {
GCM_LOG_ERR("invalid session struct");
return NULL;
}
- if (aesni_gcm_set_session_parameters(&gcm_ops[internals->vector_mode],
- sess, xform) != 0) {
+ if (aesni_gcm_set_session_parameters(sess, xform) != 0) {
GCM_LOG_ERR("failed configure session parameters");
return NULL;
}
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h b/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h
index 9878d6e..0496b44 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h
@@ -58,8 +58,6 @@
/** private data structure for each virtual AESNI GCM device */
struct aesni_gcm_private {
- enum aesni_gcm_vector_mode vector_mode;
- /**< Vector mode */
unsigned max_nb_queue_pairs;
/**< Max number of queue pairs supported by device */
unsigned max_nb_sessions;
@@ -71,8 +69,6 @@ struct aesni_gcm_qp {
/**< Queue Pair Identifier */
char name[RTE_CRYPTODEV_NAME_LEN];
/**< Unique Queue Pair Name */
- const struct aesni_gcm_ops *ops;
- /**< Architecture dependent function pointer table of the gcm APIs */
struct rte_ring *processed_pkts;
/**< Ring for placing process packets */
struct rte_mempool *sess_mp;
@@ -87,10 +83,17 @@ enum aesni_gcm_operation {
AESNI_GCM_OP_AUTHENTICATED_DECRYPTION
};
+enum aesni_gcm_key {
+ AESNI_GCM_KEY_128,
+ AESNI_GCM_KEY_256
+};
+
/** AESNI GCM private session structure */
struct aesni_gcm_session {
enum aesni_gcm_operation op;
/**< GCM operation type */
+ enum aesni_gcm_key key;
+ /**< GCM key type */
struct gcm_data gdata __rte_cache_aligned;
/**< GCM parameters */
};
@@ -98,7 +101,6 @@ struct aesni_gcm_session {
/**
* Setup GCM session parameters
- * @param ops gcm ops function pointer table
* @param sess aesni gcm session structure
* @param xform crypto transform chain
*
@@ -107,8 +109,7 @@ struct aesni_gcm_session {
* - On failure returns error code < 0
*/
extern int
-aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *ops,
- struct aesni_gcm_session *sess,
+aesni_gcm_set_session_parameters(struct aesni_gcm_session *sess,
const struct rte_crypto_sym_xform *xform);
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index f75f0e2..ed3eab5 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -134,8 +134,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_VMXNET3_PMD) += -lrte_pmd_vmxnet3_uio
ifeq ($(CONFIG_RTE_LIBRTE_CRYPTODEV),y)
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += -lrte_pmd_aesni_mb
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += -L$(AESNI_MULTI_BUFFER_LIB_PATH) -lIPSec_MB
-_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += -lrte_pmd_aesni_gcm -lcrypto
-_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += -L$(AESNI_MULTI_BUFFER_LIB_PATH) -lIPSec_MB
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += -lrte_pmd_aesni_gcm -lisal_crypto
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OPENSSL) += -lrte_pmd_openssl -lcrypto
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO) += -lrte_pmd_null_crypto
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += -lrte_pmd_qat -lcrypto
--
1.7.9.5
^ permalink raw reply related
* Re: [PATCH 1/2] net/ixgbe: remove unused global variable
From: Ferruh Yigit @ 2017-01-03 13:23 UTC (permalink / raw)
To: Jerin Jacob, dev; +Cc: konstantin.ananyev, helin.zhang, thomas.monjalon
In-Reply-To: <1482833398-30145-1-git-send-email-jerin.jacob@caviumnetworks.com>
On 12/27/2016 10:09 AM, Jerin Jacob wrote:
> Removed unused "reg_info" global variable from ixgbe driver.
>
> cat build/app/testpmd.map | grep "Allocating common symbols" -A 15
> Allocating common symbols
> Common symbol size file
> reg_info 0x18 build/lib/librte_pmd_ixgbe.a(ixgbe_ethdev.o)
>
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
^ permalink raw reply
* Re: [PATCH 2/2] app/testpmd: remove explicit ixgbe link request
From: Ferruh Yigit @ 2017-01-03 13:30 UTC (permalink / raw)
To: Jerin Jacob, dev; +Cc: konstantin.ananyev, helin.zhang, thomas.monjalon
In-Reply-To: <1482833398-30145-2-git-send-email-jerin.jacob@caviumnetworks.com>
On 12/27/2016 10:09 AM, Jerin Jacob wrote:
> Removed explicit ixgbe driver linkage request from
> app/testpmd makefile to mk/rte.app.mk to
> 1)Maintain the correct link ordering(from higher level libraries
> to lower level libraries)
> 2)In shared lib configuration, any application can use ixgbe
> exposed pmd specific APIs not just testpmd.
In testpmd, "explicit ixgbe driver linkage request" added because
testpmd uses ixgbe PMD specific APIs.
Overall, that line is for shared library, for static library result
should be same.
I believe it is good to keep it in testpmd Makefile, updating rte.app.mk
to have it will:
- link library to the applications which does not use PMD specific APIs
and want to load PMD dynamically.
- link library to the application that won't use driver at all. This may
break the distributed binaries, since testpmd will now be dependent to a
specific PMD.
>
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> ---
> app/test-pmd/Makefile | 2 --
> mk/rte.app.mk | 2 +-
> 2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/app/test-pmd/Makefile b/app/test-pmd/Makefile
> index 5988c3e..96e0c67 100644
> --- a/app/test-pmd/Makefile
> +++ b/app/test-pmd/Makefile
> @@ -59,8 +59,6 @@ SRCS-y += csumonly.c
> SRCS-y += icmpecho.c
> SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588) += ieee1588fwd.c
>
> -_LDLIBS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += -lrte_pmd_ixgbe
> -
> CFLAGS_cmdline.o := -D_GNU_SOURCE
>
> # this application needs libraries first
> diff --git a/mk/rte.app.mk b/mk/rte.app.mk
> index f75f0e2..aee235c 100644
> --- a/mk/rte.app.mk
> +++ b/mk/rte.app.mk
> @@ -101,6 +101,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_CFGFILE) += -lrte_cfgfile
>
> _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += -lrte_pmd_bond
> _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_XENVIRT) += -lrte_pmd_xenvirt -lxenstore
> +_LDLIBS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += -lrte_pmd_ixgbe
>
> ifeq ($(CONFIG_RTE_BUILD_SHARED_LIB),n)
> # plugins (link only if static libraries)
> @@ -114,7 +115,6 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += -lrte_pmd_ena
> _LDLIBS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += -lrte_pmd_enic
> _LDLIBS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += -lrte_pmd_fm10k
> _LDLIBS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += -lrte_pmd_i40e
> -_LDLIBS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += -lrte_pmd_ixgbe
> _LDLIBS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += -lrte_pmd_mlx4 -libverbs
> _LDLIBS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += -lrte_pmd_mlx5 -libverbs
> _LDLIBS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += -lrte_pmd_mpipe -lgxio
>
^ permalink raw reply
* Re: [PATCH v3 1/2] net/vhost: create datagram sockets immediately
From: Charles (Chas) Williams @ 2017-01-03 13:52 UTC (permalink / raw)
To: Yuanhan Liu; +Cc: dev, mtetsuyah
In-Reply-To: <20170103082215.GC21228@yliu-dev.sh.intel.com>
On 01/03/2017 03:22 AM, Yuanhan Liu wrote:
> On Sun, Jan 01, 2017 at 02:01:56PM -0500, Charles (Chas) Williams wrote:
>> If you create a vhost server device, it doesn't create the actual datagram
>> socket until you call .dev_start(). If you call .dev_stop() is also
>> deletes those sockets. For QEMU clients, this is a problem since QEMU
>> doesn't know how to re-attach to datagram sockets that have gone away.
>>
>> To work around this, register and unregister the datagram sockets during
>
> I will not call it's a "workaround", instead, it's a "fix" to me.
OK.
>> device creation and removal.
>>
>> Fixes: ee584e9710b9 ("vhost: add driver on top of the library")
>>
>> Signed-off-by: Chas Williams <ciwillia@brocade.com>
>> ---
>> drivers/net/vhost/rte_eth_vhost.c | 43 ++++++++++++++++-----------------------
>> 1 file changed, 17 insertions(+), 26 deletions(-)
>>
>> diff --git a/drivers/net/vhost/rte_eth_vhost.c b/drivers/net/vhost/rte_eth_vhost.c
>> index 60b0f51..6b11e40 100644
>> --- a/drivers/net/vhost/rte_eth_vhost.c
>> +++ b/drivers/net/vhost/rte_eth_vhost.c
>> @@ -114,8 +114,6 @@ struct pmd_internal {
>> char *iface_name;
>> uint16_t max_queues;
>> uint64_t flags;
>
> I think the "flags" could also be dropped in this patch: no user any
> more.
Sorry, I hadn't noticed that -- Yes, it can go away.
^ permalink raw reply
* Re: [PATCH v5 00/20] Decouple ethdev from PCI device
From: Thomas Monjalon @ 2017-01-03 14:06 UTC (permalink / raw)
To: Ferruh Yigit
Cc: Jan Blunck, dev, shreyansh.jain, david.marchand, stephen,
Adrien Mazarguil, Nelio Laranjeiro
In-Reply-To: <f45a07fb-b77e-dccc-399c-d8c65f1c849b@intel.com>
2017-01-03 12:24, Ferruh Yigit:
> On 12/25/2016 10:33 PM, Thomas Monjalon wrote:
> > Applied with some trivial fixes, thanks
>
> Getting following build error for mlx5 [1], it is mainly because verbs.h
> also using container_of macro.
>
> [1]
> In file included from
> .../x86_64-native-linuxapp-gcc/include/rte_mbuf.h:57:0,
> from .../x86_64-native-linuxapp-gcc/include/rte_ether.h:52,
> from .../drivers/net/mlx5/mlx5_trigger.c:38:
> /usr/include/infiniband/verbs.h: In function ‘verbs_get_device’:
> .../x86_64-native-linuxapp-gcc/include/rte_common.h:350:40: error:
> initialization discards ‘const’ qualifier from pointer target type
> [-Werror=discarded-qualifiers]
> typeof(((type *)0)->member) *_ptr = (ptr); \
> ^
Yes, this issue is fixed by upgrading mofed to version 3.4.
^ permalink raw reply
* Re: [PATCH v2 14/18] net/ixgbe: parse L2 tunnel filter
From: Adrien Mazarguil @ 2017-01-03 14:07 UTC (permalink / raw)
To: Wei Zhao; +Cc: dev, Wenzhuo Lu
In-Reply-To: <1483084390-53159-15-git-send-email-wei.zhao1@intel.com>
Hi Wei,
On Fri, Dec 30, 2016 at 03:53:06PM +0800, Wei Zhao wrote:
> check if the rule is a L2 tunnel rule, and get the L2 tunnel info.
>
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
>
> ---
>
> v2:
> --add new error set function
> --change return value type of parser function
> ---
> drivers/net/ixgbe/ixgbe_ethdev.c | 269 +++++++++++++++++++++++++++++++++++----
> lib/librte_ether/rte_flow.h | 32 +++++
> 2 files changed, 273 insertions(+), 28 deletions(-)
[...]
> diff --git a/lib/librte_ether/rte_flow.h b/lib/librte_ether/rte_flow.h
> index 98084ac..e9e6220 100644
> --- a/lib/librte_ether/rte_flow.h
> +++ b/lib/librte_ether/rte_flow.h
> @@ -268,6 +268,13 @@ enum rte_flow_item_type {
> * See struct rte_flow_item_vxlan.
> */
> RTE_FLOW_ITEM_TYPE_VXLAN,
> +
> + /**
> + * Matches a E_TAG header.
> + *
> + * See struct rte_flow_item_e_tag.
> + */
> + RTE_FLOW_ITEM_TYPE_E_TAG,
> };
>
> /**
> @@ -454,6 +461,31 @@ struct rte_flow_item_vxlan {
> };
>
> /**
> + * RTE_FLOW_ITEM_TYPE_E_TAG.
> + *
> + * Matches a E-tag header.
> + */
> +struct rte_flow_item_e_tag {
> + struct ether_addr dst; /**< Destination MAC. */
> + struct ether_addr src; /**< Source MAC. */
> + uint16_t e_tag_ethertype; /**< E-tag EtherType, 0x893F. */
> + uint16_t e_pcp:3; /**< E-PCP */
> + uint16_t dei:1; /**< DEI */
> + uint16_t in_e_cid_base:12; /**< Ingress E-CID base */
> + uint16_t rsv:2; /**< reserved */
> + uint16_t grp:2; /**< GRP */
> + uint16_t e_cid_base:12; /**< E-CID base */
> + uint16_t in_e_cid_ext:8; /**< Ingress E-CID extend */
> + uint16_t e_cid_ext:8; /**< E-CID extend */
> + uint16_t type; /**< MAC type. */
> + unsigned int tags; /**< Number of 802.1Q/ad tags defined. */
> + struct {
> + uint16_t tpid; /**< Tag protocol identifier. */
> + uint16_t tci; /**< Tag control information. */
> + } tag[]; /**< 802.1Q/ad tag definitions, outermost first. */
> +};
[...]
See my previous reply [1], this definition is not endian-safe and comprises
protocols defined as independent items (namely ETH and VLAN). Here is an
untested suggestion:
struct rte_flow_item_e_tag {
uint16_t tpid; /**< Tag protocol identifier (0x893F). */
/** E-Tag control information (E-TCI). */
uint16_t epcp_edei_in_ecid_b; /**< E-PCP (3b), E-DEI (1b), ingress E-CID base (12b). */
uint16_t rsvd_grp_ecid_b; /**< Reserved (2b), GRP (2b), E-CID base (12b). */
uint8_t in_ecid_e; /**< Ingress E-CID ext. */
uint8_t ecid_e; /**< E-CID ext. */
};
Applications are responsibile for breaking down and filling individual
fields properly. Ethernet header would be provided as its own item as shown
in this testpmd flow command example:
flow create 0 ingress pattern eth / e_tag in_ecid_base is 42 / end actions drop / end
Note, all multibyte values are in network order like other protocol header
definitions.
[1] http://dpdk.org/ml/archives/dev/2016-December/053181.html
Message ID: 20161223081310.GH10340@6wind.com
--
Adrien Mazarguil
6WIND
^ permalink raw reply
* Re: [PATCH v2 15/18] net/ixgbe: parse flow director filter
From: Adrien Mazarguil @ 2017-01-03 14:08 UTC (permalink / raw)
To: Wei Zhao; +Cc: dev, Wenzhuo Lu
In-Reply-To: <1483084390-53159-16-git-send-email-wei.zhao1@intel.com>
Hi Wei,
On Fri, Dec 30, 2016 at 03:53:07PM +0800, Wei Zhao wrote:
> check if the rule is a flow director rule, and get the flow director info.
>
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
>
> ---
>
> v2:add new error set function
> ---
> drivers/net/ixgbe/ixgbe_ethdev.c | 1467 +++++++++++++++++++++++++++++++++-----
> drivers/net/ixgbe/ixgbe_ethdev.h | 16 +
> drivers/net/ixgbe/ixgbe_fdir.c | 247 ++++---
> lib/librte_ether/rte_flow.h | 23 +
> 4 files changed, 1495 insertions(+), 258 deletions(-)
[...]
> diff --git a/lib/librte_ether/rte_flow.h b/lib/librte_ether/rte_flow.h
> index e9e6220..e59f458 100644
> --- a/lib/librte_ether/rte_flow.h
> +++ b/lib/librte_ether/rte_flow.h
> @@ -275,6 +275,13 @@ enum rte_flow_item_type {
> * See struct rte_flow_item_e_tag.
> */
> RTE_FLOW_ITEM_TYPE_E_TAG,
> +
> + /**
> + * Matches a NVGRE header.
> + *
> + * See struct rte_flow_item_nvgre.
> + */
> + RTE_FLOW_ITEM_TYPE_NVGRE,
> };
>
> /**
> @@ -486,6 +493,22 @@ struct rte_flow_item_e_tag {
> };
>
> /**
> + * RTE_FLOW_ITEM_TYPE_NVGRE.
> + *
> + * Matches a NVGRE header.
> + */
> +struct rte_flow_item_nvgre {
> + uint32_t flags0:1; /**< 0 */
> + uint32_t rsvd1:1; /**< 1 bit not defined */
> + uint32_t flags1:2; /**< 2 bits, 1 0 */
> + uint32_t rsvd0:9; /**< Reserved0 */
> + uint32_t ver:3; /**< version */
> + uint32_t protocol:16; /**< protocol type, 0x6558 */
> + uint8_t tni[3]; /**< tenant network ID or virtual subnet ID */
> + uint8_t flow_id; /**< flow ID or Reserved */
> +};
[...]
See my previous reply [1], this definition is not endian-safe due to the use
of bit-fields and should look more like the VXLAN item. Here is an untested
suggestion (not sure about all values):
struct rte_flow_item_nvgre {
/**
* Checksum (1b), undefined (1b), key bit (1b), sequence number (1b),
* reserved 0 (9b), version (3b).
*
* \c_k_s_rsvd0_ver must have value 0x2000 according to RFC 7637.
*/
uint16_t c_k_s_rsvd0_ver;
uint16_t proto; /**< Protocol type (0x6558). */
uint8_t vsid[3]; /**< Virtual subnet ID. */
uint8_t flow_id; /**< Flow ID. */
};
Like for E-Tag, applications are responsibile for breaking down and filling
individual fields properly.
[1] http://dpdk.org/ml/archives/dev/2016-December/053181.html
Message ID: 20161223081310.GH10340@6wind.com
--
Adrien Mazarguil
6WIND
^ permalink raw reply
* Re: [PATCH v3] crypto/aesni_gcm: migration from MB library to ISA-L
From: Thomas Monjalon @ 2017-01-03 14:14 UTC (permalink / raw)
To: Piotr Azarewicz; +Cc: dev, pablo.de.lara.guarch
In-Reply-To: <1483448523-150510-1-git-send-email-piotrx.t.azarewicz@intel.com>
2017-01-03 14:02, Piotr Azarewicz:
> Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer
> Crypto library.This patch reimplement the device using ISA-L Crypto
> library: https://github.com/01org/isa-l_crypto.
>
> The migration entailed the following additional support for:
> * GMAC algorithm.
> * 256-bit cipher key.
> * Session-less mode.
> * Out-of place processing
> * Scatter-gatter support for chained mbufs (only out-of place and
> destination mbuf must be contiguous)
>
> Verified current unit tests and added new unit tests to verify new
> functionalities.
>
> Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
[...]
> The AES-NI GCM PMD (**librte_pmd_aesni_gcm**) provides poll mode crypto driver
> -support for utilizing Intel multi buffer library (see AES-NI Multi-buffer PMD documentation
> -to learn more about it, including installation).
> -
> -The AES-NI GCM PMD has current only been tested on Fedora 21 64-bit with gcc.
> +support for utilizing Intel ISA-L crypto library, which provides operation acceleration
> +through the AES-NI instruction sets for AES-GCM authenticated cipher algorithm.
Please could you compare these libraries regarding the performance?
[...]
> Features
> --------
> @@ -49,16 +47,21 @@ Cipher algorithms:
> Authentication algorithms:
>
> * RTE_CRYPTO_AUTH_AES_GCM
> +* RTE_CRYPTO_AUTH_AES_GMAC
> +
> +Installation
> +------------
> +
> +To build DPDK with the AESNI_GCM_PMD the user is required to install
> +the ``libisal_crypto`` library in the build environment.
> +For download and more details please visit `<https://github.com/01org/isa-l_crypto>`_.
[...]
> Limitations
> -----------
>
> -* Chained mbufs are not supported.
> +* Chained mbufs are supported but only out-of-place (destination mbuf must be contiguous).
> * Hash only is not supported.
> * Cipher only is not supported.
> -* Only in-place is currently supported (destination address is the same as source address).
> -* Only supports session-oriented API implementation (session-less APIs are not supported).
> * Not performance tuned.
[...]
> --- a/drivers/crypto/aesni_gcm/Makefile
> +++ b/drivers/crypto/aesni_gcm/Makefile
> @@ -31,9 +31,6 @@
> include $(RTE_SDK)/mk/rte.vars.mk
>
> ifneq ($(MAKECMDGOALS),clean)
> -ifeq ($(AESNI_MULTI_BUFFER_LIB_PATH),)
> -$(error "Please define AESNI_MULTI_BUFFER_LIB_PATH environment variable")
> -endif
> endif
>
> # library name
> @@ -50,10 +47,7 @@ LIBABIVER := 1
> EXPORT_MAP := rte_pmd_aesni_gcm_version.map
>
> # external library dependencies
> -CFLAGS += -I$(AESNI_MULTI_BUFFER_LIB_PATH)
> -CFLAGS += -I$(AESNI_MULTI_BUFFER_LIB_PATH)/include
> -LDLIBS += -L$(AESNI_MULTI_BUFFER_LIB_PATH) -lIPSec_MB
> -LDLIBS += -lcrypto
> +LDLIBS += -lisal_crypto
You need to update the script test-build.sh.
Thanks
^ permalink raw reply
* Re: [PATCH v2 02/18] net/ixgbe: store flow director filter
From: Dai, Wei @ 2017-01-03 14:28 UTC (permalink / raw)
To: Zhao1, Wei, dev@dpdk.org; +Cc: Lu, Wenzhuo, Zhao1, Wei
In-Reply-To: <1483084390-53159-3-git-send-email-wei.zhao1@intel.com>
Hi, Wei Zhao
Would you please do git rebase master for this patch set?
When I do git pull and then git apply this patch, following errors are reported:
[root@dpdk4 dpdk-org]# git am ../patches/bundle-488-zhaowei-ixgbe-filter-api-v2.mbox
Applying: net/ixgbe: store SYN filter
Applying: net/ixgbe: store flow director filter
error: patch failed: drivers/net/ixgbe/ixgbe_ethdev.c:1284
error: drivers/net/ixgbe/ixgbe_ethdev.c: patch does not apply
Patch failed at 0002 net/ixgbe: store flow director filter
The copy of the patch that failed is found in: .git/rebase-apply/patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wei Zhao
> Sent: Friday, December 30, 2016 3:53 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Zhao1, Wei <wei.zhao1@intel.com>
> Subject: [dpdk-dev] [PATCH v2 02/18] net/ixgbe: store flow director filter
>
> Add support for storing flow director filter in SW.
>
> Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> ---
>
> v2:
> --add a fdir initialization function in device start process
> ---
> drivers/net/ixgbe/ixgbe_ethdev.c | 55 ++++++++++++++++++++
> drivers/net/ixgbe/ixgbe_ethdev.h | 19 ++++++-
> drivers/net/ixgbe/ixgbe_fdir.c | 105
> ++++++++++++++++++++++++++++++++++++++-
> 3 files changed, 176 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c
> b/drivers/net/ixgbe/ixgbe_ethdev.c
> index 316e560..de27a73 100644
> --- a/drivers/net/ixgbe/ixgbe_ethdev.c
> +++ b/drivers/net/ixgbe/ixgbe_ethdev.c
> @@ -60,6 +60,7 @@
> #include <rte_malloc.h>
> #include <rte_random.h>
> #include <rte_dev.h>
> +#include <rte_hash_crc.h>
>
> #include "ixgbe_logs.h"
> #include "base/ixgbe_api.h"
> @@ -165,6 +166,7 @@ enum ixgbevf_xcast_modes {
>
> static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev); static int
> eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
> +static int ixgbe_fdir_filter_init(struct rte_eth_dev *eth_dev);
> static int ixgbe_dev_configure(struct rte_eth_dev *dev); static int
> ixgbe_dev_start(struct rte_eth_dev *dev); static void ixgbe_dev_stop(struct
> rte_eth_dev *dev); @@ -1276,6 +1278,9 @@ eth_ixgbe_dev_init(struct
> rte_eth_dev *eth_dev)
>
> /* initialize SYN filter */
> filter_info->syn_info = 0;
> + /* initialize flow director filter list & hash */
> + ixgbe_fdir_filter_init(eth_dev);
> +
> return 0;
> }
>
> @@ -1284,6 +1289,9 @@ eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev)
> {
> struct rte_pci_device *pci_dev;
> struct ixgbe_hw *hw;
> + struct ixgbe_hw_fdir_info *fdir_info =
> + IXGBE_DEV_PRIVATE_TO_FDIR_INFO(eth_dev->data->dev_private);
> + struct ixgbe_fdir_filter *fdir_filter;
>
> PMD_INIT_FUNC_TRACE();
>
> @@ -1317,9 +1325,56 @@ eth_ixgbe_dev_uninit(struct rte_eth_dev
> *eth_dev)
> rte_free(eth_dev->data->hash_mac_addrs);
> eth_dev->data->hash_mac_addrs = NULL;
>
> + /* remove all the fdir filters & hash */
> + if (fdir_info->hash_map)
> + rte_free(fdir_info->hash_map);
> + if (fdir_info->hash_handle)
> + rte_hash_free(fdir_info->hash_handle);
> +
> + while ((fdir_filter = TAILQ_FIRST(&fdir_info->fdir_list))) {
> + TAILQ_REMOVE(&fdir_info->fdir_list,
> + fdir_filter,
> + entries);
> + rte_free(fdir_filter);
> + }
> +
> return 0;
> }
>
> +static int ixgbe_fdir_filter_init(struct rte_eth_dev *eth_dev) {
> + struct ixgbe_hw_fdir_info *fdir_info =
> + IXGBE_DEV_PRIVATE_TO_FDIR_INFO(eth_dev->data->dev_private);
> + char fdir_hash_name[RTE_HASH_NAMESIZE];
> + struct rte_hash_parameters fdir_hash_params = {
> + .name = fdir_hash_name,
> + .entries = IXGBE_MAX_FDIR_FILTER_NUM,
> + .key_len = sizeof(union ixgbe_atr_input),
> + .hash_func = rte_hash_crc,
> + .hash_func_init_val = 0,
> + .socket_id = rte_socket_id(),
> + };
> +
> + TAILQ_INIT(&fdir_info->fdir_list);
> + snprintf(fdir_hash_name, RTE_HASH_NAMESIZE,
> + "fdir_%s", eth_dev->data->name);
> + fdir_info->hash_handle = rte_hash_create(&fdir_hash_params);
> + if (!fdir_info->hash_handle) {
> + PMD_INIT_LOG(ERR, "Failed to create fdir hash table!");
> + return -EINVAL;
> + }
> + fdir_info->hash_map = rte_zmalloc("ixgbe",
> + sizeof(struct ixgbe_fdir_filter *) *
> + IXGBE_MAX_FDIR_FILTER_NUM,
> + 0);
> + if (!fdir_info->hash_map) {
> + PMD_INIT_LOG(ERR,
> + "Failed to allocate memory for fdir hash map!");
> + return -ENOMEM;
> + }
> +
> + return 0;
> +}
> /*
> * Negotiate mailbox API version with the PF.
> * After reset API version is always set to the basic one (ixgbe_mbox_api_10).
> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h
> b/drivers/net/ixgbe/ixgbe_ethdev.h
> index 827026c..8310220 100644
> --- a/drivers/net/ixgbe/ixgbe_ethdev.h
> +++ b/drivers/net/ixgbe/ixgbe_ethdev.h
> @@ -38,6 +38,7 @@
> #include "base/ixgbe_dcb_82598.h"
> #include "ixgbe_bypass.h"
> #include <rte_time.h>
> +#include <rte_hash.h>
>
> /* need update link, bit flag */
> #define IXGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0) @@ -130,10
> +131,11 @@
> #define IXGBE_MISC_VEC_ID
> RTE_INTR_VEC_ZERO_OFFSET
> #define IXGBE_RX_VEC_START
> RTE_INTR_VEC_RXTX_OFFSET
>
> +#define IXGBE_MAX_FDIR_FILTER_NUM (1024 * 32)
> +
> /*
> * Information about the fdir mode.
> */
> -
> struct ixgbe_hw_fdir_mask {
> uint16_t vlan_tci_mask;
> uint32_t src_ipv4_mask;
> @@ -148,6 +150,17 @@ struct ixgbe_hw_fdir_mask {
> uint8_t tunnel_type_mask;
> };
>
> +struct ixgbe_fdir_filter {
> + TAILQ_ENTRY(ixgbe_fdir_filter) entries;
> + union ixgbe_atr_input ixgbe_fdir; /* key of fdir filter*/
> + uint32_t fdirflags; /* drop or forward */
> + uint32_t fdirhash; /* hash value for fdir */
> + uint8_t queue; /* assigned rx queue */ };
> +
> +/* list of fdir filters */
> +TAILQ_HEAD(ixgbe_fdir_filter_list, ixgbe_fdir_filter);
> +
> struct ixgbe_hw_fdir_info {
> struct ixgbe_hw_fdir_mask mask;
> uint8_t flex_bytes_offset;
> @@ -159,6 +172,10 @@ struct ixgbe_hw_fdir_info {
> uint64_t remove;
> uint64_t f_add;
> uint64_t f_remove;
> + struct ixgbe_fdir_filter_list fdir_list; /* filter list*/
> + /* store the pointers of the filters, index is the hash value. */
> + struct ixgbe_fdir_filter **hash_map;
> + struct rte_hash *hash_handle; /* cuckoo hash handler */
> };
>
> /* structure for interrupt relative data */ diff --git
> a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c index
> 4b81ee3..bfcd294 100644
> --- a/drivers/net/ixgbe/ixgbe_fdir.c
> +++ b/drivers/net/ixgbe/ixgbe_fdir.c
> @@ -43,6 +43,7 @@
> #include <rte_pci.h>
> #include <rte_ether.h>
> #include <rte_ethdev.h>
> +#include <rte_malloc.h>
>
> #include "ixgbe_logs.h"
> #include "base/ixgbe_api.h"
> @@ -1075,6 +1076,65 @@ fdir_erase_filter_82599(struct ixgbe_hw *hw,
> uint32_t fdirhash)
>
> }
>
> +static inline struct ixgbe_fdir_filter *
> +ixgbe_fdir_filter_lookup(struct ixgbe_hw_fdir_info *fdir_info,
> + union ixgbe_atr_input *key)
> +{
> + int ret = 0;
> +
> + ret = rte_hash_lookup(fdir_info->hash_handle, (const void *)key);
> + if (ret < 0)
> + return NULL;
> +
> + return fdir_info->hash_map[ret];
> +}
> +
> +static inline int
> +ixgbe_insert_fdir_filter(struct ixgbe_hw_fdir_info *fdir_info,
> + struct ixgbe_fdir_filter *fdir_filter) {
> + int ret = 0;
> +
> + ret = rte_hash_add_key(fdir_info->hash_handle,
> + &fdir_filter->ixgbe_fdir);
> +
> + if (ret < 0) {
> + PMD_DRV_LOG(ERR,
> + "Failed to insert fdir filter to hash table %d!",
> + ret);
> + return ret;
> + }
> +
> + fdir_info->hash_map[ret] = fdir_filter;
> +
> + TAILQ_INSERT_TAIL(&fdir_info->fdir_list, fdir_filter, entries);
> +
> + return 0;
> +}
> +
> +static inline int
> +ixgbe_remove_fdir_filter(struct ixgbe_hw_fdir_info *fdir_info,
> + union ixgbe_atr_input *key)
> +{
> + int ret = 0;
> + struct ixgbe_fdir_filter *fdir_filter;
> +
> + ret = rte_hash_del_key(fdir_info->hash_handle, key);
> +
> + if (ret < 0) {
> + PMD_DRV_LOG(ERR, "No such fdir filter to delete %d!", ret);
> + return ret;
> + }
> +
> + fdir_filter = fdir_info->hash_map[ret];
> + fdir_info->hash_map[ret] = NULL;
> +
> + TAILQ_REMOVE(&fdir_info->fdir_list, fdir_filter, entries);
> + rte_free(fdir_filter);
> +
> + return 0;
> +}
> +
> /*
> * ixgbe_add_del_fdir_filter - add or remove a flow diretor filter.
> * @dev: pointer to the structure rte_eth_dev @@ -1098,6 +1158,8 @@
> ixgbe_add_del_fdir_filter(struct rte_eth_dev *dev,
> struct ixgbe_hw_fdir_info *info =
> IXGBE_DEV_PRIVATE_TO_FDIR_INFO(dev->data->dev_private);
> enum rte_fdir_mode fdir_mode = dev->data->dev_conf.fdir_conf.mode;
> + struct ixgbe_fdir_filter *node;
> + bool add_node = FALSE;
>
> if (fdir_mode == RTE_FDIR_MODE_NONE)
> return -ENOTSUP;
> @@ -1148,6 +1210,10 @@ ixgbe_add_del_fdir_filter(struct rte_eth_dev *dev,
> dev->data->dev_conf.fdir_conf.pballoc);
>
> if (del) {
> + err = ixgbe_remove_fdir_filter(info, &input);
> + if (err < 0)
> + return err;
> +
> err = fdir_erase_filter_82599(hw, fdirhash);
> if (err < 0)
> PMD_DRV_LOG(ERR, "Fail to delete FDIR filter!"); @@ -1172,6
> +1238,37 @@ ixgbe_add_del_fdir_filter(struct rte_eth_dev *dev,
> else
> return -EINVAL;
>
> + node = ixgbe_fdir_filter_lookup(info, &input);
> + if (node) {
> + if (update) {
> + node->fdirflags = fdircmd_flags;
> + node->fdirhash = fdirhash;
> + node->queue = queue;
> + } else {
> + PMD_DRV_LOG(ERR, "Conflict with existing fdir filter!");
> + return -EINVAL;
> + }
> + } else {
> + add_node = TRUE;
> + node = rte_zmalloc("ixgbe_fdir",
> + sizeof(struct ixgbe_fdir_filter),
> + 0);
> + if (!node)
> + return -ENOMEM;
> + (void)rte_memcpy(&node->ixgbe_fdir,
> + &input,
> + sizeof(union ixgbe_atr_input));
> + node->fdirflags = fdircmd_flags;
> + node->fdirhash = fdirhash;
> + node->queue = queue;
> +
> + err = ixgbe_insert_fdir_filter(info, node);
> + if (err < 0) {
> + rte_free(node);
> + return err;
> + }
> + }
> +
> if (is_perfect) {
> err = fdir_write_perfect_filter_82599(hw, &input, queue,
> fdircmd_flags, fdirhash,
> @@ -1180,10 +1277,14 @@ ixgbe_add_del_fdir_filter(struct rte_eth_dev
> *dev,
> err = fdir_add_signature_filter_82599(hw, &input, queue,
> fdircmd_flags, fdirhash);
> }
> - if (err < 0)
> + if (err < 0) {
> PMD_DRV_LOG(ERR, "Fail to add FDIR filter!");
> - else
> +
> + if (add_node)
> + (void)ixgbe_remove_fdir_filter(info, &input);
> + } else {
> PMD_DRV_LOG(DEBUG, "Success to add FDIR filter");
> + }
>
> return err;
> }
> --
> 2.5.5
^ permalink raw reply
* Re: [PATCH v2 01/18] net/ixgbe: store SYN filter
From: Dai, Wei @ 2017-01-03 14:33 UTC (permalink / raw)
To: Zhao1, Wei, dev@dpdk.org; +Cc: Lu, Wenzhuo, Zhao1, Wei
In-Reply-To: <1483084390-53159-2-git-send-email-wei.zhao1@intel.com>
Hi, Wei Zhao
I think that you had better give a cover letter for such a series of patches.
You can give the changes between v2 and v1 in cover letter
and maybe no need describe it in each one.
Thanks &Best Regards
-Wei
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wei Zhao
> Sent: Friday, December 30, 2016 3:53 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Zhao1, Wei <wei.zhao1@intel.com>
> Subject: [dpdk-dev] [PATCH v2 01/18] net/ixgbe: store SYN filter
>
> Add support for storing SYN filter in SW.
>
> Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> ---
>
> v2:
> --synqf assignment location change
> ---
> drivers/net/ixgbe/ixgbe_ethdev.c | 14 +++++++++++---
> drivers/net/ixgbe/ixgbe_ethdev.h | 2 ++
> 2 files changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c
> b/drivers/net/ixgbe/ixgbe_ethdev.c
> index a25bac8..316e560 100644
> --- a/drivers/net/ixgbe/ixgbe_ethdev.c
> +++ b/drivers/net/ixgbe/ixgbe_ethdev.c
> @@ -1274,6 +1274,8 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
> memset(filter_info->fivetuple_mask, 0,
> sizeof(uint32_t) * IXGBE_5TUPLE_ARRAY_SIZE);
>
> + /* initialize SYN filter */
> + filter_info->syn_info = 0;
> return 0;
> }
>
> @@ -5580,15 +5582,18 @@ ixgbe_syn_filter_set(struct rte_eth_dev *dev,
> bool add)
> {
> struct ixgbe_hw *hw =
> IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> + struct ixgbe_filter_info *filter_info =
> + IXGBE_DEV_PRIVATE_TO_FILTER_INFO(dev->data->dev_private);
> + uint32_t syn_info;
> uint32_t synqf;
>
> if (filter->queue >= IXGBE_MAX_RX_QUEUE_NUM)
> return -EINVAL;
>
> - synqf = IXGBE_READ_REG(hw, IXGBE_SYNQF);
> + syn_info = filter_info->syn_info;
>
> if (add) {
> - if (synqf & IXGBE_SYN_FILTER_ENABLE)
> + if (syn_info & IXGBE_SYN_FILTER_ENABLE)
> return -EINVAL;
> synqf = (uint32_t)(((filter->queue <<
> IXGBE_SYN_FILTER_QUEUE_SHIFT) &
> IXGBE_SYN_FILTER_QUEUE) | IXGBE_SYN_FILTER_ENABLE);
> @@ -5598,10 +5603,13 @@ ixgbe_syn_filter_set(struct rte_eth_dev *dev,
> else
> synqf &= ~IXGBE_SYN_FILTER_SYNQFP;
> } else {
> - if (!(synqf & IXGBE_SYN_FILTER_ENABLE))
> + synqf = IXGBE_READ_REG(hw, IXGBE_SYNQF);
> + if (!(syn_info & IXGBE_SYN_FILTER_ENABLE))
> return -ENOENT;
> synqf &= ~(IXGBE_SYN_FILTER_QUEUE |
> IXGBE_SYN_FILTER_ENABLE);
> }
> +
> + filter_info->syn_info = synqf;
> IXGBE_WRITE_REG(hw, IXGBE_SYNQF, synqf);
> IXGBE_WRITE_FLUSH(hw);
> return 0;
> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h
> b/drivers/net/ixgbe/ixgbe_ethdev.h
> index 4ff6338..827026c 100644
> --- a/drivers/net/ixgbe/ixgbe_ethdev.h
> +++ b/drivers/net/ixgbe/ixgbe_ethdev.h
> @@ -262,6 +262,8 @@ struct ixgbe_filter_info {
> /* Bit mask for every used 5tuple filter */
> uint32_t fivetuple_mask[IXGBE_5TUPLE_ARRAY_SIZE];
> struct ixgbe_5tuple_filter_list fivetuple_list;
> + /* store the SYN filter info */
> + uint32_t syn_info;
> };
>
> /*
> --
> 2.5.5
^ permalink raw reply
* Re: [PATCH v5 00/20] Decouple ethdev from PCI device
From: Ferruh Yigit @ 2017-01-03 14:40 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Jan Blunck, dev, shreyansh.jain, david.marchand, stephen,
Adrien Mazarguil, Nelio Laranjeiro
In-Reply-To: <1517043.pJ7WbAdCrg@xps13>
On 1/3/2017 2:06 PM, Thomas Monjalon wrote:
> 2017-01-03 12:24, Ferruh Yigit:
>> On 12/25/2016 10:33 PM, Thomas Monjalon wrote:
>>> Applied with some trivial fixes, thanks
>>
>> Getting following build error for mlx5 [1], it is mainly because verbs.h
>> also using container_of macro.
>>
>> [1]
>> In file included from
>> .../x86_64-native-linuxapp-gcc/include/rte_mbuf.h:57:0,
>> from .../x86_64-native-linuxapp-gcc/include/rte_ether.h:52,
>> from .../drivers/net/mlx5/mlx5_trigger.c:38:
>> /usr/include/infiniband/verbs.h: In function ‘verbs_get_device’:
>> .../x86_64-native-linuxapp-gcc/include/rte_common.h:350:40: error:
>> initialization discards ‘const’ qualifier from pointer target type
>> [-Werror=discarded-qualifiers]
>> typeof(((type *)0)->member) *_ptr = (ptr); \
>> ^
>
> Yes, this issue is fixed by upgrading mofed to version 3.4.
>
Confirmed.
^ permalink raw reply
* Re: [PATCH v3 1/4] ethdev: add firmware information get
From: Ferruh Yigit @ 2017-01-03 14:49 UTC (permalink / raw)
To: Yang, Qiming; +Cc: dev@dpdk.org, Horton, Remy, Thomas Monjalon
In-Reply-To: <F5DF4F0E3AFEF648ADC1C3C33AD4DBF16EDC973C@SHSMSX101.ccr.corp.intel.com>
On 1/3/2017 9:05 AM, Yang, Qiming wrote:
> Hi, Ferruh
> Please see the question below. In my opinion, etrack_id is just a name used to define the ID of one NIC.
> In kernel version ethtool, it will print this ID in the line of firmware verison.
> I know what is etrack_id mean, but I really don't know why this named etrack_id.
Hi Qiming,
I suggested the API based on fields you already used in your patch.
So, this API is to get FW version, is etrack_id something that defines
(part of) firmware version?
Thanks,
ferruh
> Can you explain this question?
>
> -----Original Message-----
> From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
> Sent: Tuesday, January 3, 2017 4:40 PM
> To: Yang, Qiming <qiming.yang@intel.com>
> Subject: Re: [PATCH v3 1/4] ethdev: add firmware information get
>
> Please reply below the question and on the mailing list.
> You'll have to explain why this name etrack_id.
>
> 2017-01-03 03:28, Yang, Qiming:
>> Hi, Thomas
>> etrack_id is not a terminology, it's decided by me.
>> Which is store the unique number of the firmware.
>> firmware-version: 5.04 0x800024ca
>> 800024ca is the etrack_id of this NIC.
>>
>> -----Original Message-----
>> From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
>> Sent: Monday, January 2, 2017 11:39 PM
>> To: Yang, Qiming <qiming.yang@intel.com>
>> Cc: dev@dpdk.org; Horton, Remy <remy.horton@intel.com>; Yigit, Ferruh <ferruh.yigit@intel.com>
>> Subject: Re: [PATCH v3 1/4] ethdev: add firmware information get
>>
>> 2016-12-27 20:30, Qiming Yang:
>>> /**
>>> + * Retrieve the firmware version of a device.
>>> + *
>>> + * @param port_id
>>> + * The port identifier of the device.
>>> + * @param fw_major
>>> + * A array pointer to store the major firmware version of a device.
>>> + * @param fw_minor
>>> + * A array pointer to store the minor firmware version of a device.
>>> + * @param fw_patch
>>> + * A array pointer to store the firmware patch number of a device.
>>> + * @param etrack_id
>>> + * A array pointer to store the nvm version of a device.
>>> + */
>>> +void rte_eth_dev_fw_info_get(uint8_t port_id, uint32_t *fw_major,
>>> + uint32_t *fw_minor, uint32_t *fw_patch, uint32_t *etrack_id);
>>
>> I have a reserve about the naming etrack_id.
>> Please could you point to a document explaining this ID?
>> Is it known outside of Intel?
>
>
^ permalink raw reply
* Re: [PATCH v3 1/4] ethdev: add firmware information get
From: Ferruh Yigit @ 2017-01-03 14:58 UTC (permalink / raw)
To: Qiming Yang, dev, thomas.monjalon; +Cc: remy.horton
In-Reply-To: <1482841816-54143-2-git-send-email-qiming.yang@intel.com>
On 12/27/2016 12:30 PM, Qiming Yang wrote:
> This patch adds a new API 'rte_eth_dev_fw_info_get' for fetching
> firmware related information by a given device.
>
> Signed-off-by: Qiming Yang <qiming.yang@intel.com>
> Acked-by: Remy Horton <remy.horton@intel.com>
> ---
> v2 changes:
> * modified some comment statements.
> v3 changes:
> * change API, use rte_eth_dev_fw_info_get(uint8_t port_id,
> uint32_t *fw_major, uint32_t *fw_minor, uint32_t *fw_patch,
> uint32_t *etrack_id) instead of rte_eth_dev_fwver_get(uint8_t port_id,
> char *fw_version, int fw_length).
> Add statusment in /doc/guides/nics/features/default.ini and
> release_17_02.rst.
> ---
> ---
> doc/guides/nics/features/default.ini | 1 +
> doc/guides/rel_notes/release_17_02.rst | 4 ++++
> lib/librte_ether/rte_ethdev.c | 14 ++++++++++++++
> lib/librte_ether/rte_ethdev.h | 23 +++++++++++++++++++++++
> lib/librte_ether/rte_ether_version.map | 1 +
> 5 files changed, 43 insertions(+)
This patch also should remove deprecation notice.
Item 3 of the requested changes.
>
> diff --git a/doc/guides/nics/features/default.ini b/doc/guides/nics/features/default.ini
> index f1bf9bf..8237ee4 100644
> --- a/doc/guides/nics/features/default.ini
> +++ b/doc/guides/nics/features/default.ini
> @@ -66,3 +66,4 @@ x86-64 =
> Usage doc =
> Design doc =
> Perf doc =
> +FW version =
I am not sure about this location, I think it can be before "EEPROM
dump", what do you think?
> diff --git a/doc/guides/rel_notes/release_17_02.rst b/doc/guides/rel_notes/release_17_02.rst
> index 180af82..f6dc6c0 100644
> --- a/doc/guides/rel_notes/release_17_02.rst
> +++ b/doc/guides/rel_notes/release_17_02.rst
> @@ -52,6 +52,10 @@ New Features
> See the :ref:`Generic flow API <Generic_flow_API>` documentation for more
> information.
>
> +* **Added firmware information get API.**
> + Added a new function ``rte_eth_dev_fw_info_get()`` to fetch firmware related
> + information by a given device. Information include major firmware version,
> + minor firmware version, patch number and etrack id.
>
> Resolved Issues
> ---------------
> diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
> index 280f0db..f399f09 100644
> --- a/lib/librte_ether/rte_ethdev.c
> +++ b/lib/librte_ether/rte_ethdev.c
> @@ -1586,6 +1586,20 @@ rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
> }
>
> void
> +rte_eth_dev_fw_info_get(uint8_t port_id, uint32_t *fw_major, uint32_t *fw_minor,
> + uint32_t *fw_patch, uint32_t *etrack_id)
I am for rte_eth_dev_fw_version_get(), to limit the scope of the API.
And API name and eth_dev_ops name should match..
> +{
> + struct rte_eth_dev *dev;
> +
> + RTE_ETH_VALID_PORTID_OR_RET(port_id);
> + dev = &rte_eth_devices[port_id];
> +
What do you think setting all arguments to zero here?
> + RTE_FUNC_PTR_OR_RET(*dev->dev_ops->fw_version_get);
> + (*dev->dev_ops->fw_version_get)(dev, fw_major, fw_minor,
> + fw_patch, etrack_id);
> +}
> +
<...>
> --- a/lib/librte_ether/rte_ether_version.map
> +++ b/lib/librte_ether/rte_ether_version.map
> @@ -156,5 +156,6 @@ DPDK_17.02 {
> rte_flow_flush;
> rte_flow_query;
> rte_flow_validate;
> + rte_eth_dev_fw_info_get;
Please add this alphabetically sorted.
>
> } DPDK_16.11;
>
^ permalink raw reply
* Re: [PATCH v3 2/4] net/e1000: add firmware version get
From: Ferruh Yigit @ 2017-01-03 15:02 UTC (permalink / raw)
To: Qiming Yang, dev, thomas.monjalon; +Cc: remy.horton
In-Reply-To: <1482841816-54143-3-git-send-email-qiming.yang@intel.com>
On 12/27/2016 12:30 PM, Qiming Yang wrote:
> This patch adds a new function eth_igb_fw_version_get.
>
> Signed-off-by: Qiming Yang <qiming.yang@intel.com>
> ---
> v3 changes:
> * use eth_igb_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major,
> u32 *fw_minor, u32 *fw_minor, u32 *fw_patch, u32 *etrack_id) instead
> of eth_igb_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
> int fw_length). Add statusment in /doc/guides/nics/features/igb.ini.
> ---
> ---
> doc/guides/nics/features/igb.ini | 1 +
> drivers/net/e1000/igb_ethdev.c | 43 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 44 insertions(+)
>
> diff --git a/doc/guides/nics/features/igb.ini b/doc/guides/nics/features/igb.ini
> index 9fafe72..ffd87ba 100644
> --- a/doc/guides/nics/features/igb.ini
> +++ b/doc/guides/nics/features/igb.ini
> @@ -39,6 +39,7 @@ EEPROM dump = Y
> Registers dump = Y
> BSD nic_uio = Y
> Linux UIO = Y
> +FW version = Y
Please keep same location with default.ini file. Why you are putting
this just into middle of the uio and vfio?
> Linux VFIO = Y
> x86-32 = Y
> x86-64 = Y
> diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
> index 4a15447..25344b7 100644
> --- a/drivers/net/e1000/igb_ethdev.c
> +++ b/drivers/net/e1000/igb_ethdev.c
> @@ -120,6 +120,8 @@ static int eth_igb_xstats_get_names(struct rte_eth_dev *dev,
> unsigned limit);
> static void eth_igb_stats_reset(struct rte_eth_dev *dev);
> static void eth_igb_xstats_reset(struct rte_eth_dev *dev);
> +static void eth_igb_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major,
> + u32 *fw_minor, u32 *fw_patch, u32 *etrack_id);
I think you can use a struct as parameter here. But beware, that struct
should NOT be a public struct.
> static void eth_igb_infos_get(struct rte_eth_dev *dev,
> struct rte_eth_dev_info *dev_info);
> static const uint32_t *eth_igb_supported_ptypes_get(struct rte_eth_dev *dev);
> @@ -389,6 +391,7 @@ static const struct eth_dev_ops eth_igb_ops = {
> .xstats_get_names = eth_igb_xstats_get_names,
> .stats_reset = eth_igb_stats_reset,
> .xstats_reset = eth_igb_xstats_reset,
> + .fw_version_get = eth_igb_fw_version_get,
> .dev_infos_get = eth_igb_infos_get,
> .dev_supported_ptypes_get = eth_igb_supported_ptypes_get,
> .mtu_set = eth_igb_mtu_set,
> @@ -1981,6 +1984,46 @@ eth_igbvf_stats_reset(struct rte_eth_dev *dev)
> }
>
<...>
^ permalink raw reply
* Re: [PATCH v3 3/4] net/ixgbe: add firmware version get
From: Ferruh Yigit @ 2017-01-03 15:04 UTC (permalink / raw)
To: Qiming Yang, dev, thomas.monjalon; +Cc: remy.horton
In-Reply-To: <1482841816-54143-4-git-send-email-qiming.yang@intel.com>
On 12/27/2016 12:30 PM, Qiming Yang wrote:
> This patch add a new function ixgbe_fw_version_get.
>
> Signed-off-by: Qiming Yang <qiming.yang@intel.com>
<...>
>
> static void
> +ixgbe_fw_version_get(struct rte_eth_dev *dev, __rte_unused u32 *fw_major,
> + __rte_unused u32 *fw_minor, __rte_unused u32 *fw_patch, u32 *etrack_id)
This API at least provide major and minor fw versions I think. Isn't
there any kind of FW version information for ixgbe? Just providing
etrack_id is not looking good.
> +{
> + struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> + u16 eeprom_verh, eeprom_verl;
> +
> + ixgbe_read_eeprom(hw, 0x2e, &eeprom_verh);
> + ixgbe_read_eeprom(hw, 0x2d, &eeprom_verl);
> +
> + *etrack_id = (eeprom_verh << 16) | eeprom_verl;
> +}
> +
> +static void
> ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
> {
> struct rte_pci_device *pci_dev = IXGBE_DEV_TO_PCI(dev);
>
^ permalink raw reply
* [PATCH] app/test: fix aad padding size in SGL operation
From: Arek Kusztal @ 2017-01-03 15:38 UTC (permalink / raw)
To: dev
Cc: fiona.trahe, pablo.de.lara.guarch, john.griffin, deepak.k.jain,
Arek Kusztal
This commit fixes unnecessary padding of aad for GCM using
scatter-gather list
Fixes: b71990ffa7e4 ("app/test: add SGL tests to cryptodev QAT suite")
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
app/test/test_cryptodev.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index ba6bbb5..3eaf1b7 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -5983,7 +5983,7 @@ create_gcm_operation_SGL(enum rte_crypto_cipher_operation op,
const unsigned int iv_len = tdata->iv.len;
const unsigned int aad_len = tdata->aad.len;
- unsigned int iv_pad_len = 0, aad_buffer_len = 0;
+ unsigned int iv_pad_len = 0;
/* Generate Crypto op data structure */
ut_params->op = rte_crypto_op_alloc(ts_params->op_mpool,
@@ -6023,17 +6023,15 @@ create_gcm_operation_SGL(enum rte_crypto_cipher_operation op,
rte_memcpy(sym_op->cipher.iv.data, tdata->iv.data, iv_pad_len);
- aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 16);
-
sym_op->auth.aad.data = (uint8_t *)rte_pktmbuf_prepend(
- ut_params->ibuf, aad_buffer_len);
+ ut_params->ibuf, aad_len);
TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
"no room to prepend aad");
sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
ut_params->ibuf);
sym_op->auth.aad.length = aad_len;
- memset(sym_op->auth.aad.data, 0, aad_buffer_len);
+ memset(sym_op->auth.aad.data, 0, aad_len);
rte_memcpy(sym_op->auth.aad.data, tdata->aad.data, aad_len);
TEST_HEXDUMP(stdout, "iv:", sym_op->cipher.iv.data, iv_pad_len);
@@ -6041,9 +6039,9 @@ create_gcm_operation_SGL(enum rte_crypto_cipher_operation op,
sym_op->auth.aad.data, aad_len);
sym_op->cipher.data.length = tdata->plaintext.len;
- sym_op->cipher.data.offset = aad_buffer_len + iv_pad_len;
+ sym_op->cipher.data.offset = aad_len + iv_pad_len;
- sym_op->auth.data.offset = aad_buffer_len + iv_pad_len;
+ sym_op->auth.data.offset = aad_len + iv_pad_len;
sym_op->auth.data.length = tdata->plaintext.len;
return 0;
--
2.1.0
^ permalink raw reply related
* Re: [PATCH 23/25] net/qede/base: semantic/formatting changes
From: Ferruh Yigit @ 2017-01-03 15:40 UTC (permalink / raw)
To: Mody, Rasesh, dev@dpdk.org; +Cc: Dept-Eng DPDK Dev
In-Reply-To: <BLUPR0701MB1572EE33C9AAAB45896FC4C19F6D0@BLUPR0701MB1572.namprd07.prod.outlook.com>
On 12/31/2016 7:41 AM, Mody, Rasesh wrote:
>> From: Ferruh Yigit [mailto:ferruh.yigit@intel.com]
>> Sent: Friday, December 23, 2016 7:42 AM
>>
>> On 12/3/2016 9:11 AM, Rasesh Mody wrote:
>>> This patch consists of semantic/formatting changes. It also includes
>>> comment additions.
>>
>> As far as I can see majority of the changes are formatting, but not all.
>>
>> Functional changes are hard to detect in this patch, what do you think
>> separating formatting/comments patches into another patch, so functional
>> changes can become more visible?
>
> There are few of places(ecore_hw_bar_size(), ecore_get_hw_info() and ecore_init_cmd_*), where there is a bit of code refactoring. However, they are not a major change. We have tried to isolate most of the functional changes and made them part of the separate patches as fit. I think, we can include a bit of description in commit message to cover it in this patch. Please let me know if you think otherwise.
I believe it is good to separate code refactoring into different patch
if possible, instead of covering this in commit log.
This makes functional changes easy to find in the future. In this patch
hard to spot them.
Thanks,
ferruh
>
>>>
>>> Signed-off-by: Rasesh Mody <Rasesh.Mody@cavium.com>
>>> ---
>> <...>
^ permalink raw reply
* Re: [PATCH 1/2] net/ixgbe: remove unused global variable
From: Ferruh Yigit @ 2017-01-03 15:44 UTC (permalink / raw)
To: Jerin Jacob, dev; +Cc: konstantin.ananyev, helin.zhang, thomas.monjalon
In-Reply-To: <46cd695f-f3b2-565c-fa38-f3f4b0c0c994@intel.com>
On 1/3/2017 1:23 PM, Ferruh Yigit wrote:
> On 12/27/2016 10:09 AM, Jerin Jacob wrote:
>> Removed unused "reg_info" global variable from ixgbe driver.
>>
>> cat build/app/testpmd.map | grep "Allocating common symbols" -A 15
>> Allocating common symbols
>> Common symbol size file
>> reg_info 0x18 build/lib/librte_pmd_ixgbe.a(ixgbe_ethdev.o)
>>
>> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>
> Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
>
Applied to dpdk-next-net/master, thanks.
^ permalink raw reply
* Re: [RFC 00/23] Refactor eal_init to remove panic() calls
From: Aaron Conole @ 2017-01-03 16:06 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: dev
In-Reply-To: <1909688.GKiQWP6byZ@xps13>
Thomas Monjalon <thomas.monjalon@6wind.com> writes:
> Hi Aaron,
>
> 2016-12-30 10:25, Aaron Conole:
>> In many cases, it's enough to simply let the application know that the
>> call to initialize DPDK has failed. A complete halt can then be
>> decided by the application based on error returned (and the app could
>> even attempt a possible re-attempt after some corrective action by the
>> user or application).
>>
>> There is still some work left in this series.
>
> Thanks for starting the work.
> I think it is candidate for 17.05 and can be promoted in the roadmap:
> http://dpdk.org/dev/roadmap
Okay.
> Have you checked wether these changes are modifying the API?
That'll be my last pass through.
> Some doxygen comments may need to be updated when a new error code
> is used.
Agreed; I also want to ensure that there's a consistent set of error
codes, and a consistent place to check for them.
I'll probably prefer to put them in rte_errno.
Thanks for your thoughts, Thomas!
^ permalink raw reply
* [PATCH] mk: disable ICC warning 188
From: Ferruh Yigit @ 2017-01-03 16:15 UTC (permalink / raw)
To: dev; +Cc: Thomas Monjalon, Ferruh Yigit
error #188: enumerated type mixed with another type
This is get when an integer assigned to an enum variable.
Since this usage is common and causing many ICC compilation errors, and
other compilers accept this usage. Disabling the warning.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
---
mk/toolchain/icc/rte.vars.mk | 1 +
1 file changed, 1 insertion(+)
diff --git a/mk/toolchain/icc/rte.vars.mk b/mk/toolchain/icc/rte.vars.mk
index ba69f1f..86d9ef7 100644
--- a/mk/toolchain/icc/rte.vars.mk
+++ b/mk/toolchain/icc/rte.vars.mk
@@ -71,6 +71,7 @@ TOOLCHAIN_ASFLAGS =
# was declared "deprecated"
WERROR_FLAGS := -Wall -w2 -diag-disable 271 -diag-warning 1478
WERROR_FLAGS += -diag-disable 13368 -diag-disable 15527
+WERROR_FLAGS += -diag-disable 188
ifeq ($(RTE_DEVEL_BUILD),y)
WERROR_FLAGS += -Werror-all
--
2.9.3
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