* [PATCH] drm/radeon/kms: fix formatting of vram and gtt info
@ 2010-12-03 19:37 Alex Deucher
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram base calculation on rs780/rs880 Alex Deucher
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram start calculation on ontario Alex Deucher
0 siblings, 2 replies; 4+ messages in thread
From: Alex Deucher @ 2010-12-03 19:37 UTC (permalink / raw)
To: airlied, dri-devel
print the full 64 bit values.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
---
drivers/gpu/drm/radeon/radeon_device.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 4985bfa..1b6d1c3 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -291,7 +291,7 @@ void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64
mc->mc_vram_size = mc->aper_size;
}
mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;
- dev_info(rdev->dev, "VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)\n",
+ dev_info(rdev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n",
mc->mc_vram_size >> 20, mc->vram_start,
mc->vram_end, mc->real_vram_size >> 20);
}
@@ -328,7 +328,7 @@ void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;
}
mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;
- dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
+ dev_info(rdev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",
mc->gtt_size >> 20, mc->gtt_start, mc->gtt_end);
}
--
1.7.1.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] drm/radeon/kms: fix vram base calculation on rs780/rs880
2010-12-03 19:37 [PATCH] drm/radeon/kms: fix formatting of vram and gtt info Alex Deucher
@ 2010-12-03 19:37 ` Alex Deucher
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram start calculation on ontario Alex Deucher
1 sibling, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2010-12-03 19:37 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: stable
Avoid overflowing a 32 bit value.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
---
drivers/gpu/drm/radeon/r600.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 53bfe3a..c6a37e0 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1198,8 +1198,10 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc
mc->vram_end, mc->real_vram_size >> 20);
} else {
u64 base = 0;
- if (rdev->flags & RADEON_IS_IGP)
- base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
+ if (rdev->flags & RADEON_IS_IGP) {
+ base = RREG32(MC_VM_FB_LOCATION) & 0xFFFF;
+ base <<= 24;
+ }
radeon_vram_location(rdev, &rdev->mc, base);
rdev->mc.gtt_base_align = 0;
radeon_gtt_location(rdev, mc);
--
1.7.1.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH] drm/radeon/kms: fix vram start calculation on ontario
2010-12-03 19:37 [PATCH] drm/radeon/kms: fix formatting of vram and gtt info Alex Deucher
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram base calculation on rs780/rs880 Alex Deucher
@ 2010-12-03 19:37 ` Alex Deucher
2010-12-15 16:04 ` [PATCH] drm/radeon/kms: fix vram start calculation on ontario (v2) Alex Deucher
1 sibling, 1 reply; 4+ messages in thread
From: Alex Deucher @ 2010-12-03 19:37 UTC (permalink / raw)
To: airlied, dri-devel
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
---
drivers/gpu/drm/radeon/evergreen.c | 6 ++++++
drivers/gpu/drm/radeon/evergreend.h | 1 +
drivers/gpu/drm/radeon/rv770.c | 11 +++--------
3 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 534953c..f8781f9 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1146,6 +1146,12 @@ static void evergreen_mc_program(struct radeon_device *rdev)
rdev->mc.vram_end >> 12);
}
WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+ if (rdev->flags & RADEON_IS_IGP) {
+ tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
+ tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
+ tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
+ WREG32(MC_FUS_VM_FB_OFFSET, tmp);
+ }
tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
WREG32(MC_VM_FB_LOCATION, tmp);
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 87fcaba..5b869ce 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -202,6 +202,7 @@
#define MC_VM_AGP_BOT 0x202C
#define MC_VM_AGP_BASE 0x2030
#define MC_VM_FB_LOCATION 0x2024
+#define MC_FUS_VM_FB_OFFSET 0x2898
#define MC_VM_MB_L1_TLB0_CNTL 0x2234
#define MC_VM_MB_L1_TLB1_CNTL 0x2238
#define MC_VM_MB_L1_TLB2_CNTL 0x223C
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 7c2e0b1..e414a14 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -271,12 +271,6 @@ static void rv770_mc_program(struct radeon_device *rdev)
rdev->mc.vram_end >> 12);
}
WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
- if (rdev->flags & RADEON_IS_IGP) {
- tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
- tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
- tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
- WREG32(MC_FUS_VM_FB_OFFSET, tmp);
- }
tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
WREG32(MC_VM_FB_LOCATION, tmp);
@@ -1076,8 +1070,9 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
} else {
u64 base = 0;
if (rdev->flags & RADEON_IS_IGP) {
- base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
- base |= RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000;
+ base = RREG32(MC_VM_FB_LOCATION) & 0xFFFF;
+ base <<= 24;
+ base |= (u64)(RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000);
}
radeon_vram_location(rdev, &rdev->mc, base);
rdev->mc.gtt_base_align = 0;
--
1.7.1.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH] drm/radeon/kms: fix vram start calculation on ontario (v2)
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram start calculation on ontario Alex Deucher
@ 2010-12-15 16:04 ` Alex Deucher
0 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2010-12-15 16:04 UTC (permalink / raw)
To: airlied, dri-devel
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
---
drivers/gpu/drm/radeon/evergreen.c | 6 ++++++
drivers/gpu/drm/radeon/evergreend.h | 1 +
drivers/gpu/drm/radeon/rv770.c | 13 +------------
drivers/gpu/drm/radeon/rv770d.h | 1 -
4 files changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 2ce9c3f..b586f7b 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1080,6 +1080,12 @@ static void evergreen_mc_program(struct radeon_device *rdev)
rdev->mc.vram_end >> 12);
}
WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+ if (rdev->flags & RADEON_IS_IGP) {
+ tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
+ tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
+ tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
+ WREG32(MC_FUS_VM_FB_OFFSET, tmp);
+ }
tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
WREG32(MC_VM_FB_LOCATION, tmp);
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 720fd9a..94140e1 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -203,6 +203,7 @@
#define MC_VM_AGP_BOT 0x202C
#define MC_VM_AGP_BASE 0x2030
#define MC_VM_FB_LOCATION 0x2024
+#define MC_FUS_VM_FB_OFFSET 0x2898
#define MC_VM_MB_L1_TLB0_CNTL 0x2234
#define MC_VM_MB_L1_TLB1_CNTL 0x2238
#define MC_VM_MB_L1_TLB2_CNTL 0x223C
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 2b66af9..4e9ecb5 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -237,12 +237,6 @@ static void rv770_mc_program(struct radeon_device *rdev)
rdev->mc.vram_end >> 12);
}
WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
- if (rdev->flags & RADEON_IS_IGP) {
- tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
- tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
- tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
- WREG32(MC_FUS_VM_FB_OFFSET, tmp);
- }
tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
WREG32(MC_VM_FB_LOCATION, tmp);
@@ -1040,12 +1034,7 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
mc->mc_vram_size >> 20, mc->vram_start,
mc->vram_end, mc->real_vram_size >> 20);
} else {
- u64 base = 0;
- if (rdev->flags & RADEON_IS_IGP) {
- base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
- base |= RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000;
- }
- radeon_vram_location(rdev, &rdev->mc, base);
+ radeon_vram_location(rdev, &rdev->mc, 0);
rdev->mc.gtt_base_align = 0;
radeon_gtt_location(rdev, mc);
}
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index e09a403..7b1c8f8 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -158,7 +158,6 @@
#define MC_VM_AGP_BOT 0x202C
#define MC_VM_AGP_BASE 0x2030
#define MC_VM_FB_LOCATION 0x2024
-#define MC_FUS_VM_FB_OFFSET 0x2898
#define MC_VM_MB_L1_TLB0_CNTL 0x2234
#define MC_VM_MB_L1_TLB1_CNTL 0x2238
#define MC_VM_MB_L1_TLB2_CNTL 0x223C
--
1.7.2.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2010-12-15 16:04 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2010-12-03 19:37 [PATCH] drm/radeon/kms: fix formatting of vram and gtt info Alex Deucher
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram base calculation on rs780/rs880 Alex Deucher
2010-12-03 19:37 ` [PATCH] drm/radeon/kms: fix vram start calculation on ontario Alex Deucher
2010-12-15 16:04 ` [PATCH] drm/radeon/kms: fix vram start calculation on ontario (v2) Alex Deucher
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