[PATCH 0/3] Additional radeon audio cleanups

[PATCH 0/3] Additional radeon audio cleanups

[alexdeucher]

From: Alex Deucher <alexander.deucher@amd.com>

This set of patches does some additional audio cleanups
and switches to per asic callbacks for audio.

Alex Deucher (3):
  drm/radeon: clean up audio supported check
  drm/radeon: clean up audio dto programming
  drm/radeon: switch audio handling to use callbacks

 drivers/gpu/drm/radeon/atombios_encoders.c |   17 ++--
 drivers/gpu/drm/radeon/evergreen_hdmi.c    |   43 +++++++++-
 drivers/gpu/drm/radeon/r600_audio.c        |   64 +-------------
 drivers/gpu/drm/radeon/r600_hdmi.c         |  135 ++++++++++++---------------
 drivers/gpu/drm/radeon/radeon.h            |   10 +-
 drivers/gpu/drm/radeon/radeon_asic.c       |   18 ++++
 drivers/gpu/drm/radeon/radeon_asic.h       |    5 +-
 7 files changed, 138 insertions(+), 154 deletions(-)

-- 
1.7.7.5

[PATCH 1/3] drm/radeon: clean up audio supported check

[alexdeucher]

From: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/r600_audio.c |    5 +----
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index cb03fe2..72561e4 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -57,10 +57,7 @@ static bool radeon_dig_encoder(struct drm_encoder *encoder)
  */
 static int r600_audio_chipset_supported(struct radeon_device *rdev)
 {
-	return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE6(rdev))
-		|| rdev->family == CHIP_RS600
-		|| rdev->family == CHIP_RS690
-		|| rdev->family == CHIP_RS740;
+	return ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE6(rdev);
 }
 
 struct r600_audio r600_audio_status(struct radeon_device *rdev)
-- 
1.7.7.5

[PATCH 2/3] drm/radeon: clean up audio dto programming

[alexdeucher]

From: Alex Deucher <alexander.deucher@amd.com>

Split into DCE2/3 and DCE4/5 variants. Still todo is to
calculate the DTO dividers properly.  Add proper formula
to the comments.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/evergreen_hdmi.c |   26 +++++++++++++-
 drivers/gpu/drm/radeon/r600_audio.c     |   59 -------------------------------
 drivers/gpu/drm/radeon/r600_hdmi.c      |   26 +++++++++++++-
 drivers/gpu/drm/radeon/radeon_asic.h    |    1 -
 4 files changed, 50 insertions(+), 62 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index 380933b..9fc22ee 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -85,6 +85,30 @@ static void evergreen_hdmi_update_avi_infoframe(struct drm_encoder *encoder,
 		frame[0xC] | (frame[0xD] << 8));
 }
 
+static void evergreen_audio_set_dto(struct drm_encoder *encoder, u32 clock)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
+	u32 base_rate = 48000;
+
+	if (!dig || !dig->afmt)
+		return;
+
+	/* XXX: properly calculate this */
+	/* XXX two dtos; generally use dto0 for hdmi */
+	/* Express [24MHz / target pixel clock] as an exact rational
+	 * number (coefficient of two integer numbers.  DCCG_AUDIO_DTOx_PHASE
+	 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
+	 */
+	WREG32(DCCG_AUDIO_DTO0_PHASE, (base_rate*50) & 0xffffff);
+	WREG32(DCCG_AUDIO_DTO0_MODULE, (clock*100) & 0xffffff);
+	WREG32(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL(radeon_crtc->crtc_id));
+}
+
+
 /*
  * update the info frames with the data from the current display mode
  */
@@ -104,7 +128,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
 		return;
 	offset = dig->afmt->offset;
 
-	r600_audio_set_clock(encoder, mode->clock);
+	evergreen_audio_set_dto(encoder, mode->clock);
 
 	WREG32(HDMI_VBI_PACKET_CONTROL + offset,
 	       HDMI_NULL_SEND); /* send null packets when required */
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index 72561e4..c92eb86 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -181,65 +181,6 @@ int r600_audio_init(struct radeon_device *rdev)
 }
 
 /*
- * atach the audio codec to the clock source of the encoder
- */
-void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
-{
-	struct drm_device *dev = encoder->dev;
-	struct radeon_device *rdev = dev->dev_private;
-	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
-	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
-	int base_rate = 48000;
-
-	switch (radeon_encoder->encoder_id) {
-	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
-	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-		WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
-		break;
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
-	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-		WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
-		break;
-	default:
-		dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
-			  radeon_encoder->encoder_id);
-		return;
-	}
-
-	if (ASIC_IS_DCE4(rdev)) {
-		/* TODO: other PLLs? */
-		WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
-		WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
-		WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
-
-		/* Select DTO source */
-		WREG32(0x5ac, radeon_crtc->crtc_id);
-	} else {
-		switch (dig->dig_encoder) {
-		case 0:
-			WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
-			WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
-			WREG32(R600_AUDIO_CLK_SRCSEL, 0);
-			break;
-
-		case 1:
-			WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
-			WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
-			WREG32(R600_AUDIO_CLK_SRCSEL, 1);
-			break;
-		default:
-			dev_err(rdev->dev,
-				"Unsupported DIG on encoder 0x%02X\n",
-				radeon_encoder->encoder_id);
-			return;
-		}
-	}
-}
-
-/*
  * release the audio timer
  * TODO: How to do this correctly on SMP systems?
  */
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 95397b2..62721bf 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -226,6 +226,30 @@ static void r600_hdmi_audio_workaround(struct drm_encoder *encoder)
 		 value, ~HDMI0_AUDIO_TEST_EN);
 }
 
+void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+	u32 base_rate = 48000;
+
+	if (!dig || !dig->afmt)
+		return;
+
+	/* there are two DTOs selected by DCCG_AUDIO_DTO_SELECT.
+	 * doesn't matter which one you use.  Just use the first one.
+	 */
+	/* XXX: properly calculate this */
+	/* XXX two dtos; generally use dto0 for hdmi */
+	/* Express [24MHz / target pixel clock] as an exact rational
+	 * number (coefficient of two integer numbers.  DCCG_AUDIO_DTOx_PHASE
+	 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
+	 */
+	WREG32(DCCG_AUDIO_DTO0_PHASE, (base_rate*50) & 0xffffff);
+	WREG32(DCCG_AUDIO_DTO0_MODULE, (clock*100) & 0xffffff);
+	WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */
+}
 
 /*
  * update the info frames with the data from the current display mode
@@ -246,7 +270,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
 		return;
 	offset = dig->afmt->offset;
 
-	r600_audio_set_clock(encoder, mode->clock);
+	r600_audio_set_dto(encoder, mode->clock);
 
 	WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
 	       HDMI0_NULL_SEND); /* send null packets when required */
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 2add526..fa8b8bf 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -374,7 +374,6 @@ void r600_disable_interrupts(struct radeon_device *rdev);
 void r600_rlc_stop(struct radeon_device *rdev);
 /* r600 audio */
 int r600_audio_init(struct radeon_device *rdev);
-void r600_audio_set_clock(struct drm_encoder *encoder, int clock);
 struct r600_audio r600_audio_status(struct radeon_device *rdev);
 void r600_audio_fini(struct radeon_device *rdev);
 int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
-- 
1.7.7.5

[PATCH 3/3] drm/radeon: switch audio handling to use callbacks

[alexdeucher]

From: Alex Deucher <alexander.deucher@amd.com>

Register audio callbacks for asic where we support
audio.  Cleans up the code and makes it easier to
add support for newer asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/atombios_encoders.c |   17 ++---
 drivers/gpu/drm/radeon/evergreen_hdmi.c    |   17 +++++
 drivers/gpu/drm/radeon/r600_hdmi.c         |  109 +++++++++-------------------
 drivers/gpu/drm/radeon/radeon.h            |   10 ++--
 drivers/gpu/drm/radeon/radeon_asic.c       |   18 +++++
 drivers/gpu/drm/radeon/radeon_asic.h       |    4 +
 6 files changed, 87 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 4552d4a..44a7da6 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -2150,13 +2150,10 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
 	atombios_apply_encoder_quirks(encoder, adjusted_mode);
 
 	if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {
-		r600_hdmi_enable(encoder);
-		if (ASIC_IS_DCE6(rdev))
-			; /* TODO (use pointers instead of if-s?) */
-		else if (ASIC_IS_DCE4(rdev))
-			evergreen_hdmi_setmode(encoder, adjusted_mode);
-		else
-			r600_hdmi_setmode(encoder, adjusted_mode);
+		if (rdev->asic->display.hdmi_enable)
+			radeon_hdmi_enable(rdev, encoder, true);
+		if (rdev->asic->display.hdmi_setmode)
+			radeon_hdmi_setmode(rdev, encoder, adjusted_mode);
 	}
 }
 
@@ -2413,8 +2410,10 @@ static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
 
 disable_done:
 	if (radeon_encoder_is_digital(encoder)) {
-		if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI)
-			r600_hdmi_disable(encoder);
+		if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {
+			if (rdev->asic->display.hdmi_enable)
+				radeon_hdmi_enable(rdev, encoder, false);
+		}
 		dig = radeon_encoder->enc_priv;
 		dig->dig_encoder = -1;
 	}
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index 9fc22ee..e32fd2c 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -219,3 +219,20 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
 	WREG32(AFMT_RAMP_CONTROL2 + offset, 0x00000001);
 	WREG32(AFMT_RAMP_CONTROL3 + offset, 0x00000001);
 }
+
+void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
+{
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+
+	/* Silent, r600_hdmi_enable will raise WARN for us */
+	if (enable && dig->afmt->enabled)
+		return;
+	if (!enable && !dig->afmt->enabled)
+		return;
+
+	dig->afmt->enabled = enable;
+
+	DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",
+		  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);
+}
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 62721bf..2e15888 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -439,112 +439,73 @@ void r600_hdmi_update_audio_settings(struct drm_encoder *encoder)
 /*
  * enable the HDMI engine
  */
-void r600_hdmi_enable(struct drm_encoder *encoder)
+void r600_hdmi_enable(struct drm_encoder *encoder, bool enable)
 {
 	struct drm_device *dev = encoder->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
-	uint32_t offset;
-	u32 hdmi;
-
-	if (ASIC_IS_DCE6(rdev))
-		return;
+	u32 hdmi = HDMI0_ERROR_ACK;
 
 	/* Silent, r600_hdmi_enable will raise WARN for us */
-	if (dig->afmt->enabled)
+	if (enable && dig->afmt->enabled)
+		return;
+	if (!enable && !dig->afmt->enabled)
 		return;
-	offset = dig->afmt->offset;
 
 	/* Older chipsets require setting HDMI and routing manually */
-	if (ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE3(rdev)) {
-		hdmi = HDMI0_ERROR_ACK | HDMI0_ENABLE;
+	if (!ASIC_IS_DCE3(rdev)) {
+		if (enable)
+			hdmi |= HDMI0_ENABLE;
 		switch (radeon_encoder->encoder_id) {
 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
-			WREG32_OR(AVIVO_TMDSA_CNTL, AVIVO_TMDSA_CNTL_HDMI_EN);
-			hdmi |= HDMI0_STREAM(HDMI0_STREAM_TMDSA);
+			if (enable) {
+				WREG32_OR(AVIVO_TMDSA_CNTL, AVIVO_TMDSA_CNTL_HDMI_EN);
+				hdmi |= HDMI0_STREAM(HDMI0_STREAM_TMDSA);
+			} else {
+				WREG32_AND(AVIVO_TMDSA_CNTL, ~AVIVO_TMDSA_CNTL_HDMI_EN);
+			}
 			break;
 		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-			WREG32_OR(AVIVO_LVTMA_CNTL, AVIVO_LVTMA_CNTL_HDMI_EN);
-			hdmi |= HDMI0_STREAM(HDMI0_STREAM_LVTMA);
+			if (enable) {
+				WREG32_OR(AVIVO_LVTMA_CNTL, AVIVO_LVTMA_CNTL_HDMI_EN);
+				hdmi |= HDMI0_STREAM(HDMI0_STREAM_LVTMA);
+			} else {
+				WREG32_AND(AVIVO_LVTMA_CNTL, ~AVIVO_LVTMA_CNTL_HDMI_EN);
+			}
 			break;
 		case ENCODER_OBJECT_ID_INTERNAL_DDI:
-			WREG32_OR(DDIA_CNTL, DDIA_HDMI_EN);
-			hdmi |= HDMI0_STREAM(HDMI0_STREAM_DDIA);
+			if (enable) {
+				WREG32_OR(DDIA_CNTL, DDIA_HDMI_EN);
+				hdmi |= HDMI0_STREAM(HDMI0_STREAM_DDIA);
+			} else {
+				WREG32_AND(DDIA_CNTL, ~DDIA_HDMI_EN);
+			}
 			break;
 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
-			hdmi |= HDMI0_STREAM(HDMI0_STREAM_DVOA);
+			if (enable)
+				hdmi |= HDMI0_STREAM(HDMI0_STREAM_DVOA);
 			break;
 		default:
 			dev_err(rdev->dev, "Invalid encoder for HDMI: 0x%X\n",
 				radeon_encoder->encoder_id);
 			break;
 		}
-		WREG32(HDMI0_CONTROL + offset, hdmi);
+		WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi);
 	}
 
 	if (rdev->irq.installed) {
 		/* if irq is available use it */
 		/* XXX: shouldn't need this on any asics.  Double check DCE2/3 */
-		if (!ASIC_IS_DCE4(rdev))
+		if (enable)
 			radeon_irq_kms_enable_afmt(rdev, dig->afmt->id);
+		else
+			radeon_irq_kms_disable_afmt(rdev, dig->afmt->id);
 	}
 
-	dig->afmt->enabled = true;
+	dig->afmt->enabled = enable;
 
-	DRM_DEBUG("Enabling HDMI interface @ 0x%04X for encoder 0x%x\n",
-		  offset, radeon_encoder->encoder_id);
+	DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",
+		  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);
 }
 
-/*
- * disable the HDMI engine
- */
-void r600_hdmi_disable(struct drm_encoder *encoder)
-{
-	struct drm_device *dev = encoder->dev;
-	struct radeon_device *rdev = dev->dev_private;
-	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
-	uint32_t offset;
-
-	if (ASIC_IS_DCE6(rdev))
-		return;
-
-	/* Called for ATOM_ENCODER_MODE_HDMI only */
-	if (!dig || !dig->afmt) {
-		return;
-	}
-	if (!dig->afmt->enabled)
-		return;
-	offset = dig->afmt->offset;
-
-	DRM_DEBUG("Disabling HDMI interface @ 0x%04X for encoder 0x%x\n",
-		  offset, radeon_encoder->encoder_id);
-
-	/* disable irq */
-	radeon_irq_kms_disable_afmt(rdev, dig->afmt->id);
-
-	/* Older chipsets not handled by AtomBIOS */
-	if (ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE3(rdev)) {
-		switch (radeon_encoder->encoder_id) {
-		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
-			WREG32_AND(AVIVO_TMDSA_CNTL, ~AVIVO_TMDSA_CNTL_HDMI_EN);
-			break;
-		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-			WREG32_AND(AVIVO_LVTMA_CNTL, ~AVIVO_LVTMA_CNTL_HDMI_EN);
-			break;
-		case ENCODER_OBJECT_ID_INTERNAL_DDI:
-			WREG32_AND(DDIA_CNTL, ~DDIA_HDMI_EN);
-			break;
-		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
-			break;
-		default:
-			dev_err(rdev->dev, "Invalid encoder for HDMI: 0x%X\n",
-				radeon_encoder->encoder_id);
-			break;
-		}
-		WREG32(HDMI0_CONTROL + offset, HDMI0_ERROR_ACK);
-	}
-
-	dig->afmt->enabled = false;
-}
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 7935370..856a67d 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1270,6 +1270,9 @@ struct radeon_asic {
 		void (*set_backlight_level)(struct radeon_encoder *radeon_encoder, u8 level);
 		/* get backlight level */
 		u8 (*get_backlight_level)(struct radeon_encoder *radeon_encoder);
+		/* audio callbacks */
+		void (*hdmi_enable)(struct drm_encoder *encoder, bool enable);
+		void (*hdmi_setmode)(struct drm_encoder *encoder, struct drm_display_mode *mode);
 	} display;
 	/* copy functions for bo handling */
 	struct {
@@ -1878,6 +1881,8 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
 #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc))
 #define radeon_set_backlight_level(rdev, e, l) (rdev)->asic->display.set_backlight_level((e), (l))
 #define radeon_get_backlight_level(rdev, e) (rdev)->asic->display.get_backlight_level((e))
+#define radeon_hdmi_enable(rdev, e, b) (rdev)->asic->display.hdmi_enable((e), (b))
+#define radeon_hdmi_setmode(rdev, e, m) (rdev)->asic->display.hdmi_setmode((e), (m))
 #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence))
 #define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait))
 #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f))
@@ -2013,9 +2018,6 @@ struct radeon_hdmi_acr {
 
 extern struct radeon_hdmi_acr r600_hdmi_acr(uint32_t clock);
 
-extern void r600_hdmi_enable(struct drm_encoder *encoder);
-extern void r600_hdmi_disable(struct drm_encoder *encoder);
-extern void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
 extern u32 r6xx_remap_render_backend(struct radeon_device *rdev,
 				     u32 tiling_pipe_num,
 				     u32 max_rb_num,
@@ -2026,8 +2028,6 @@ extern u32 r6xx_remap_render_backend(struct radeon_device *rdev,
  * evergreen functions used by radeon_encoder.c
  */
 
-extern void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
-
 extern int ni_init_microcode(struct radeon_device *rdev);
 extern int ni_mc_load_microcode(struct radeon_device *rdev);
 
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 48d0200..6417132 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -656,6 +656,8 @@ static struct radeon_asic rs600_asic = {
 		.wait_for_vblank = &avivo_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &r600_hdmi_enable,
+		.hdmi_setmode = &r600_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r100_copy_blit,
@@ -732,6 +734,8 @@ static struct radeon_asic rs690_asic = {
 		.wait_for_vblank = &avivo_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &r600_hdmi_enable,
+		.hdmi_setmode = &r600_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r100_copy_blit,
@@ -970,6 +974,8 @@ static struct radeon_asic r600_asic = {
 		.wait_for_vblank = &avivo_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &r600_hdmi_enable,
+		.hdmi_setmode = &r600_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
@@ -1056,6 +1062,8 @@ static struct radeon_asic rs780_asic = {
 		.wait_for_vblank = &avivo_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &r600_hdmi_enable,
+		.hdmi_setmode = &r600_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
@@ -1151,6 +1159,8 @@ static struct radeon_asic rv770_asic = {
 		.wait_for_vblank = &avivo_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &r600_hdmi_enable,
+		.hdmi_setmode = &r600_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
@@ -1247,6 +1257,8 @@ static struct radeon_asic evergreen_asic = {
 		.wait_for_vblank = &dce4_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &evergreen_hdmi_enable,
+		.hdmi_setmode = &evergreen_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
@@ -1343,6 +1355,8 @@ static struct radeon_asic sumo_asic = {
 		.wait_for_vblank = &dce4_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &evergreen_hdmi_enable,
+		.hdmi_setmode = &evergreen_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
@@ -1439,6 +1453,8 @@ static struct radeon_asic btc_asic = {
 		.wait_for_vblank = &dce4_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &evergreen_hdmi_enable,
+		.hdmi_setmode = &evergreen_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
@@ -1578,6 +1594,8 @@ static struct radeon_asic cayman_asic = {
 		.wait_for_vblank = &dce4_wait_for_vblank,
 		.set_backlight_level = &atombios_set_backlight_level,
 		.get_backlight_level = &atombios_get_backlight_level,
+		.hdmi_enable = &evergreen_hdmi_enable,
+		.hdmi_setmode = &evergreen_hdmi_setmode,
 	},
 	.copy = {
 		.blit = &r600_copy_blit,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index fa8b8bf..2c87365 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -378,6 +378,8 @@ struct r600_audio r600_audio_status(struct radeon_device *rdev);
 void r600_audio_fini(struct radeon_device *rdev);
 int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
 void r600_hdmi_update_audio_settings(struct drm_encoder *encoder);
+void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
+void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
 /* r600 blit */
 int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages,
 			   struct radeon_fence **fence, struct radeon_sa_bo **vb,
@@ -476,6 +478,8 @@ int evergreen_copy_dma(struct radeon_device *rdev,
 		       uint64_t src_offset, uint64_t dst_offset,
 		       unsigned num_gpu_pages,
 		       struct radeon_fence **fence);
+void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
+void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
 
 /*
  * cayman
-- 
1.7.7.5

Re: [PATCH 0/3] Additional radeon audio cleanups

[Christian König]

Am 18.04.2013 17:35, schrieb alexdeucher@gmail.com:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This set of patches does some additional audio cleanups
> and switches to per asic callbacks for audio.
>
> Alex Deucher (3):
>    drm/radeon: clean up audio supported check
>    drm/radeon: clean up audio dto programming
>    drm/radeon: switch audio handling to use callbacks

Looks good to me and is:

Reviewed-by: Christian König <christian.koenig@amd.com>

>
>   drivers/gpu/drm/radeon/atombios_encoders.c |   17 ++--
>   drivers/gpu/drm/radeon/evergreen_hdmi.c    |   43 +++++++++-
>   drivers/gpu/drm/radeon/r600_audio.c        |   64 +-------------
>   drivers/gpu/drm/radeon/r600_hdmi.c         |  135 ++++++++++++---------------
>   drivers/gpu/drm/radeon/radeon.h            |   10 +-
>   drivers/gpu/drm/radeon/radeon_asic.c       |   18 ++++
>   drivers/gpu/drm/radeon/radeon_asic.h       |    5 +-
>   7 files changed, 138 insertions(+), 154 deletions(-)
>

Re: [PATCH 2/3] drm/radeon: clean up audio dto programming

[Rafał Miłecki]

2013/4/18  <alexdeucher@gmail.com>:
> -       switch (radeon_encoder->encoder_id) {
> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
> -       case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
> -               WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
> -               break;
> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
> -               WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
> -               break;
> -       default:
> -               dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
> -                         radeon_encoder->encoder_id);
> -               return;
> -       }

Are you sure we can just drop that part?

I'd appreciate waiting with this patch until next week, I'll test it
over the weekend on my RV620.

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Re: [PATCH 1/3] drm/radeon: clean up audio supported check

[Rafał Miłecki]

2013/4/18  <alexdeucher@gmail.com>:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/radeon/r600_audio.c |    5 +----
>  1 files changed, 1 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
> index cb03fe2..72561e4 100644
> --- a/drivers/gpu/drm/radeon/r600_audio.c
> +++ b/drivers/gpu/drm/radeon/r600_audio.c
> @@ -57,10 +57,7 @@ static bool radeon_dig_encoder(struct drm_encoder *encoder)
>   */
>  static int r600_audio_chipset_supported(struct radeon_device *rdev)
>  {
> -       return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE6(rdev))
> -               || rdev->family == CHIP_RS600
> -               || rdev->family == CHIP_RS690
> -               || rdev->family == CHIP_RS740;
> +       return ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE6(rdev);
>  }
>
>  struct r600_audio r600_audio_status(struct radeon_device *rdev)

Looks fine :)

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Re: [PATCH 2/3] drm/radeon: clean up audio dto programming

[Alex Deucher]

On Fri, Apr 19, 2013 at 2:10 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
> 2013/4/18  <alexdeucher@gmail.com>:
>> -       switch (radeon_encoder->encoder_id) {
>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
>> -       case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
>> -               WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
>> -               break;
>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
>> -               WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
>> -               break;
>> -       default:
>> -               dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
>> -                         radeon_encoder->encoder_id);
>> -               return;
>> -       }
>
> Are you sure we can just drop that part?

Yes we should be able to drop that part.  The only relevant bits are
9:8 which allows you to force which DTO is used by the audio block.  0
= auto, 1 = force dto0, 2 = force dto1.  Additionally, that register
doesn't exist on evergreen and newer.  On evergreen and newer there is
a DIG PHY register at the same offset which may explain the display
problems some people are experiencing.

>
> I'd appreciate waiting with this patch until next week, I'll test it
> over the weekend on my RV620.

Sounds good.

Alex
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Re: [PATCH 3/3] drm/radeon: switch audio handling to use callbacks

[Rafał Miłecki]

2013/4/18  <alexdeucher@gmail.com>:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> Register audio callbacks for asic where we support
> audio.  Cleans up the code and makes it easier to
> add support for newer asics.

Ack

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Re: [PATCH 2/3] drm/radeon: clean up audio dto programming

[Rafał Miłecki]

2013/4/19 Alex Deucher <alexdeucher@gmail.com>:
> On Fri, Apr 19, 2013 at 2:10 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>> 2013/4/18  <alexdeucher@gmail.com>:
>>> -       switch (radeon_encoder->encoder_id) {
>>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
>>> -               WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
>>> -               break;
>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
>>> -               WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
>>> -               break;
>>> -       default:
>>> -               dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
>>> -                         radeon_encoder->encoder_id);
>>> -               return;
>>> -       }
>>
>> Are you sure we can just drop that part?
>
> Yes we should be able to drop that part.  The only relevant bits are
> 9:8 which allows you to force which DTO is used by the audio block.  0
> = auto, 1 = force dto0, 2 = force dto1.  Additionally, that register
> doesn't exist on evergreen and newer.  On evergreen and newer there is
> a DIG PHY register at the same offset which may explain the display
> problems some people are experiencing.
>
>>
>> I'd appreciate waiting with this patch until next week, I'll test it
>> over the weekend on my RV620.
>
> Sounds good.

Due to problems with running fglrx I didn't manage to test that patch
over weekend.

As you see some docs and know that registers, I hope this patch is
fine. In case of problems we can always easy revert the problematic
part :)

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Re: [PATCH 2/3] drm/radeon: clean up audio dto programming

[Rafał Miłecki]

2013/4/19 Alex Deucher <alexdeucher@gmail.com>:
> On Fri, Apr 19, 2013 at 2:10 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>> 2013/4/18  <alexdeucher@gmail.com>:
>>> -       switch (radeon_encoder->encoder_id) {
>>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
>>> -               WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
>>> -               break;
>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
>>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
>>> -               WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
>>> -               break;
>>> -       default:
>>> -               dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
>>> -                         radeon_encoder->encoder_id);
>>> -               return;
>>> -       }
>>
>> Are you sure we can just drop that part?
>
> Yes we should be able to drop that part.  The only relevant bits are
> 9:8 which allows you to force which DTO is used by the audio block.  0
> = auto, 1 = force dto0, 2 = force dto1.  Additionally, that register
> doesn't exist on evergreen and newer.  On evergreen and newer there is
> a DIG PHY register at the same offset which may explain the display
> problems some people are experiencing.

For now I can only say that fglrx seems to be changing that 0x7344:

RREG32(0x00000534); -> 0x00000001	DCCG_AUDIO_DTO_SELECT
WREG32(0x00000534, 0x00000000);		DCCG_AUDIO_DTO_SELECT

RREG32(0x00007344); -> 0x00000270
WREG32(0x00007344, 0x00000170);

RREG32(0x00000518); -> 0x00000000	DCCG_AUDIO_DTO0_MODULE
WREG32(0x00000518, 0x00e297d0);		DCCG_AUDIO_DTO0_MODULE
RREG32(0x00000514); -> 0x00000000	DCCG_AUDIO_DTO0_PHASE
WREG32(0x00000514, 0x00249f00);		DCCG_AUDIO_DTO0_PHASE

I can't say how well radeon is going to work without that, just
informing you about fglrx.

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Re: [PATCH 2/3] drm/radeon: clean up audio dto programming

[Alex Deucher]

On Mon, Apr 22, 2013 at 1:43 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
> 2013/4/19 Alex Deucher <alexdeucher@gmail.com>:
>> On Fri, Apr 19, 2013 at 2:10 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>>> 2013/4/18  <alexdeucher@gmail.com>:
>>>> -       switch (radeon_encoder->encoder_id) {
>>>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
>>>> -       case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
>>>> -               WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
>>>> -               break;
>>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
>>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
>>>> -       case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
>>>> -       case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
>>>> -               WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
>>>> -               break;
>>>> -       default:
>>>> -               dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
>>>> -                         radeon_encoder->encoder_id);
>>>> -               return;
>>>> -       }
>>>
>>> Are you sure we can just drop that part?
>>
>> Yes we should be able to drop that part.  The only relevant bits are
>> 9:8 which allows you to force which DTO is used by the audio block.  0
>> = auto, 1 = force dto0, 2 = force dto1.  Additionally, that register
>> doesn't exist on evergreen and newer.  On evergreen and newer there is
>> a DIG PHY register at the same offset which may explain the display
>> problems some people are experiencing.
>
> For now I can only say that fglrx seems to be changing that 0x7344:
>
> RREG32(0x00000534); -> 0x00000001       DCCG_AUDIO_DTO_SELECT
> WREG32(0x00000534, 0x00000000);         DCCG_AUDIO_DTO_SELECT

Selects DTO0.

>
> RREG32(0x00007344); -> 0x00000270
> WREG32(0x00007344, 0x00000170);

Force audio to use DTO0.  I think "auto" should work, but I can add
this back for dce2/3 if you'd prefer.

>
> RREG32(0x00000518); -> 0x00000000       DCCG_AUDIO_DTO0_MODULE
> WREG32(0x00000518, 0x00e297d0);         DCCG_AUDIO_DTO0_MODULE
> RREG32(0x00000514); -> 0x00000000       DCCG_AUDIO_DTO0_PHASE
> WREG32(0x00000514, 0x00249f00);         DCCG_AUDIO_DTO0_PHASE
>

Set the DTO0 dividers.

> I can't say how well radeon is going to work without that, just
> informing you about fglrx.

There are two dtos, you can use either one. AUDIO_DTO_SELECT selects
whether you are using DTO0 or DTO1.  The dtos determine how the audio
signal is encoded so that it can be reconstructed in the sink.

24Mhz / pixel clock = AUDIO_DTO0_PHASE / AUDIO_DTO0_MODULE

The current code needs to be updated to calculate this properly at some point.

Alex
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