[PATCH 2/2] drm/exynos: mipi-dsi: consider non-continuous clock mode

[Inki Dae <inki.dae@samsung.com>]

This patch adds non-continuous clock mode support.

Clock mode on Clock Lane is continuous clock by default.
So if we want to transmit data in non-continuous clock mode
to reduce power consumption, then host driver should clear
DSIM_TX_REQUEST_HSCLK.

For this, this patch makes the host driver set DSIM_TX_REQUEST_HSCLK
only in case that dsi->mode_flags has no MIPI_DSI_CLOCK_NON_CONTINUOUS
flag.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c |   32 +++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 86aebd8..8c43c96 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -493,8 +493,17 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi)
 			| DSIM_ESC_PRESCALER(esc_div)
 			| DSIM_LANE_ESC_CLK_EN_CLK
 			| DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1)
-			| DSIM_BYTE_CLK_SRC(0)
-			| DSIM_TX_REQUEST_HSCLK;
+			| DSIM_BYTE_CLK_SRC(0);
+
+	/*
+	 * Set DSIM_TX_REQUEST_HSCLK only in case of not requesting
+	 * non-continous clock mode. So if MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	 * then host controller will turn off the HS clock between high-speed
+	 * transmissions.
+	 */
+	if (!(dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
+		reg |= DSIM_TX_REQUEST_HSCLK;
+
 	writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
 
 	return 0;
@@ -701,10 +710,29 @@ static void exynos_dsi_set_display_mode(struct exynos_dsi *dsi)
 	dev_dbg(dsi->dev, "LCD size = %dx%d\n", vm->hactive, vm->vactive);
 }
 
+static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi,
+					bool enable)
+{
+	u32 reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG);
+
+	reg &= ~DSIM_TX_REQUEST_HSCLK;
+	if (enable)
+		reg |= DSIM_TX_REQUEST_HSCLK;
+
+	writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
+}
+
 static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable)
 {
 	u32 reg;
 
+	/*
+	 * Set DSIM_TX_REQUEST_HSCLK. In case of video data, host controller
+	 * will transmit the data in HS mode always.
+	 */
+	if (enable)
+		exynos_dsi_enable_hs_clock(dsi, true);
+
 	reg = readl(dsi->reg_base + DSIM_MDRESOL_REG);
 	if (enable)
 		reg |= DSIM_MAIN_STAND_BY;
-- 
1.7.9.5