From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 12/17] drm/tegra: dc: Factor out DC, window and cursor commit
Date: Mon, 3 Nov 2014 10:27:43 +0100 [thread overview]
Message-ID: <1415006868-318-12-git-send-email-thierry.reding@gmail.com> (raw)
In-Reply-To: <1415006868-318-1-git-send-email-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/gpu/drm/tegra/dc.c | 52 +++++++++++++++++++++++++---------------------
1 file changed, 28 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index a1e7962ccbe2..3a6038a53fdb 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -36,6 +36,26 @@ static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane)
return container_of(plane, struct tegra_plane, base);
}
+static void tegra_dc_window_commit(struct tegra_dc *dc, unsigned int index)
+{
+ u32 value = WIN_A_ACT_REQ << index;
+
+ tegra_dc_writel(dc, value << 8, DC_CMD_STATE_CONTROL);
+ tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
+}
+
+static void tegra_dc_cursor_commit(struct tegra_dc *dc)
+{
+ tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
+ tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
+}
+
+static void tegra_dc_commit(struct tegra_dc *dc)
+{
+ tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
+ tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+}
+
static unsigned int tegra_dc_format(uint32_t format, uint32_t *swap)
{
/* assume no swapping of fetched data */
@@ -307,8 +327,7 @@ static int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index,
break;
}
- tegra_dc_writel(dc, WIN_A_UPDATE << index, DC_CMD_STATE_CONTROL);
- tegra_dc_writel(dc, WIN_A_ACT_REQ << index, DC_CMD_STATE_CONTROL);
+ tegra_dc_window_commit(dc, index);
return 0;
}
@@ -379,8 +398,7 @@ static int tegra_plane_disable(struct drm_plane *plane)
value &= ~WIN_ENABLE;
tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);
- tegra_dc_writel(dc, WIN_A_UPDATE << p->index, DC_CMD_STATE_CONTROL);
- tegra_dc_writel(dc, WIN_A_ACT_REQ << p->index, DC_CMD_STATE_CONTROL);
+ tegra_dc_window_commit(dc, p->index);
return 0;
}
@@ -517,10 +535,8 @@ static int tegra_dc_set_base(struct tegra_dc *dc, int x, int y,
tegra_dc_writel(dc, h_offset, DC_WINBUF_ADDR_H_OFFSET);
tegra_dc_writel(dc, v_offset, DC_WINBUF_ADDR_V_OFFSET);
- value = GENERAL_UPDATE | WIN_A_UPDATE;
- tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
-
value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
+ tegra_dc_writel(dc, value << 8, DC_CMD_STATE_CONTROL);
tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
return 0;
@@ -625,11 +641,8 @@ static int tegra_dc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file,
tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
}
- tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
- tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
-
- tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
- tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+ tegra_dc_cursor_commit(dc);
+ tegra_dc_commit(dc);
return 0;
}
@@ -645,12 +658,9 @@ static int tegra_dc_cursor_move(struct drm_crtc *crtc, int x, int y)
value = ((y & 0x3fff) << 16) | (x & 0x3fff);
tegra_dc_writel(dc, value, DC_DISP_CURSOR_POSITION);
- tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
- tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
-
+ tegra_dc_cursor_commit(dc);
/* XXX: only required on generations earlier than Tegra124? */
- tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
- tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+ tegra_dc_commit(dc);
return 0;
}
@@ -936,15 +946,9 @@ static void tegra_crtc_prepare(struct drm_crtc *crtc)
static void tegra_crtc_commit(struct drm_crtc *crtc)
{
struct tegra_dc *dc = to_tegra_dc(crtc);
- unsigned long value;
-
- value = GENERAL_UPDATE | WIN_A_UPDATE;
- tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
-
- value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
- tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
drm_crtc_vblank_on(crtc);
+ tegra_dc_commit(dc);
}
static void tegra_crtc_load_lut(struct drm_crtc *crtc)
--
2.1.2
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next prev parent reply other threads:[~2014-11-03 9:28 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-03 9:27 [PATCH 01/17] drm/tegra: dc: Add powergate support Thierry Reding
2014-11-03 9:27 ` [PATCH 02/17] drm/tegra: Do not enable output on .mode_set() Thierry Reding
2014-11-03 17:18 ` Sean Paul
2014-11-04 14:50 ` Thierry Reding
2014-11-04 15:11 ` Sean Paul
2014-11-04 15:26 ` Thierry Reding
2014-11-04 16:38 ` Daniel Vetter
2014-11-03 9:27 ` [PATCH 03/17] drm/tegra: dsi: Make FIFO depths host parameters Thierry Reding
2014-11-03 17:20 ` Sean Paul
2014-11-04 15:45 ` Thierry Reding
2014-11-03 9:27 ` [PATCH v2 04/17] drm/tegra: dsi: Add ganged mode support Thierry Reding
2014-11-03 18:30 ` Sean Paul
2014-11-04 15:49 ` Thierry Reding
2014-11-03 9:27 ` [PATCH 05/17] drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier Thierry Reding
2014-11-03 9:27 ` [PATCH 06/17] drm/tegra: dc: Add missing call to drm_vblank_on() Thierry Reding
2014-11-03 18:45 ` Sean Paul
2014-11-03 18:50 ` Daniel Vetter
2014-11-04 14:08 ` Thierry Reding
2014-11-04 4:21 ` Alexandre Courbot
2014-11-03 9:27 ` [PATCH 07/17] drm/tegra: gem: Extract tegra_bo_alloc_object() Thierry Reding
2014-11-03 9:27 ` [PATCH 08/17] drm/tegra: gem: Cleanup tegra_bo_create_with_handle() Thierry Reding
2014-11-03 9:27 ` [PATCH 09/17] drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset() Thierry Reding
2014-11-03 9:27 ` [PATCH 10/17] drm/tegra: gem: Use dma_mmap_writecombine() Thierry Reding
2014-11-03 9:27 ` [PATCH v5 11/17] drm/tegra: Add IOMMU support Thierry Reding
2014-11-03 9:27 ` Thierry Reding [this message]
2014-11-03 9:27 ` [PATCH 13/17] drm/tegra: dc: Registers are 32 bits wide Thierry Reding
2014-11-03 9:27 ` [PATCH 14/17] drm/tegra: dc: Universal plane support Thierry Reding
2014-11-03 9:27 ` [PATCH 15/17] drm/tegra: Fix potential bug on driver unload Thierry Reding
2014-11-04 10:59 ` Andrzej Hajda
2014-11-04 12:30 ` Thierry Reding
2014-11-03 9:27 ` [PATCH 16/17] drm/tegra: gem: dumb: pitch and size are outputs Thierry Reding
2014-11-03 9:51 ` Daniel Vetter
2014-11-03 10:12 ` Thierry Reding
2014-11-03 9:27 ` [PATCH 17/17] drm/tegra: fb: Do not destroy framebuffer Thierry Reding
2014-11-03 9:53 ` Daniel Vetter
2014-11-04 16:08 ` Thierry Reding
2014-11-03 17:15 ` [PATCH 01/17] drm/tegra: dc: Add powergate support Sean Paul
2014-11-04 12:34 ` Thierry Reding
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