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From: Alex Deucher <alexdeucher@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: Rex Zhu <Rex.Zhu@amd.com>
Subject: [PATCH 16/51] drm/amd/powerplay: implement functions of amd_powerplay_func
Date: Thu, 12 Nov 2015 01:18:06 -0500	[thread overview]
Message-ID: <1447309121-2480-17-git-send-email-alexander.deucher@amd.com> (raw)
In-Reply-To: <1447309121-2480-1-git-send-email-alexander.deucher@amd.com>

From: Rex Zhu <Rex.Zhu@amd.com>

This is the common interface for interacting with the powerplay
module.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 191 ++++++++++++++++++++++++--
 1 file changed, 183 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 1964a2a..66ccfc0 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -27,6 +27,8 @@
 #include "amd_shared.h"
 #include "amd_powerplay.h"
 #include "pp_instance.h"
+#include "power_state.h"
+#include "eventmanager.h"
 
 static int pp_early_init(void *handle)
 {
@@ -177,11 +179,31 @@ static int pp_set_powergating_state(void *handle,
 
 static int pp_suspend(void *handle)
 {
+	struct pp_instance *pp_handle;
+	struct pp_eventmgr *eventmgr;
+	struct pem_event_data event_data = { {0} };
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	pp_handle = (struct pp_instance *)handle;
+	eventmgr = pp_handle->eventmgr;
+	pem_handle_event(eventmgr, AMD_PP_EVENT_SUSPEND, &event_data);
 	return 0;
 }
 
 static int pp_resume(void *handle)
 {
+	struct pp_instance *pp_handle;
+	struct pp_eventmgr *eventmgr;
+	struct pem_event_data event_data = { {0} };
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	pp_handle = (struct pp_instance *)handle;
+	eventmgr = pp_handle->eventmgr;
+	pem_handle_event(eventmgr, AMD_PP_EVENT_RESUME, &event_data);
 	return 0;
 }
 
@@ -215,45 +237,198 @@ static int pp_dpm_fw_loading_complete(void *handle)
 static int pp_dpm_force_performance_level(void *handle,
 					enum amd_dpm_forced_level level)
 {
+	struct pp_instance *pp_handle;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	pp_handle = (struct pp_instance *)handle;
+
+	hwmgr = pp_handle->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
+	    hwmgr->hwmgr_func->force_dpm_level == NULL)
+		return -EINVAL;
+
+	hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);
+
 	return 0;
 }
+
 static enum amd_dpm_forced_level pp_dpm_get_performance_level(
 								void *handle)
 {
-	return 0;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL)
+		return -EINVAL;
+
+	return (((struct pp_instance *)handle)->hwmgr->dpm_level);
 }
+
 static int pp_dpm_get_sclk(void *handle, bool low)
 {
-	return 0;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
+	    hwmgr->hwmgr_func->get_sclk == NULL)
+		return -EINVAL;
+
+	return hwmgr->hwmgr_func->get_sclk(hwmgr, low);
 }
+
 static int pp_dpm_get_mclk(void *handle, bool low)
 {
-	return 0;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
+	    hwmgr->hwmgr_func->get_mclk == NULL)
+		return -EINVAL;
+
+	return hwmgr->hwmgr_func->get_mclk(hwmgr, low);
 }
+
 static int pp_dpm_powergate_vce(void *handle, bool gate)
 {
-	return 0;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
+	    hwmgr->hwmgr_func->powergate_vce == NULL)
+		return -EINVAL;
+
+	return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);
 }
+
 static int pp_dpm_powergate_uvd(void *handle, bool gate)
 {
-	return 0;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
+	    hwmgr->hwmgr_func->powergate_uvd == NULL)
+		return -EINVAL;
+
+	return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);
+}
+
+static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type  state)
+{
+	switch (state) {
+	case POWER_STATE_TYPE_BATTERY:
+		return PP_StateUILabel_Battery;
+	case POWER_STATE_TYPE_BALANCED:
+		return PP_StateUILabel_Balanced;
+	case POWER_STATE_TYPE_PERFORMANCE:
+		return PP_StateUILabel_Performance;
+	default:
+		return PP_StateUILabel_None;
+	}
 }
 
 int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, void *output)
 {
-	return 0;
+	int ret = 0;
+	struct pp_instance *pp_handle;
+	struct pem_event_data data = { {0} };
+
+	pp_handle = (struct pp_instance *)handle;
+
+	if (pp_handle == NULL)
+		return -EINVAL;
+
+	switch (event_id) {
+	case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE:
+		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
+		break;
+	case AMD_PP_EVENT_ENABLE_USER_STATE:
+	{
+		enum amd_pm_state_type  ps;
+
+		if (input == NULL)
+			return -EINVAL;
+		ps = *(unsigned long *)input;
+
+		data.requested_ui_label = power_state_convert(ps);
+		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
+	}
+	break;
+	default:
+		break;
+	}
+	return ret;
 }
+
 enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
 {
-	return 0;
+	struct pp_hwmgr *hwmgr;
+	struct pp_power_state *state;
+
+	if (handle == NULL)
+		return -EINVAL;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->current_ps == NULL)
+		return -EINVAL;
+
+	state = hwmgr->current_ps;
+
+	switch (state->classification.ui_label) {
+	case PP_StateUILabel_Battery:
+		return POWER_STATE_TYPE_BATTERY;
+	case PP_StateUILabel_Balanced:
+		return POWER_STATE_TYPE_BALANCED;
+	case PP_StateUILabel_Performance:
+		return POWER_STATE_TYPE_PERFORMANCE;
+	default:
+		return POWER_STATE_TYPE_DEFAULT;
+	}
 }
+
 static void
 pp_debugfs_print_current_performance_level(void *handle,
 					       struct seq_file *m)
 {
-	return;
+	struct pp_hwmgr  *hwmgr;
+
+	if (handle == NULL)
+		return;
+
+	hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+	if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
+	  hwmgr->hwmgr_func->print_current_perforce_level == NULL)
+		return;
+
+	hwmgr->hwmgr_func->print_current_perforce_level(hwmgr, m);
 }
 
+
 const struct amd_powerplay_funcs pp_dpm_funcs = {
 	.get_temperature = NULL,
 	.load_firmware = pp_dpm_load_fw,
-- 
1.8.3.1

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  parent reply	other threads:[~2015-11-12  6:19 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-12  6:17 [PATCH 00/51] Add amdgpu powerplay support Alex Deucher
2015-11-12  6:17 ` [PATCH 01/51] drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module Alex Deucher
2015-11-12  6:17 ` [PATCH 02/51] drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h Alex Deucher
2015-11-12  6:17 ` [PATCH 03/51] drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h Alex Deucher
2015-11-12  6:17 ` [PATCH 04/51] drm/amdgpu: implement new cgs interface for acpi function Alex Deucher
2015-11-12  6:17 ` [PATCH 05/51] drm/amdgpu: implement cgs interface to query system info Alex Deucher
2015-11-12  6:17 ` [PATCH 06/51] drm/amdgpu: add new cgs interface to get display info (v2) Alex Deucher
2015-11-12  6:17 ` [PATCH 07/51] drm/amd/powerplay: add basic powerplay framework Alex Deucher
2015-11-12  6:17 ` [PATCH 08/51] drm/amdgpu: disable legacy path of firmware check if powerplay is enabled Alex Deucher
2015-11-12  6:17 ` [PATCH 09/51] drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block Alex Deucher
2015-11-12  6:18 ` [PATCH 10/51] drm/amd/powerplay: add SMU manager sub-component Alex Deucher
2015-11-12  6:18 ` [PATCH 11/51] drm/amd/powerplay: add hardware " Alex Deucher
2015-11-12  6:18 ` [PATCH 12/51] drm/amd/powerplay: add Carrizo smu support Alex Deucher
2015-11-12  6:18 ` [PATCH 13/51] drm/amd/powerplay: add Carrizo dpm support Alex Deucher
2015-11-12  6:18 ` [PATCH 14/51] drm/amd/powerplay: add CG and PG support for carrizo Alex Deucher
2015-11-12  6:18 ` [PATCH 15/51] drm/amd/powerplay: add event manager sub-component Alex Deucher
2015-11-12  6:18 ` Alex Deucher [this message]
2015-11-12  6:18 ` [PATCH 17/51] drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h Alex Deucher
2015-11-12  6:18 ` [PATCH 18/51] drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay Alex Deucher
2015-11-12  6:18 ` [PATCH 19/51] drm/amd/powerplay: add header file for tonga smu and dpm Alex Deucher
2015-11-12  6:18 ` [PATCH 20/51] drm/amd/powerplay: Add Tonga SMU support Alex Deucher
2015-11-12  6:18 ` [PATCH 21/51] drm/amd/powerplay: add Tonga dpm support (v3) Alex Deucher
2015-11-12  6:18 ` [PATCH 22/51] drm/amd/powerplay: add/update headers for Fiji SMU and DPM Alex Deucher
2015-11-12  6:18 ` [PATCH 23/51] drm/amd/powerplay: update atomctrl for fiji Alex Deucher
2015-11-12  6:18 ` [PATCH 24/51] drm/amd/powerplay: add Fiji SMU support Alex Deucher
2015-11-12  6:18 ` [PATCH 25/51] drm/amd/powerplay: add Fiji DPM support Alex Deucher
2015-11-12  6:18 ` [PATCH 26/51] drm/amdgpu: add amdgpu.powerplay module option Alex Deucher
2015-11-12  6:18 ` [PATCH 27/51] drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji Alex Deucher
2015-11-12  6:18 ` [PATCH 28/51] drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap Alex Deucher
2015-11-12  6:18 ` [PATCH 29/51] drm/amdgpu/poweprlay: export program display gap function to eventmgr Alex Deucher
2015-11-12  6:18 ` [PATCH 30/51] drm/amdgpu/powerplay: implement pem_task for display_configuration_change Alex Deucher
2015-11-12  6:18 ` [PATCH 31/51] drm/amdgpu/powerplay: program display gap for tonga Alex Deucher
2015-11-12  6:18 ` [PATCH 32/51] drm/amdgpu: enable powerplay module by default " Alex Deucher
2015-11-12  6:18 ` [PATCH 33/51] drm/amdgpu: enable powerplay module by default for fiji Alex Deucher
2015-11-12  6:18 ` [PATCH 34/51] drm/amdgpu/powerplay: add some definition for other ip block to update cg pg Alex Deucher
2015-11-12  6:18 ` [PATCH 35/51] drm/amd/powerplay: add new function point in hwmgr_func for CG/PG Alex Deucher
2015-11-12  6:18 ` [PATCH 36/51] drm/amd/powerplay: Add CG and PG support for tonga Alex Deucher
2015-11-12  6:18 ` [PATCH 37/51] drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control Alex Deucher
2015-11-12  6:18 ` [PATCH 38/51] drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule Alex Deucher
2015-11-12  6:18 ` [PATCH 39/51] drm/amdgpu/powerplay: add thermal control interface in hwmgr Alex Deucher
2015-11-12  6:18 ` [PATCH 40/51] drm/amdgpu/powerplay: enable thermal interrupt task in eventmgr Alex Deucher
2015-11-12  6:18 ` [PATCH 41/51] drm/amdgpu/powerplay: implement thermal control for tonga Alex Deucher
2015-11-12  6:18 ` [PATCH 42/51] drm/amdgpu/powerplay: implement fan control interface in amd_powerplay_funcs Alex Deucher
2015-11-12  6:18 ` [PATCH 43/51] drm/amdgpu: export fan control functions to amdgpu Alex Deucher
2015-11-12  6:18 ` [PATCH 44/51] drm/amdgpu: enable sysfs interface for powerplay Alex Deucher
2015-11-12  6:18 ` [PATCH 45/51] drm/amdgpu: support per device powerplay enablement (v2) Alex Deucher
2015-11-12  6:18 ` [PATCH 46/51] drm/amd/powerplay: add and export hwmgr interface to eventmgr to check hw states Alex Deucher
2015-11-12  6:18 ` [PATCH 47/51] drm/amd/powerplay: implement new funcs to check current states for tonga Alex Deucher
2015-11-12  6:18 ` [PATCH 48/51] drm/amd/powerplay: refine the logic of whether need to update power state Alex Deucher
2015-11-12  6:18 ` [PATCH 49/51] drm/amd/powerplay/tonga: enable pcie and mclk forcing for low Alex Deucher
2015-11-12  6:18 ` [PATCH 50/51] drm/amd/powerplay/fiji: " Alex Deucher
2015-11-12  6:18 ` [PATCH 51/51] drm/amdgpu: extract pcie helpers to common header Alex Deucher
2015-11-12 11:05 ` [PATCH 00/51] Add amdgpu powerplay support Christian König

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