From: Alex Deucher <alexdeucher@gmail.com>
To: dri-devel@lists.freedesktop.org
Subject: [PATCH 45/51] drm/amdgpu: support per device powerplay enablement (v2)
Date: Thu, 12 Nov 2015 01:18:35 -0500 [thread overview]
Message-ID: <1447309121-2480-46-git-send-email-alexander.deucher@amd.com> (raw)
In-Reply-To: <1447309121-2480-1-git-send-email-alexander.deucher@amd.com>
From: Jammy Zhou <Jammy.Zhou@amd.com>
The amdgu_powerplay variable is global for multiple GPU instances.
v2: fold in Flora's module option change, protect adev reference in
macros
Change-Id: I1d00f155f17702209b8f4101a25090b5ec42e37b
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 71 ++++++++++++++-------------
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 30 +++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 15 +++---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 +-
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +-
6 files changed, 65 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 227d53e..dcb7c87 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1992,6 +1992,7 @@ struct amdgpu_device {
/* powerplay */
struct amd_powerplay powerplay;
+ bool pp_enabled;
/* dpm */
struct amdgpu_pm pm;
@@ -2219,68 +2220,68 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e))
#define amdgpu_dpm_get_temperature(adev) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \
- (adev)->pm.funcs->get_temperature((adev))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \
+ (adev)->pm.funcs->get_temperature((adev))
#define amdgpu_dpm_set_fan_control_mode(adev, m) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)) : \
- (adev)->pm.funcs->set_fan_control_mode((adev), (m))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)) : \
+ (adev)->pm.funcs->set_fan_control_mode((adev), (m))
#define amdgpu_dpm_get_fan_control_mode(adev) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle) : \
- (adev)->pm.funcs->get_fan_control_mode((adev))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle) : \
+ (adev)->pm.funcs->get_fan_control_mode((adev))
#define amdgpu_dpm_set_fan_speed_percent(adev, s) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
- (adev)->pm.funcs->set_fan_speed_percent((adev), (s))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
+ (adev)->pm.funcs->set_fan_speed_percent((adev), (s))
#define amdgpu_dpm_get_fan_speed_percent(adev, s) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
- (adev)->pm.funcs->get_fan_speed_percent((adev), (s))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
+ (adev)->pm.funcs->get_fan_speed_percent((adev), (s))
#define amdgpu_dpm_get_sclk(adev, l) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)) : \
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)) : \
(adev)->pm.funcs->get_sclk((adev), (l))
#define amdgpu_dpm_get_mclk(adev, l) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)) : \
- (adev)->pm.funcs->get_mclk((adev), (l))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)) : \
+ (adev)->pm.funcs->get_mclk((adev), (l))
#define amdgpu_dpm_force_performance_level(adev, l) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)) : \
- (adev)->pm.funcs->force_performance_level((adev), (l))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)) : \
+ (adev)->pm.funcs->force_performance_level((adev), (l))
#define amdgpu_dpm_powergate_uvd(adev, g) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)) : \
- (adev)->pm.funcs->powergate_uvd((adev), (g))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)) : \
+ (adev)->pm.funcs->powergate_uvd((adev), (g))
#define amdgpu_dpm_powergate_vce(adev, g) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \
- (adev)->pm.funcs->powergate_vce((adev), (g))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \
+ (adev)->pm.funcs->powergate_vce((adev), (g))
#define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) \
- amdgpu_powerplay ? \
- (adev)->powerplay.pp_funcs->print_current_performance_level((adev)->powerplay.pp_handle, (m)) : \
- (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m))
+ (adev)->pp_enabled ? \
+ (adev)->powerplay.pp_funcs->print_current_performance_level((adev)->powerplay.pp_handle, (m)) : \
+ (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m))
#define amdgpu_dpm_get_current_power_state(adev) \
- (adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)
+ (adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)
#define amdgpu_dpm_get_performance_level(adev) \
- (adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle)
+ (adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle)
-#define amdgpu_dpm_dispatch_task(adev, event_id, input, output) \
+#define amdgpu_dpm_dispatch_task(adev, event_id, input, output) \
(adev)->powerplay.pp_funcs->dispatch_tasks((adev)->powerplay.pp_handle, (event_id), (input), (output))
#define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs->patch_gds_switch((r), (v), (d), (w), (a))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index fe11a29..39a26c8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -82,7 +82,7 @@ int amdgpu_enable_scheduler = 1;
int amdgpu_sched_jobs = 16;
int amdgpu_sched_hw_submission = 2;
int amdgpu_enable_semaphores = 0;
-int amdgpu_powerplay = 0;
+int amdgpu_powerplay = -1;
MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -166,7 +166,7 @@ MODULE_PARM_DESC(enable_semaphores, "Enable semaphores (1 = enable, 0 = disable
module_param_named(enable_semaphores, amdgpu_enable_semaphores, int, 0644);
#ifdef CONFIG_DRM_AMD_POWERPLAY
-MODULE_PARM_DESC(powerplay, "Powerplay component (1 = enable, 0 = disable (default))");
+MODULE_PARM_DESC(powerplay, "Powerplay component (1 = enable, 0 = disable, -1 = auto (default))");
module_param_named(powerplay, amdgpu_powerplay, int, 0444);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 40ae305..3b78982 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -36,7 +36,7 @@ static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
{
- if (amdgpu_powerplay)
+ if (adev->pp_enabled)
/* TODO */
return;
@@ -60,7 +60,7 @@ static ssize_t amdgpu_get_dpm_state(struct device *dev,
struct amdgpu_device *adev = ddev->dev_private;
enum amd_pm_state_type pm;
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
pm = amdgpu_dpm_get_current_power_state(adev);
} else
pm = adev->pm.dpm.user_state;
@@ -90,7 +90,7 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev,
goto fail;
}
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);
} else {
mutex_lock(&adev->pm.mutex);
@@ -113,7 +113,7 @@ static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev,
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = ddev->dev_private;
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
enum amd_dpm_forced_level level;
level = amdgpu_dpm_get_performance_level(adev);
@@ -151,7 +151,7 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
goto fail;
}
- if (amdgpu_powerplay)
+ if (adev->pp_enabled)
amdgpu_dpm_force_performance_level(adev, level);
else {
mutex_lock(&adev->pm.mutex);
@@ -184,7 +184,7 @@ static ssize_t amdgpu_hwmon_show_temp(struct device *dev,
struct amdgpu_device *adev = dev_get_drvdata(dev);
int temp;
- if (!amdgpu_powerplay && !adev->pm.funcs->get_temperature)
+ if (!adev->pp_enabled && !adev->pm.funcs->get_temperature)
temp = 0;
else
temp = amdgpu_dpm_get_temperature(adev);
@@ -215,7 +215,7 @@ static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev,
struct amdgpu_device *adev = dev_get_drvdata(dev);
u32 pwm_mode = 0;
- if (!amdgpu_powerplay && !adev->pm.funcs->get_fan_control_mode)
+ if (!adev->pp_enabled && !adev->pm.funcs->get_fan_control_mode)
return -EINVAL;
pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
@@ -233,7 +233,7 @@ static ssize_t amdgpu_hwmon_set_pwm1_enable(struct device *dev,
int err;
int value;
- if (!amdgpu_powerplay && !adev->pm.funcs->set_fan_control_mode)
+ if (!adev->pp_enabled && !adev->pm.funcs->set_fan_control_mode)
return -EINVAL;
err = kstrtoint(buf, 10, &value);
@@ -340,7 +340,7 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
return 0;
- if (amdgpu_powerplay)
+ if (adev->pp_enabled)
return effective_mode;
/* Skip fan attributes if fan is not present */
@@ -674,7 +674,7 @@ done:
void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
{
- if (amdgpu_powerplay)
+ if (adev->pp_enabled)
amdgpu_dpm_powergate_uvd(adev, !enable);
else {
if (adev->pm.funcs->powergate_uvd) {
@@ -701,7 +701,7 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
{
- if (amdgpu_powerplay)
+ if (adev->pp_enabled)
amdgpu_dpm_powergate_vce(adev, !enable);
else {
if (adev->pm.funcs->powergate_vce) {
@@ -729,7 +729,7 @@ void amdgpu_pm_print_power_states(struct amdgpu_device *adev)
{
int i;
- if (amdgpu_powerplay)
+ if (adev->pp_enabled)
/* TO DO */
return;
@@ -745,7 +745,7 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
if (adev->pm.sysfs_initialized)
return 0;
- if (!amdgpu_powerplay) {
+ if (!adev->pp_enabled) {
if (adev->pm.funcs->get_temperature == NULL)
return 0;
}
@@ -798,7 +798,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
if (!adev->pm.dpm_enabled)
return;
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
int i = 0;
amdgpu_display_bandwidth_update(adev);
@@ -852,7 +852,7 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
seq_printf(m, "dpm not enabled\n");
return 0;
}
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
amdgpu_dpm_debugfs_print_current_performance_level(adev, m);
} else {
mutex_lock(&adev->pm.mutex);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
index 1ff6fd5..6b46fbf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
@@ -40,7 +40,7 @@ static int amdgpu_powerplay_init(struct amdgpu_device *adev)
amd_pp = &(adev->powerplay);
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
#ifdef CONFIG_DRM_AMD_POWERPLAY
struct amd_pp_init *pp_init;
@@ -100,11 +100,14 @@ static int amdgpu_pp_early_init(void *handle)
switch (adev->asic_type) {
case CHIP_TONGA:
case CHIP_FIJI:
- amdgpu_powerplay = 1;
+ adev->pp_enabled = (amdgpu_powerplay == 0) ? false : true;
break;
default:
+ adev->pp_enabled = (amdgpu_powerplay > 0) ? true : false;
break;
}
+#else
+ adev->pp_enabled = false;
#endif
ret = amdgpu_powerplay_init(adev);
@@ -127,7 +130,7 @@ static int amdgpu_pp_sw_init(void *handle)
adev->powerplay.pp_handle);
#ifdef CONFIG_DRM_AMD_POWERPLAY
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
adev->pm.dpm_enabled = true;
amdgpu_pm_sysfs_init(adev);
}
@@ -148,7 +151,7 @@ static int amdgpu_pp_sw_fini(void *handle)
return ret;
#ifdef CONFIG_DRM_AMD_POWERPLAY
- if (amdgpu_powerplay) {
+ if (adev->pp_enabled) {
amdgpu_pm_sysfs_fini(adev);
amd_powerplay_fini(adev->powerplay.pp_handle);
}
@@ -162,7 +165,7 @@ static int amdgpu_pp_hw_init(void *handle)
int ret = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- if (amdgpu_powerplay && adev->firmware.smu_load)
+ if (adev->pp_enabled && adev->firmware.smu_load)
amdgpu_ucode_init_bo(adev);
if (adev->powerplay.ip_funcs->hw_init)
@@ -181,7 +184,7 @@ static int amdgpu_pp_hw_fini(void *handle)
ret = adev->powerplay.ip_funcs->hw_fini(
adev->powerplay.pp_handle);
- if (amdgpu_powerplay && adev->firmware.smu_load)
+ if (adev->pp_enabled && adev->firmware.smu_load)
amdgpu_ucode_fini_bo(adev);
return ret;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 1528987..efdacbf 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -2797,7 +2797,7 @@ static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev)
gfx_v8_0_rlc_reset(adev);
- if (!amdgpu_powerplay) {
+ if (!adev->pp_enabled) {
if (!adev->firmware.smu_load) {
/* legacy rlc firmware loading */
r = gfx_v8_0_rlc_load_microcode(adev);
@@ -3694,7 +3694,7 @@ static int gfx_v8_0_cp_resume(struct amdgpu_device *adev)
if (!(adev->flags & AMD_IS_APU))
gfx_v8_0_enable_gui_idle_interrupt(adev, false);
- if (!amdgpu_powerplay) {
+ if (!adev->pp_enabled) {
if (!adev->firmware.smu_load) {
/* legacy firmware loading */
r = gfx_v8_0_cp_gfx_load_microcode(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 8091c1c..c741c09 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -727,7 +727,7 @@ static int sdma_v3_0_start(struct amdgpu_device *adev)
{
int r, i;
- if (!amdgpu_powerplay) {
+ if (!adev->pp_enabled) {
if (!adev->firmware.smu_load) {
r = sdma_v3_0_load_microcode(adev);
if (r)
--
1.8.3.1
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next prev parent reply other threads:[~2015-11-12 6:19 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-12 6:17 [PATCH 00/51] Add amdgpu powerplay support Alex Deucher
2015-11-12 6:17 ` [PATCH 01/51] drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module Alex Deucher
2015-11-12 6:17 ` [PATCH 02/51] drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h Alex Deucher
2015-11-12 6:17 ` [PATCH 03/51] drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h Alex Deucher
2015-11-12 6:17 ` [PATCH 04/51] drm/amdgpu: implement new cgs interface for acpi function Alex Deucher
2015-11-12 6:17 ` [PATCH 05/51] drm/amdgpu: implement cgs interface to query system info Alex Deucher
2015-11-12 6:17 ` [PATCH 06/51] drm/amdgpu: add new cgs interface to get display info (v2) Alex Deucher
2015-11-12 6:17 ` [PATCH 07/51] drm/amd/powerplay: add basic powerplay framework Alex Deucher
2015-11-12 6:17 ` [PATCH 08/51] drm/amdgpu: disable legacy path of firmware check if powerplay is enabled Alex Deucher
2015-11-12 6:17 ` [PATCH 09/51] drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block Alex Deucher
2015-11-12 6:18 ` [PATCH 10/51] drm/amd/powerplay: add SMU manager sub-component Alex Deucher
2015-11-12 6:18 ` [PATCH 11/51] drm/amd/powerplay: add hardware " Alex Deucher
2015-11-12 6:18 ` [PATCH 12/51] drm/amd/powerplay: add Carrizo smu support Alex Deucher
2015-11-12 6:18 ` [PATCH 13/51] drm/amd/powerplay: add Carrizo dpm support Alex Deucher
2015-11-12 6:18 ` [PATCH 14/51] drm/amd/powerplay: add CG and PG support for carrizo Alex Deucher
2015-11-12 6:18 ` [PATCH 15/51] drm/amd/powerplay: add event manager sub-component Alex Deucher
2015-11-12 6:18 ` [PATCH 16/51] drm/amd/powerplay: implement functions of amd_powerplay_func Alex Deucher
2015-11-12 6:18 ` [PATCH 17/51] drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h Alex Deucher
2015-11-12 6:18 ` [PATCH 18/51] drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay Alex Deucher
2015-11-12 6:18 ` [PATCH 19/51] drm/amd/powerplay: add header file for tonga smu and dpm Alex Deucher
2015-11-12 6:18 ` [PATCH 20/51] drm/amd/powerplay: Add Tonga SMU support Alex Deucher
2015-11-12 6:18 ` [PATCH 21/51] drm/amd/powerplay: add Tonga dpm support (v3) Alex Deucher
2015-11-12 6:18 ` [PATCH 22/51] drm/amd/powerplay: add/update headers for Fiji SMU and DPM Alex Deucher
2015-11-12 6:18 ` [PATCH 23/51] drm/amd/powerplay: update atomctrl for fiji Alex Deucher
2015-11-12 6:18 ` [PATCH 24/51] drm/amd/powerplay: add Fiji SMU support Alex Deucher
2015-11-12 6:18 ` [PATCH 25/51] drm/amd/powerplay: add Fiji DPM support Alex Deucher
2015-11-12 6:18 ` [PATCH 26/51] drm/amdgpu: add amdgpu.powerplay module option Alex Deucher
2015-11-12 6:18 ` [PATCH 27/51] drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji Alex Deucher
2015-11-12 6:18 ` [PATCH 28/51] drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap Alex Deucher
2015-11-12 6:18 ` [PATCH 29/51] drm/amdgpu/poweprlay: export program display gap function to eventmgr Alex Deucher
2015-11-12 6:18 ` [PATCH 30/51] drm/amdgpu/powerplay: implement pem_task for display_configuration_change Alex Deucher
2015-11-12 6:18 ` [PATCH 31/51] drm/amdgpu/powerplay: program display gap for tonga Alex Deucher
2015-11-12 6:18 ` [PATCH 32/51] drm/amdgpu: enable powerplay module by default " Alex Deucher
2015-11-12 6:18 ` [PATCH 33/51] drm/amdgpu: enable powerplay module by default for fiji Alex Deucher
2015-11-12 6:18 ` [PATCH 34/51] drm/amdgpu/powerplay: add some definition for other ip block to update cg pg Alex Deucher
2015-11-12 6:18 ` [PATCH 35/51] drm/amd/powerplay: add new function point in hwmgr_func for CG/PG Alex Deucher
2015-11-12 6:18 ` [PATCH 36/51] drm/amd/powerplay: Add CG and PG support for tonga Alex Deucher
2015-11-12 6:18 ` [PATCH 37/51] drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control Alex Deucher
2015-11-12 6:18 ` [PATCH 38/51] drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule Alex Deucher
2015-11-12 6:18 ` [PATCH 39/51] drm/amdgpu/powerplay: add thermal control interface in hwmgr Alex Deucher
2015-11-12 6:18 ` [PATCH 40/51] drm/amdgpu/powerplay: enable thermal interrupt task in eventmgr Alex Deucher
2015-11-12 6:18 ` [PATCH 41/51] drm/amdgpu/powerplay: implement thermal control for tonga Alex Deucher
2015-11-12 6:18 ` [PATCH 42/51] drm/amdgpu/powerplay: implement fan control interface in amd_powerplay_funcs Alex Deucher
2015-11-12 6:18 ` [PATCH 43/51] drm/amdgpu: export fan control functions to amdgpu Alex Deucher
2015-11-12 6:18 ` [PATCH 44/51] drm/amdgpu: enable sysfs interface for powerplay Alex Deucher
2015-11-12 6:18 ` Alex Deucher [this message]
2015-11-12 6:18 ` [PATCH 46/51] drm/amd/powerplay: add and export hwmgr interface to eventmgr to check hw states Alex Deucher
2015-11-12 6:18 ` [PATCH 47/51] drm/amd/powerplay: implement new funcs to check current states for tonga Alex Deucher
2015-11-12 6:18 ` [PATCH 48/51] drm/amd/powerplay: refine the logic of whether need to update power state Alex Deucher
2015-11-12 6:18 ` [PATCH 49/51] drm/amd/powerplay/tonga: enable pcie and mclk forcing for low Alex Deucher
2015-11-12 6:18 ` [PATCH 50/51] drm/amd/powerplay/fiji: " Alex Deucher
2015-11-12 6:18 ` [PATCH 51/51] drm/amdgpu: extract pcie helpers to common header Alex Deucher
2015-11-12 11:05 ` [PATCH 00/51] Add amdgpu powerplay support Christian König
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