* [PATCH 1/2] drm/amdgpu/dce6: make some output debug only
@ 2016-05-27 19:34 Alex Deucher
2016-05-27 19:34 ` [PATCH 2/2] drm/amdgpu/gfx6: " Alex Deucher
0 siblings, 1 reply; 2+ messages in thread
From: Alex Deucher @ 2016-05-27 19:34 UTC (permalink / raw)
To: dri-devel; +Cc: Alex Deucher
make the default behavior less verbose.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 34 +++++++++++++++++-----------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 28dc554..fd8dbba 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -106,14 +106,14 @@ static const uint32_t hpd_int_control_offsets[6] = {
static u32 dce_v6_0_audio_endpt_rreg(struct amdgpu_device *adev,
u32 block_offset, u32 reg)
{
- DRM_INFO("xxxx: dce_v6_0_audio_endpt_rreg ----no impl!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_endpt_rreg ----no impl!!!!\n");
return 0;
}
static void dce_v6_0_audio_endpt_wreg(struct amdgpu_device *adev,
u32 block_offset, u32 reg, u32 v)
{
- DRM_INFO("xxxx: dce_v6_0_audio_endpt_wreg ----no impl!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_endpt_wreg ----no impl!!!!\n");
}
static bool dce_v6_0_is_in_vblank(struct amdgpu_device *adev, int crtc)
@@ -459,7 +459,7 @@ static u32 dce_v6_0_hpd_get_gpio_reg(struct amdgpu_device *adev)
static bool dce_v6_0_is_display_hung(struct amdgpu_device *adev)
{
- DRM_INFO("xxxx: dce_v6_0_is_display_hung ----no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_is_display_hung ----no imp!!!!!\n");
return true;
}
@@ -1321,17 +1321,17 @@ static void dce_v6_0_afmt_audio_select_pin(struct drm_encoder *encoder)
static void dce_v6_0_audio_write_latency_fields(struct drm_encoder *encoder,
struct drm_display_mode *mode)
{
- DRM_INFO("xxxx: dce_v6_0_audio_write_latency_fields---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_write_latency_fields---no imp!!!!!\n");
}
static void dce_v6_0_audio_write_speaker_allocation(struct drm_encoder *encoder)
{
- DRM_INFO("xxxx: dce_v6_0_audio_write_speaker_allocation---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_write_speaker_allocation---no imp!!!!!\n");
}
static void dce_v6_0_audio_write_sad_regs(struct drm_encoder *encoder)
{
- DRM_INFO("xxxx: dce_v6_0_audio_write_sad_regs---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_write_sad_regs---no imp!!!!!\n");
}
*/
@@ -1339,7 +1339,7 @@ static void dce_v6_0_audio_enable(struct amdgpu_device *adev,
struct amdgpu_audio_pin *pin,
bool enable)
{
- DRM_INFO("xxxx: dce_v6_0_audio_enable---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_enable---no imp!!!!!\n");
}
static const u32 pin_offsets[7] =
@@ -1356,20 +1356,20 @@ static const u32 pin_offsets[7] =
static int dce_v6_0_audio_init(struct amdgpu_device *adev)
{
- DRM_INFO("xxxx: dce_v6_0_audio_init---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_init---no imp!!!!!\n");
return 0;
}
static void dce_v6_0_audio_fini(struct amdgpu_device *adev)
{
- DRM_INFO("xxxx: dce_v6_0_audio_fini---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_fini---no imp!!!!!\n");
}
/*
static void dce_v6_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock)
{
- DRM_INFO("xxxx: dce_v6_0_afmt_update_ACR---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_afmt_update_ACR---no imp!!!!!\n");
}
*/
/*
@@ -1379,12 +1379,12 @@ static void dce_v6_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock
static void dce_v6_0_afmt_update_avi_infoframe(struct drm_encoder *encoder,
void *buffer, size_t size)
{
- DRM_INFO("xxxx: dce_v6_0_afmt_update_avi_infoframe---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_afmt_update_avi_infoframe---no imp!!!!!\n");
}
static void dce_v6_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)
{
- DRM_INFO("xxxx: dce_v6_0_audio_set_dto---no imp!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_audio_set_dto---no imp!!!!!\n");
}
*/
/*
@@ -1393,7 +1393,7 @@ static void dce_v6_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)
static void dce_v6_0_afmt_setmode(struct drm_encoder *encoder,
struct drm_display_mode *mode)
{
- DRM_INFO("xxxx: dce_v6_0_afmt_setmode ----no impl !!!!!!!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_afmt_setmode ----no impl !!!!!!!!\n");
}
static void dce_v6_0_afmt_enable(struct drm_encoder *encoder, bool enable)
@@ -2554,7 +2554,7 @@ static int dce_v6_0_wait_for_idle(void *handle)
static int dce_v6_0_soft_reset(void *handle)
{
- DRM_INFO("xxxx: dce_v6_0_soft_reset --- no impl!!\n");
+ DRM_DEBUG("xxxx: dce_v6_0_soft_reset --- no impl!!\n");
return 0;
}
@@ -2727,12 +2727,12 @@ static int dce_v6_0_crtc_irq(struct amdgpu_device *adev,
if (amdgpu_irq_enabled(adev, source, irq_type)) {
drm_handle_vblank(adev->ddev, crtc);
}
- DRM_INFO("IH: D%d vblank\n", crtc + 1);
+ DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
break;
case 1: /* vline */
- DRM_INFO("IH: D%d vline\n", crtc + 1);
+ DRM_DEBUG("IH: D%d vline\n", crtc + 1);
break;
default:
@@ -2841,7 +2841,7 @@ static int dce_v6_0_hpd_irq(struct amdgpu_device *adev,
tmp |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_ACK_MASK;
WREG32(int_control, tmp);
schedule_work(&adev->hotplug_work);
- DRM_INFO("IH: HPD%d\n", hpd + 1);
+ DRM_DEBUG("IH: HPD%d\n", hpd + 1);
}
return 0;
--
2.5.5
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^ permalink raw reply related [flat|nested] 2+ messages in thread* [PATCH 2/2] drm/amdgpu/gfx6: make some output debug only
2016-05-27 19:34 [PATCH 1/2] drm/amdgpu/dce6: make some output debug only Alex Deucher
@ 2016-05-27 19:34 ` Alex Deucher
0 siblings, 0 replies; 2+ messages in thread
From: Alex Deucher @ 2016-05-27 19:34 UTC (permalink / raw)
To: dri-devel; +Cc: Alex Deucher
make the default behavior less verbose.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 8b9f432..d26c80f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -943,7 +943,7 @@ static void gfx_v6_0_setup_rb(struct amdgpu_device *adev,
}
adev->gfx.config.backend_enable_mask = enabled_rbs;
- DRM_INFO("amdgpu: enabled_rbs %d \n", enabled_rbs);
+ DRM_DEBUG("amdgpu: enabled_rbs %d \n", enabled_rbs);
adev->gfx.config.num_rbs = hweight32(enabled_rbs);
for (i = 0; i < se_num; i++) {
@@ -1015,7 +1015,7 @@ static void gfx_v6_0_setup_spi(struct amdgpu_device *adev,
}
}
}
- DRM_INFO("amdgpu: setup_spi--active_cu %d \n", active_cu);
+ DRM_DEBUG("amdgpu: setup_spi--active_cu %d \n", active_cu);
gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff);
}
@@ -1259,8 +1259,8 @@ static int gfx_v6_0_ring_test_ring(struct amdgpu_ring *ring)
amdgpu_gfx_scratch_free(adev, scratch);
return r;
}
- DRM_INFO("amdgpu: scratch %x \n", scratch);
- DRM_INFO("amdgpu: REG_START %x \n", PACKET3_SET_CONFIG_REG_START);
+ DRM_DEBUG("amdgpu: scratch %x \n", scratch);
+ DRM_DEBUG("amdgpu: REG_START %x \n", PACKET3_SET_CONFIG_REG_START);
amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
amdgpu_ring_write(ring, (scratch - PACKET3_SET_CONFIG_REG_START));
amdgpu_ring_write(ring, 0xDEADBEEF);
@@ -2840,7 +2840,6 @@ static int gfx_v6_0_sw_init(void *handle)
return r;
}
- DRM_INFO("amdgpu: gfx_v6_sw_init_end \n");
return r;
}
@@ -3076,7 +3075,7 @@ static int gfx_v6_0_eop_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- DRM_INFO("IH: CP EOP ring %d\n", entry->ring_id);
+ DRM_DEBUG("IH: CP EOP ring %d\n", entry->ring_id);
switch (entry->ring_id) {
case 0:
--
2.5.5
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