drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ?

drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ?

[David Binderman]

Hello there,

drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of ‘65535 <<
20’ requires 37 bits to represent, but ‘int’ only has 32 bits
[-Wshift-overflow=]

Source code is

#define   BSM_MASK (0xFFFF << 20)

Maybe better code

#define   BSM_MASK (((unsigned long) 0xFFFF) << 20)


Regards

David Binderman
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[PATCH] drm/i915: fix BSM_MASK definition

[Jani Nikula]

The PCI config space BSM (Base of Stolen Memory) register has bits
20..31 set. The BSM_MASK definition goes beyond 32 bits, fix it.

drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of ‘65535 << 20’
requires 37 bits to represent, but ‘int’ only has 32 bits
[-Wshift-overflow=]

References: http://mid.gmane.org/CAMzoambf23FJH3Lq-gKcrVEus-bqFLxA35n0YjKGhqWOAJdBqg@mail.gmail.com
Reported-by: David Binderman <linuxdev.baldrick@gmail.com>
Cc: David Binderman <linuxdev.baldrick@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Fixes: e10fa551ae37 ("drm/i915: Clean up PCI config register handling")
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b407411e31ba..769ac8f7ab61 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -87,7 +87,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define   DEVEN_MCHBAR_EN (1 << 28)
 
 #define BSM 0x5c
-#define   BSM_MASK (0xFFFF << 20)
+#define   BSM_MASK (0xFFF << 20)
 
 #define HPLLCC	0xc0 /* 85x only */
 #define   GC_CLOCK_CONTROL_MASK		(0x7 << 0)
-- 
2.1.4

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Re: drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ?

[Chris Wilson]

On Mon, May 30, 2016 at 11:32:59AM +0100, David Binderman wrote:
> Hello there,
> 
> drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of ‘65535 <<
> 20’ requires 37 bits to represent, but ‘int’ only has 32 bits
> [-Wshift-overflow=]
> 
> Source code is
> 
> #define   BSM_MASK (0xFFFF << 20)
> 
> Maybe better code
> 
> #define   BSM_MASK (((unsigned long) 0xFFFF) << 20)

#define BSM_MASK (~0u << 20)

It should be a 32bit mask. The current (with the exception of undefined
behaviour of shifting into the signbit, fortunately gcc does what we
expect) code is functionally current as the mask will be truncated to
32bits.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ?

[Jani Nikula]

On Mon, 30 May 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Mon, May 30, 2016 at 11:32:59AM +0100, David Binderman wrote:
>> Hello there,
>> 
>> drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of ‘65535 <<
>> 20’ requires 37 bits to represent, but ‘int’ only has 32 bits
>> [-Wshift-overflow=]
>> 
>> Source code is
>> 
>> #define   BSM_MASK (0xFFFF << 20)
>> 
>> Maybe better code
>> 
>> #define   BSM_MASK (((unsigned long) 0xFFFF) << 20)
>
> #define BSM_MASK (~0u << 20)
>
> It should be a 32bit mask. The current (with the exception of undefined
> behaviour of shifting into the signbit, fortunately gcc does what we
> expect) code is functionally current as the mask will be truncated to
> 32bits.

In the patch I used BSM_MASK (0xFFF << 20). It does have the UB of
shifting into the sign bit, but then we have loads of e.g. (1 << 31) in
i915_reg.h which is no different.

The original code before e10fa551ae37b had ~((1<<20) - 1).

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center
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