From: Sean Paul <seanpaul@chromium.org>
To: Daniele Castagna <dcastagna@chromium.org>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 08/10] drm/rockchip: Add R2R registers
Date: Tue, 27 Feb 2018 10:41:42 -0500 [thread overview]
Message-ID: <20180227154142.GH223881@art_vandelay> (raw)
In-Reply-To: <20180215053300.70482-9-dcastagna@chromium.org>
On Thu, Feb 15, 2018 at 12:32:58AM -0500, Daniele Castagna wrote:
> This patch adds YUV2YUV registers to enable and control per-plane
> RGB2RGB colos space conversion matrix.
>
> Change-Id: I8f421222da3587caea6373e2201e918f0c5e2646
Missing Signed-off-by, I think you can squash this into "drm/rockchip: Implement
drm plane->ctm property" as well.
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 7 +++
> drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 48 +++++++++++++++++++++
> 2 files changed, 55 insertions(+)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> index aa8a5d2690376..fea5a087f4749 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> @@ -80,6 +80,13 @@ struct vop_misc {
> };
>
> struct vop_yuv2yuv {
> + struct vop_reg win0_r2r_en;
> + struct vop_reg win0_r2r_coefficients[12];
> + struct vop_reg win1_r2r_en;
> + struct vop_reg win1_r2r_coefficients[12];
> + struct vop_reg win2_r2r_en;
> + struct vop_reg win2_r2r_coefficients[12];
> +
> struct vop_reg win0_y2r_en;
> struct vop_reg win0_y2r_coefficients[12];
I'll revise my earlier feedback and propose:
#define NUM_CSC_COEFFICIENTS 12
#define NUM_R2R_WINDOWS 3
#define NUM_Y2R_WINDOWS 2
struct vop_csc_reg {
struct vop_reg en;
struct vop_reg coefficients[NUM_CSC_COEFFICIENTS];
};
struct vop_csc {
struct vop_csc_reg r2r[NUM_R2R_WINDOWS];
struct vop_csc_reg y2r[NUM_Y2R_WINDOWS];
};
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> index 0af95947f22d4..fb7b07aa4fa27 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> @@ -423,6 +423,54 @@ static const struct vop_output rk3399_output = {
> };
>
> static const struct vop_yuv2yuv rk3399_vop_yuv2yuv = {
> + .win0_r2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 0),
> + .win0_r2r_coefficients = {
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 0, 0xffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 0, 0xffff, 16),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 4, 0xffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 4, 0xffff, 16),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 8, 0xffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 8, 0xffff, 16),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 12, 0xffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 12, 0xffff, 16),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 16, 0xffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 20, 0xffffffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 24, 0xffffffff, 0),
> + VOP_REG(RK3399_WIN0_YUV2YUV_3X3 + 28, 0xffffffff, 0),
> + },
> +
> + .win1_r2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 8),
> + .win1_r2r_coefficients = {
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 0, 0xffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 0, 0xffff, 16),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 4, 0xffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 4, 0xffff, 16),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 8, 0xffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 8, 0xffff, 16),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 12, 0xffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 12, 0xffff, 16),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 16, 0xffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 20, 0xffffffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 24, 0xffffffff, 0),
> + VOP_REG(RK3399_WIN1_YUV2YUV_3X3 + 28, 0xffffffff, 0),
> + },
> +
> + .win2_r2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 16),
> + .win2_r2r_coefficients = {
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 0, 0xffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 0, 0xffff, 16),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 4, 0xffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 4, 0xffff, 16),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 8, 0xffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 8, 0xffff, 16),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 12, 0xffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 12, 0xffff, 16),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 16, 0xffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 20, 0xffffffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 24, 0xffffffff, 0),
> + VOP_REG(RK3399_WIN2_YUV2YUV_3X3 + 28, 0xffffffff, 0),
> + },
> +
> .win0_y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1),
> .win0_y2r_coefficients = {
> VOP_REG(RK3399_WIN1_YUV2YUV_Y2R + 0, 0xffff, 0),
> --
> 2.16.1.291.g4437f3f132-goog
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Sean Paul, Software Engineer, Google / Chromium OS
_______________________________________________
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next prev parent reply other threads:[~2018-02-27 15:41 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-15 5:32 [PATCH 00/10] drm: Add plane color matrix on rockchip Daniele Castagna
2018-02-15 5:32 ` [PATCH 01/10] drm/rockchip: YUV overlays BT.601 color conversion Daniele Castagna
2018-02-16 17:55 ` kbuild test robot
2018-02-27 15:03 ` Sean Paul
2018-12-14 16:29 ` [PATCH v2] drm/rockchip: Fix YUV buffers color rendering Ezequiel Garcia
2019-01-03 16:28 ` Ezequiel Garcia
2019-01-07 13:26 ` Heiko Stuebner
2019-01-07 20:07 ` Ezequiel Garcia
2019-01-08 17:17 ` Ezequiel Garcia
2019-01-08 21:46 ` [PATCH v3] " Ezequiel Garcia
2019-01-10 22:55 ` Heiko Stuebner
2018-02-15 5:32 ` [PATCH 02/10] drm: Add Plane Degamma properties Daniele Castagna
2018-02-16 19:38 ` kbuild test robot
2018-02-19 15:15 ` Daniel Vetter
2018-02-27 15:13 ` Sean Paul
2018-02-28 14:54 ` Shankar, Uma
2018-02-15 5:32 ` [PATCH 03/10] drm: Add Plane CTM property Daniele Castagna
2018-02-27 15:22 ` Sean Paul
2018-02-28 14:55 ` Shankar, Uma
2018-02-15 5:32 ` [PATCH 04/10] drm: Add Plane Gamma properties Daniele Castagna
2018-02-15 19:29 ` Harry Wentland
2018-02-15 19:45 ` Daniele Castagna
2018-02-16 20:10 ` Ville Syrjälä
2018-02-16 21:36 ` Harry Wentland
2018-02-18 6:43 ` Shankar, Uma
2018-02-19 15:14 ` Daniel Vetter
2018-02-27 15:26 ` Sean Paul
2018-02-27 16:52 ` Ville Syrjälä
2018-02-15 5:32 ` [PATCH 05/10] drm: Define helper function for plane color enabling Daniele Castagna
2018-02-27 15:28 ` Sean Paul
2018-02-28 14:57 ` Shankar, Uma
2018-02-15 5:32 ` [PATCH 06/10] drm: Define helper to set legacy gamma table size Daniele Castagna
2018-02-16 22:17 ` kbuild test robot
2018-02-27 15:35 ` Sean Paul
2018-02-27 16:20 ` Emil Velikov
2018-02-15 5:32 ` [PATCH 07/10] drm/rockchip: Add yuv2yuv registers to vop_lit Daniele Castagna
2018-02-27 15:36 ` Sean Paul
2018-02-15 5:32 ` [PATCH 08/10] drm/rockchip: Add R2R registers Daniele Castagna
2018-02-27 15:41 ` Sean Paul [this message]
2018-02-15 5:32 ` [PATCH 09/10] drm/rockchip: Implement drm plane->ctm property Daniele Castagna
2018-02-27 16:09 ` Sean Paul
2018-02-15 5:33 ` [PATCH 10/10] drm/rockchip: Enable 'PLANE_CTM' drm property Daniele Castagna
2018-02-27 16:10 ` Sean Paul
2018-02-19 15:16 ` [PATCH 00/10] drm: Add plane color matrix on rockchip Daniel Vetter
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