* [PATCH] drm/vc4: hdmi: Allow DBLCLK modes even if horz timing is odd.
@ 2022-01-27 13:51 Maxime Ripard
2022-02-03 15:06 ` (subset) " Maxime Ripard
0 siblings, 1 reply; 2+ messages in thread
From: Maxime Ripard @ 2022-01-27 13:51 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Maarten Lankhorst, Thomas Zimmermann,
Maxime Ripard
Cc: Tim Gover, Dom Cobley, Phil Elwell, dri-devel, Dave Stevenson
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
The 2711 pixel valve can't produce odd horizontal timings, and
checks were added to vc4_hdmi_encoder_atomic_check and
vc4_hdmi_encoder_mode_valid to filter out/block selection of
such modes.
Modes with DRM_MODE_FLAG_DBLCLK double all the horizontal timing
values before programming them into the PV. The PV values,
therefore, can not be odd, and so the modes can be supported.
Amend the filtering appropriately.
Fixes: 57fb32e632be ("drm/vc4: hdmi: Block odd horizontal timings")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 0ee446df50a0..92b1530aa17b 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1269,6 +1269,7 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
unsigned long long tmds_rate;
if (vc4_hdmi->variant->unsupported_odd_h_timings &&
+ !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
((mode->hdisplay % 2) || (mode->hsync_start % 2) ||
(mode->hsync_end % 2) || (mode->htotal % 2)))
return -EINVAL;
@@ -1316,6 +1317,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder,
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_hdmi->variant->unsupported_odd_h_timings &&
+ !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
((mode->hdisplay % 2) || (mode->hsync_start % 2) ||
(mode->hsync_end % 2) || (mode->htotal % 2)))
return MODE_H_ILLEGAL;
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: (subset) [PATCH] drm/vc4: hdmi: Allow DBLCLK modes even if horz timing is odd.
2022-01-27 13:51 [PATCH] drm/vc4: hdmi: Allow DBLCLK modes even if horz timing is odd Maxime Ripard
@ 2022-02-03 15:06 ` Maxime Ripard
0 siblings, 0 replies; 2+ messages in thread
From: Maxime Ripard @ 2022-02-03 15:06 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann
Cc: dri-devel, Dom Cobley, Phil Elwell, Tim Gover, Dave Stevenson
On Thu, 27 Jan 2022 14:51:16 +0100, Maxime Ripard wrote:
> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
>
> The 2711 pixel valve can't produce odd horizontal timings, and
> checks were added to vc4_hdmi_encoder_atomic_check and
> vc4_hdmi_encoder_mode_valid to filter out/block selection of
> such modes.
>
> [...]
Applied to drm/drm-misc (drm-misc-fixes).
Thanks!
Maxime
^ permalink raw reply [flat|nested] 2+ messages in thread
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2022-01-27 13:51 [PATCH] drm/vc4: hdmi: Allow DBLCLK modes even if horz timing is odd Maxime Ripard
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