From: Oded Gabbay <ogabbay@kernel.org>
To: dri-devel@lists.freedesktop.org
Cc: Ofir Bitton <obitton@habana.ai>
Subject: [PATCH 20/27] habanalabs/gaudi2: add support for TPC assert
Date: Sun, 12 Feb 2023 22:44:47 +0200 [thread overview]
Message-ID: <20230212204454.2938561-20-ogabbay@kernel.org> (raw)
In-Reply-To: <20230212204454.2938561-1-ogabbay@kernel.org>
From: Ofir Bitton <obitton@habana.ai>
In order to allow TPC engines to raise an assert, we must expose
the relevant MSIX interrupt to the user so he will configure the engine
correctly. In addition, we implement the corresponding interrupt
handler that will notify the user upon such an event.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
---
drivers/accel/habanalabs/common/habanalabs.h | 5 ++++
.../habanalabs/common/habanalabs_ioctl.c | 1 +
drivers/accel/habanalabs/common/irq.c | 18 +++++++++++++
drivers/accel/habanalabs/gaudi/gaudi.c | 1 +
drivers/accel/habanalabs/gaudi2/gaudi2.c | 25 ++++++++++++++++---
drivers/accel/habanalabs/gaudi2/gaudi2P.h | 2 ++
drivers/accel/habanalabs/goya/goya.c | 1 +
include/uapi/drm/habanalabs_accel.h | 3 ++-
8 files changed, 52 insertions(+), 4 deletions(-)
diff --git a/drivers/accel/habanalabs/common/habanalabs.h b/drivers/accel/habanalabs/common/habanalabs.h
index 24ad15272040..ed6987a0050f 100644
--- a/drivers/accel/habanalabs/common/habanalabs.h
+++ b/drivers/accel/habanalabs/common/habanalabs.h
@@ -665,6 +665,7 @@ struct hl_hints_range {
* @first_available_cq: first available CQ for the user.
* @user_interrupt_count: number of user interrupts.
* @user_dec_intr_count: number of decoder interrupts exposed to user.
+ * @tpc_interrupt_id: interrupt id for TPC to use in order to raise events towards the host.
* @cache_line_size: device cache line size.
* @server_type: Server type that the ASIC is currently installed in.
* The value is according to enum hl_server_type in uapi file.
@@ -791,6 +792,7 @@ struct asic_fixed_properties {
u16 first_available_cq[HL_MAX_DCORES];
u16 user_interrupt_count;
u16 user_dec_intr_count;
+ u16 tpc_interrupt_id;
u16 cache_line_size;
u16 server_type;
u8 completion_queues_count;
@@ -1099,6 +1101,7 @@ struct hl_cq {
enum hl_user_interrupt_type {
HL_USR_INTERRUPT_CQ = 0,
HL_USR_INTERRUPT_DECODER,
+ HL_USR_INTERRUPT_TPC
};
/**
@@ -3148,6 +3151,7 @@ struct hl_reset_info {
* @user_interrupt: array of hl_user_interrupt. upon the corresponding user
* interrupt, driver will monitor the list of fences
* registered to this interrupt.
+ * @tpc_interrupt: single TPC interrupt for all TPCs.
* @common_user_cq_interrupt: common user CQ interrupt for all user CQ interrupts.
* upon any user CQ interrupt, driver will monitor the
* list of fences registered to this common structure.
@@ -3332,6 +3336,7 @@ struct hl_device {
enum hl_asic_type asic_type;
struct hl_cq *completion_queue;
struct hl_user_interrupt *user_interrupt;
+ struct hl_user_interrupt tpc_interrupt;
struct hl_user_interrupt common_user_cq_interrupt;
struct hl_user_interrupt common_decoder_interrupt;
struct hl_cs **shadow_cs_queue;
diff --git a/drivers/accel/habanalabs/common/habanalabs_ioctl.c b/drivers/accel/habanalabs/common/habanalabs_ioctl.c
index 448cdd2501d8..100282fc82fc 100644
--- a/drivers/accel/habanalabs/common/habanalabs_ioctl.c
+++ b/drivers/accel/habanalabs/common/habanalabs_ioctl.c
@@ -102,6 +102,7 @@ static int hw_ip_info(struct hl_device *hdev, struct hl_info_args *args)
hw_ip.mme_master_slave_mode = prop->mme_master_slave_mode;
hw_ip.first_available_interrupt_id = prop->first_available_user_interrupt;
hw_ip.number_of_user_interrupts = prop->user_interrupt_count;
+ hw_ip.tpc_interrupt_id = prop->tpc_interrupt_id;
hw_ip.edma_enabled_mask = prop->edma_enabled_mask;
hw_ip.server_type = prop->server_type;
diff --git a/drivers/accel/habanalabs/common/irq.c b/drivers/accel/habanalabs/common/irq.c
index 716228291b46..bd0e3413721b 100644
--- a/drivers/accel/habanalabs/common/irq.c
+++ b/drivers/accel/habanalabs/common/irq.c
@@ -325,6 +325,21 @@ static void handle_user_interrupt(struct hl_device *hdev, struct hl_user_interru
}
}
+static void handle_tpc_interrupt(struct hl_device *hdev)
+{
+ u64 event_mask;
+ u32 flags;
+
+ event_mask = HL_NOTIFIER_EVENT_TPC_ASSERT |
+ HL_NOTIFIER_EVENT_USER_ENGINE_ERR |
+ HL_NOTIFIER_EVENT_DEVICE_RESET;
+
+ flags = HL_DRV_RESET_DELAY;
+
+ dev_err_ratelimited(hdev->dev, "Received TPC assert\n");
+ hl_device_cond_reset(hdev, flags, event_mask);
+}
+
/**
* hl_irq_handler_user_interrupt - irq handler for user interrupts
*
@@ -367,6 +382,9 @@ irqreturn_t hl_irq_user_interrupt_thread_handler(int irq, void *arg)
/* Handle decoder interrupt registered on this specific irq */
handle_user_interrupt(hdev, user_int);
break;
+ case HL_USR_INTERRUPT_TPC:
+ handle_tpc_interrupt(hdev);
+ break;
default:
break;
}
diff --git a/drivers/accel/habanalabs/gaudi/gaudi.c b/drivers/accel/habanalabs/gaudi/gaudi.c
index e097641db1d2..a276a2a4a46d 100644
--- a/drivers/accel/habanalabs/gaudi/gaudi.c
+++ b/drivers/accel/habanalabs/gaudi/gaudi.c
@@ -679,6 +679,7 @@ static int gaudi_set_fixed_properties(struct hl_device *hdev)
(num_sync_stream_queues * HL_RSVD_MONS);
prop->first_available_user_interrupt = USHRT_MAX;
+ prop->tpc_interrupt_id = USHRT_MAX;
for (i = 0 ; i < HL_MAX_DCORES ; i++)
prop->first_available_cq[i] = USHRT_MAX;
diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2.c b/drivers/accel/habanalabs/gaudi2/gaudi2.c
index a3e01e287f9d..2f51a121909b 100644
--- a/drivers/accel/habanalabs/gaudi2/gaudi2.c
+++ b/drivers/accel/habanalabs/gaudi2/gaudi2.c
@@ -2348,6 +2348,7 @@ static int gaudi2_set_fixed_properties(struct hl_device *hdev)
(num_sync_stream_queues * HL_RSVD_MONS);
prop->first_available_user_interrupt = GAUDI2_IRQ_NUM_USER_FIRST;
+ prop->tpc_interrupt_id = GAUDI2_IRQ_NUM_TPC_ASSERT;
prop->first_available_cq[0] = GAUDI2_RESERVED_CQ_NUMBER;
@@ -3235,6 +3236,9 @@ static void gaudi2_user_interrupt_setup(struct hl_device *hdev)
struct asic_fixed_properties *prop = &hdev->asic_prop;
int i, j, k;
+ /* Initialize TPC interrupt */
+ HL_USR_INTR_STRUCT_INIT(hdev->tpc_interrupt, hdev, 0, HL_USR_INTERRUPT_TPC);
+
/* Initialize common user CQ interrupt */
HL_USR_INTR_STRUCT_INIT(hdev->common_user_cq_interrupt, hdev,
HL_COMMON_USER_CQ_INTERRUPT_ID, HL_USR_INTERRUPT_CQ);
@@ -3892,6 +3896,8 @@ static const char *gaudi2_irq_name(u16 irq_number)
return "gaudi2 completion";
case GAUDI2_IRQ_NUM_DCORE0_DEC0_NRM ... GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM:
return gaudi2_vdec_irq_name[irq_number - GAUDI2_IRQ_NUM_DCORE0_DEC0_NRM];
+ case GAUDI2_IRQ_NUM_TPC_ASSERT:
+ return "gaudi2 tpc assert";
case GAUDI2_IRQ_NUM_USER_FIRST ... GAUDI2_IRQ_NUM_USER_LAST:
return "gaudi2 user completion";
default:
@@ -4004,6 +4010,15 @@ static int gaudi2_enable_msix(struct hl_device *hdev)
goto free_event_irq;
}
+ irq = pci_irq_vector(hdev->pdev, GAUDI2_IRQ_NUM_TPC_ASSERT);
+ rc = request_threaded_irq(irq, hl_irq_handler_user_interrupt,
+ hl_irq_user_interrupt_thread_handler, IRQF_ONESHOT,
+ gaudi2_irq_name(GAUDI2_IRQ_NUM_TPC_ASSERT), &hdev->tpc_interrupt);
+ if (rc) {
+ dev_err(hdev->dev, "Failed to request IRQ %d", irq);
+ goto free_dec_irq;
+ }
+
for (i = GAUDI2_IRQ_NUM_USER_FIRST, j = prop->user_dec_intr_count, user_irq_init_cnt = 0;
user_irq_init_cnt < prop->user_interrupt_count;
i++, j++, user_irq_init_cnt++) {
@@ -4031,9 +4046,8 @@ static int gaudi2_enable_msix(struct hl_device *hdev)
irq = pci_irq_vector(hdev->pdev, i);
free_irq(irq, &hdev->user_interrupt[j]);
}
-
- gaudi2_dec_disable_msix(hdev, GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM + 1);
-
+free_dec_irq:
+ gaudi2_dec_disable_msix(hdev, GAUDI2_IRQ_NUM_DEC_LAST + 1);
free_event_irq:
irq = pci_irq_vector(hdev->pdev, GAUDI2_IRQ_NUM_EVENT_QUEUE);
free_irq(irq, cq);
@@ -4065,6 +4079,8 @@ static void gaudi2_sync_irqs(struct hl_device *hdev)
synchronize_irq(irq);
}
+ synchronize_irq(pci_irq_vector(hdev->pdev, GAUDI2_IRQ_NUM_TPC_ASSERT));
+
for (i = GAUDI2_IRQ_NUM_USER_FIRST, j = 0 ; j < hdev->asic_prop.user_interrupt_count;
i++, j++) {
irq = pci_irq_vector(hdev->pdev, i);
@@ -4091,6 +4107,9 @@ static void gaudi2_disable_msix(struct hl_device *hdev)
gaudi2_dec_disable_msix(hdev, GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM + 1);
+ irq = pci_irq_vector(hdev->pdev, GAUDI2_IRQ_NUM_TPC_ASSERT);
+ free_irq(irq, &hdev->tpc_interrupt);
+
for (i = GAUDI2_IRQ_NUM_USER_FIRST, j = prop->user_dec_intr_count, k = 0;
k < hdev->asic_prop.user_interrupt_count ; i++, j++, k++) {
diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2P.h b/drivers/accel/habanalabs/gaudi2/gaudi2P.h
index 2687404d9d21..f79958b24811 100644
--- a/drivers/accel/habanalabs/gaudi2/gaudi2P.h
+++ b/drivers/accel/habanalabs/gaudi2/gaudi2P.h
@@ -410,9 +410,11 @@ enum gaudi2_irq_num {
GAUDI2_IRQ_NUM_SHARED_DEC0_ABNRM,
GAUDI2_IRQ_NUM_SHARED_DEC1_NRM,
GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM,
+ GAUDI2_IRQ_NUM_DEC_LAST = GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM,
GAUDI2_IRQ_NUM_COMPLETION,
GAUDI2_IRQ_NUM_NIC_PORT_FIRST,
GAUDI2_IRQ_NUM_NIC_PORT_LAST = (GAUDI2_IRQ_NUM_NIC_PORT_FIRST + NIC_NUMBER_OF_PORTS - 1),
+ GAUDI2_IRQ_NUM_TPC_ASSERT,
GAUDI2_IRQ_NUM_RESERVED_FIRST,
GAUDI2_IRQ_NUM_RESERVED_LAST = (GAUDI2_MSIX_ENTRIES - GAUDI2_NUM_USER_INTERRUPTS - 1),
GAUDI2_IRQ_NUM_USER_FIRST,
diff --git a/drivers/accel/habanalabs/goya/goya.c b/drivers/accel/habanalabs/goya/goya.c
index 2b135e856607..c5a22a8e0957 100644
--- a/drivers/accel/habanalabs/goya/goya.c
+++ b/drivers/accel/habanalabs/goya/goya.c
@@ -472,6 +472,7 @@ int goya_set_fixed_properties(struct hl_device *hdev)
prop->max_pending_cs = GOYA_MAX_PENDING_CS;
prop->first_available_user_interrupt = USHRT_MAX;
+ prop->tpc_interrupt_id = USHRT_MAX;
for (i = 0 ; i < HL_MAX_DCORES ; i++)
prop->first_available_cq[i] = USHRT_MAX;
diff --git a/include/uapi/drm/habanalabs_accel.h b/include/uapi/drm/habanalabs_accel.h
index c1fdbb85d1d5..359b19ef3c3f 100644
--- a/include/uapi/drm/habanalabs_accel.h
+++ b/include/uapi/drm/habanalabs_accel.h
@@ -885,6 +885,7 @@ enum hl_server_type {
* application to use. Relevant for Gaudi2 and later.
* @device_mem_alloc_default_page_size: default page size used in device memory allocation.
* @revision_id: PCI revision ID of the ASIC.
+ * @tpc_interrupt_id: interrupt id for TPC to use in order to raise events towards the host.
* @engine_core_interrupt_reg_addr: interrupt register address for engine core to use
* in order to raise events toward FW.
*/
@@ -922,7 +923,7 @@ struct hl_info_hw_ip_info {
__u32 reserved7;
__u8 reserved8;
__u8 revision_id;
- __u8 pad[2];
+ __u16 tpc_interrupt_id;
__u32 reserved9;
__u8 pad3[4];
__u64 engine_core_interrupt_reg_addr;
--
2.25.1
next prev parent reply other threads:[~2023-02-12 20:45 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-12 20:44 [PATCH 01/27] habanalabs/gaudi2: increase user interrupt grace time Oded Gabbay
2023-02-12 20:44 ` [PATCH 02/27] habanalabs/gaudi: capture RAZWI info only if HW indication detected Oded Gabbay
2023-02-12 20:44 ` [PATCH 03/27] habanalabs: split cdev creation to separate function Oded Gabbay
2023-02-16 10:40 ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 04/27] habanalabs: save class in hdev Oded Gabbay
2023-02-16 10:40 ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 05/27] habanalabs: refactor debugfs init Oded Gabbay
2023-02-16 10:40 ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 06/27] habanalabs: use memhash_node_export_put() in hl_release_dmabuf() Oded Gabbay
2023-02-16 11:48 ` Stanislaw Gruszka
2023-02-16 14:26 ` Tomer Tayar
2023-02-16 14:40 ` Stanislaw Gruszka
2023-02-12 20:44 ` [PATCH 07/27] habanalabs/gaudi2: fix address decode RAZWI handling Oded Gabbay
2023-02-12 20:44 ` [PATCH 08/27] habanalabs: add info when FD released while device still in use Oded Gabbay
2023-02-16 12:25 ` Stanislaw Gruszka
2023-02-16 14:21 ` Oded Gabbay
2023-02-16 15:04 ` Stanislaw Gruszka
2023-02-17 11:34 ` Tomer Tayar
2023-02-20 15:54 ` Stanislaw Gruszka
2023-02-20 16:16 ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 09/27] habanalabs: enforce release order of compute device and dma-buf Oded Gabbay
2023-02-12 20:44 ` [PATCH 10/27] habanalabs: add critical-event bit in notifier Oded Gabbay
2023-02-12 20:44 ` [PATCH 11/27] habanalabs/gaudi2: expose engine core int reg address Oded Gabbay
2023-02-12 20:44 ` [PATCH 12/27] habanalabs/gaudi2: unsecure CFG_TPC_ID register Oded Gabbay
2023-02-12 20:44 ` [PATCH 13/27] habanalabs: minimize error prints when mem map fails Oded Gabbay
2023-02-12 20:44 ` [PATCH 14/27] habanalabs: disable PCI when escalating compute to hard-reset Oded Gabbay
2023-02-12 20:44 ` [PATCH 15/27] habanalabs: enable graceful reset mechanism for compute-reset Oded Gabbay
2023-02-12 20:44 ` [PATCH 16/27] habanalabs/gaudi2: get reset type indication from irq_map Oded Gabbay
2023-02-12 20:44 ` [PATCH 17/27] habanalabs/gaudi2: modify events reset policy Oded Gabbay
2023-02-12 20:44 ` [PATCH 18/27] habanalabs: change user interrupt to threaded IRQ Oded Gabbay
2023-02-16 10:28 ` Stanislaw Gruszka
2023-02-16 13:47 ` Oded Gabbay
2023-02-16 14:29 ` Stanislaw Gruszka
2023-02-16 10:39 ` Stanislaw Gruszka
2023-02-16 13:49 ` Oded Gabbay
2023-02-12 20:44 ` [PATCH 19/27] habanalabs: capture interrupt timestamp in handler Oded Gabbay
2023-02-16 14:39 ` Stanislaw Gruszka
2023-02-19 12:42 ` Ofir Bitton
2023-02-12 20:44 ` Oded Gabbay [this message]
2023-02-12 20:44 ` [PATCH 21/27] habanalabs: fix print in hl_irq_handler_eq() Oded Gabbay
2023-02-12 20:44 ` [PATCH 22/27] habanalabs: remove hl_irq_handler_default() Oded Gabbay
2023-02-12 20:44 ` [PATCH 23/27] habanalabs: tiny refactor of hl_device_reset for readability Oded Gabbay
2023-02-12 20:44 ` [PATCH 24/27] habanalabs: rename security function parameters Oded Gabbay
2023-02-12 20:44 ` [PATCH 25/27] habanalabs: in hl_device_reset remove 'hard_instead_of_soft' Oded Gabbay
2023-02-12 20:44 ` [PATCH 26/27] habanalabs: in hl_device_reset small refactor for readabilty Oded Gabbay
2023-02-12 20:44 ` [PATCH 27/27] habanalabs: don't trace cpu accessible dma alloc/free Oded Gabbay
2023-02-16 10:53 ` [PATCH 01/27] habanalabs/gaudi2: increase user interrupt grace time Stanislaw Gruszka
2023-02-16 14:24 ` Oded Gabbay
2023-02-18 19:13 ` Ofir Bitton
2023-02-20 15:31 ` Stanislaw Gruszka
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