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From: Oded Gabbay <ogabbay@kernel.org>
To: dri-devel@lists.freedesktop.org
Cc: Dafna Hirschfeld <dhirschfeld@habana.ai>
Subject: [PATCH 27/27] habanalabs: don't trace cpu accessible dma alloc/free
Date: Sun, 12 Feb 2023 22:44:54 +0200	[thread overview]
Message-ID: <20230212204454.2938561-27-ogabbay@kernel.org> (raw)
In-Reply-To: <20230212204454.2938561-1-ogabbay@kernel.org>

From: Dafna Hirschfeld <dhirschfeld@habana.ai>

The cpu accessible dma allocations use the gen_pool api which actually
does not allocate new memory from the system but manages memory already
allocated before. When tracing this together with real dma
allocation/free it cause confusing logs like a '0' dma address and
a cpu address appearing twice etc.

Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
---
 drivers/accel/habanalabs/common/device.c     | 29 +++++++-------------
 drivers/accel/habanalabs/common/habanalabs.h | 12 ++------
 2 files changed, 12 insertions(+), 29 deletions(-)

diff --git a/drivers/accel/habanalabs/common/device.c b/drivers/accel/habanalabs/common/device.c
index 8e71793c6ad1..fefe70bbbede 100644
--- a/drivers/accel/habanalabs/common/device.c
+++ b/drivers/accel/habanalabs/common/device.c
@@ -22,7 +22,6 @@
 
 enum dma_alloc_type {
 	DMA_ALLOC_COHERENT,
-	DMA_ALLOC_CPU_ACCESSIBLE,
 	DMA_ALLOC_POOL,
 };
 
@@ -121,9 +120,6 @@ static void *hl_dma_alloc_common(struct hl_device *hdev, size_t size, dma_addr_t
 	case DMA_ALLOC_COHERENT:
 		ptr = hdev->asic_funcs->asic_dma_alloc_coherent(hdev, size, dma_handle, flag);
 		break;
-	case DMA_ALLOC_CPU_ACCESSIBLE:
-		ptr = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, size, dma_handle);
-		break;
 	case DMA_ALLOC_POOL:
 		ptr = hdev->asic_funcs->asic_dma_pool_zalloc(hdev, size, flag, dma_handle);
 		break;
@@ -147,9 +143,6 @@ static void hl_asic_dma_free_common(struct hl_device *hdev, size_t size, void *c
 	case DMA_ALLOC_COHERENT:
 		hdev->asic_funcs->asic_dma_free_coherent(hdev, size, cpu_addr, dma_handle);
 		break;
-	case DMA_ALLOC_CPU_ACCESSIBLE:
-		hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, size, cpu_addr);
-		break;
 	case DMA_ALLOC_POOL:
 		hdev->asic_funcs->asic_dma_pool_free(hdev, cpu_addr, dma_handle);
 		break;
@@ -170,18 +163,6 @@ void hl_asic_dma_free_coherent_caller(struct hl_device *hdev, size_t size, void
 	hl_asic_dma_free_common(hdev, size, cpu_addr, dma_handle, DMA_ALLOC_COHERENT, caller);
 }
 
-void *hl_cpu_accessible_dma_pool_alloc_caller(struct hl_device *hdev, size_t size,
-						dma_addr_t *dma_handle, const char *caller)
-{
-	return hl_dma_alloc_common(hdev, size, dma_handle, 0, DMA_ALLOC_CPU_ACCESSIBLE, caller);
-}
-
-void hl_cpu_accessible_dma_pool_free_caller(struct hl_device *hdev, size_t size, void *vaddr,
-						const char *caller)
-{
-	hl_asic_dma_free_common(hdev, size, vaddr, 0, DMA_ALLOC_CPU_ACCESSIBLE, caller);
-}
-
 void *hl_asic_dma_pool_zalloc_caller(struct hl_device *hdev, size_t size, gfp_t mem_flags,
 					dma_addr_t *dma_handle, const char *caller)
 {
@@ -194,6 +175,16 @@ void hl_asic_dma_pool_free_caller(struct hl_device *hdev, void *vaddr, dma_addr_
 	hl_asic_dma_free_common(hdev, 0, vaddr, dma_addr, DMA_ALLOC_POOL, caller);
 }
 
+void *hl_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size, dma_addr_t *dma_handle)
+{
+	return hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, size, dma_handle);
+}
+
+void hl_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size, void *vaddr)
+{
+	hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, size, vaddr);
+}
+
 int hl_dma_map_sgtable(struct hl_device *hdev, struct sg_table *sgt, enum dma_data_direction dir)
 {
 	struct asic_fixed_properties *prop = &hdev->asic_prop;
diff --git a/drivers/accel/habanalabs/common/habanalabs.h b/drivers/accel/habanalabs/common/habanalabs.h
index ec0879168adf..7b6b4ff20a3b 100644
--- a/drivers/accel/habanalabs/common/habanalabs.h
+++ b/drivers/accel/habanalabs/common/habanalabs.h
@@ -155,18 +155,12 @@ enum hl_mmu_enablement {
 #define hl_asic_dma_alloc_coherent(hdev, size, dma_handle, flags) \
 	hl_asic_dma_alloc_coherent_caller(hdev, size, dma_handle, flags, __func__)
 
-#define hl_cpu_accessible_dma_pool_alloc(hdev, size, dma_handle) \
-	hl_cpu_accessible_dma_pool_alloc_caller(hdev, size, dma_handle, __func__)
-
 #define hl_asic_dma_pool_zalloc(hdev, size, mem_flags, dma_handle) \
 	hl_asic_dma_pool_zalloc_caller(hdev, size, mem_flags, dma_handle, __func__)
 
 #define hl_asic_dma_free_coherent(hdev, size, cpu_addr, dma_handle) \
 	hl_asic_dma_free_coherent_caller(hdev, size, cpu_addr, dma_handle, __func__)
 
-#define hl_cpu_accessible_dma_pool_free(hdev, size, vaddr) \
-	hl_cpu_accessible_dma_pool_free_caller(hdev, size, vaddr, __func__)
-
 #define hl_asic_dma_pool_free(hdev, vaddr, dma_addr) \
 	hl_asic_dma_pool_free_caller(hdev, vaddr, dma_addr, __func__)
 
@@ -3602,14 +3596,12 @@ static inline bool hl_mem_area_crosses_range(u64 address, u32 size,
 }
 
 uint64_t hl_set_dram_bar_default(struct hl_device *hdev, u64 addr);
+void *hl_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size, dma_addr_t *dma_handle);
+void hl_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size, void *vaddr);
 void *hl_asic_dma_alloc_coherent_caller(struct hl_device *hdev, size_t size, dma_addr_t *dma_handle,
 					gfp_t flag, const char *caller);
 void hl_asic_dma_free_coherent_caller(struct hl_device *hdev, size_t size, void *cpu_addr,
 					dma_addr_t dma_handle, const char *caller);
-void *hl_cpu_accessible_dma_pool_alloc_caller(struct hl_device *hdev, size_t size,
-						dma_addr_t *dma_handle, const char *caller);
-void hl_cpu_accessible_dma_pool_free_caller(struct hl_device *hdev, size_t size, void *vaddr,
-						const char *caller);
 void *hl_asic_dma_pool_zalloc_caller(struct hl_device *hdev, size_t size, gfp_t mem_flags,
 					dma_addr_t *dma_handle, const char *caller);
 void hl_asic_dma_pool_free_caller(struct hl_device *hdev, void *vaddr, dma_addr_t dma_addr,
-- 
2.25.1


  parent reply	other threads:[~2023-02-12 20:46 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-12 20:44 [PATCH 01/27] habanalabs/gaudi2: increase user interrupt grace time Oded Gabbay
2023-02-12 20:44 ` [PATCH 02/27] habanalabs/gaudi: capture RAZWI info only if HW indication detected Oded Gabbay
2023-02-12 20:44 ` [PATCH 03/27] habanalabs: split cdev creation to separate function Oded Gabbay
2023-02-16 10:40   ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 04/27] habanalabs: save class in hdev Oded Gabbay
2023-02-16 10:40   ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 05/27] habanalabs: refactor debugfs init Oded Gabbay
2023-02-16 10:40   ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 06/27] habanalabs: use memhash_node_export_put() in hl_release_dmabuf() Oded Gabbay
2023-02-16 11:48   ` Stanislaw Gruszka
2023-02-16 14:26     ` Tomer Tayar
2023-02-16 14:40       ` Stanislaw Gruszka
2023-02-12 20:44 ` [PATCH 07/27] habanalabs/gaudi2: fix address decode RAZWI handling Oded Gabbay
2023-02-12 20:44 ` [PATCH 08/27] habanalabs: add info when FD released while device still in use Oded Gabbay
2023-02-16 12:25   ` Stanislaw Gruszka
2023-02-16 14:21     ` Oded Gabbay
2023-02-16 15:04       ` Stanislaw Gruszka
2023-02-17 11:34         ` Tomer Tayar
2023-02-20 15:54           ` Stanislaw Gruszka
2023-02-20 16:16             ` Tomer Tayar
2023-02-12 20:44 ` [PATCH 09/27] habanalabs: enforce release order of compute device and dma-buf Oded Gabbay
2023-02-12 20:44 ` [PATCH 10/27] habanalabs: add critical-event bit in notifier Oded Gabbay
2023-02-12 20:44 ` [PATCH 11/27] habanalabs/gaudi2: expose engine core int reg address Oded Gabbay
2023-02-12 20:44 ` [PATCH 12/27] habanalabs/gaudi2: unsecure CFG_TPC_ID register Oded Gabbay
2023-02-12 20:44 ` [PATCH 13/27] habanalabs: minimize error prints when mem map fails Oded Gabbay
2023-02-12 20:44 ` [PATCH 14/27] habanalabs: disable PCI when escalating compute to hard-reset Oded Gabbay
2023-02-12 20:44 ` [PATCH 15/27] habanalabs: enable graceful reset mechanism for compute-reset Oded Gabbay
2023-02-12 20:44 ` [PATCH 16/27] habanalabs/gaudi2: get reset type indication from irq_map Oded Gabbay
2023-02-12 20:44 ` [PATCH 17/27] habanalabs/gaudi2: modify events reset policy Oded Gabbay
2023-02-12 20:44 ` [PATCH 18/27] habanalabs: change user interrupt to threaded IRQ Oded Gabbay
2023-02-16 10:28   ` Stanislaw Gruszka
2023-02-16 13:47     ` Oded Gabbay
2023-02-16 14:29       ` Stanislaw Gruszka
2023-02-16 10:39   ` Stanislaw Gruszka
2023-02-16 13:49     ` Oded Gabbay
2023-02-12 20:44 ` [PATCH 19/27] habanalabs: capture interrupt timestamp in handler Oded Gabbay
2023-02-16 14:39   ` Stanislaw Gruszka
2023-02-19 12:42     ` Ofir Bitton
2023-02-12 20:44 ` [PATCH 20/27] habanalabs/gaudi2: add support for TPC assert Oded Gabbay
2023-02-12 20:44 ` [PATCH 21/27] habanalabs: fix print in hl_irq_handler_eq() Oded Gabbay
2023-02-12 20:44 ` [PATCH 22/27] habanalabs: remove hl_irq_handler_default() Oded Gabbay
2023-02-12 20:44 ` [PATCH 23/27] habanalabs: tiny refactor of hl_device_reset for readability Oded Gabbay
2023-02-12 20:44 ` [PATCH 24/27] habanalabs: rename security function parameters Oded Gabbay
2023-02-12 20:44 ` [PATCH 25/27] habanalabs: in hl_device_reset remove 'hard_instead_of_soft' Oded Gabbay
2023-02-12 20:44 ` [PATCH 26/27] habanalabs: in hl_device_reset small refactor for readabilty Oded Gabbay
2023-02-12 20:44 ` Oded Gabbay [this message]
2023-02-16 10:53 ` [PATCH 01/27] habanalabs/gaudi2: increase user interrupt grace time Stanislaw Gruszka
2023-02-16 14:24   ` Oded Gabbay
2023-02-18 19:13     ` Ofir Bitton
2023-02-20 15:31 ` Stanislaw Gruszka

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