* [PATCH 1/5] drm/amd/display/amdgpu_dm: show error names
2026-07-02 16:24 [PATCH 0/5] Random debugging quality-of-life improvements Michał Mirosław
@ 2026-07-02 16:24 ` Michał Mirosław
2026-07-02 16:24 ` [PATCH 3/5] drm/amd/pm/smu7: return error on message send failure Michał Mirosław
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Michał Mirosław @ 2026-07-02 16:24 UTC (permalink / raw)
To: Alex Deucher, Christian König, Harry Wentland, Leo Li,
Rodrigo Siqueira, Kenneth Feng
Cc: amd-gfx, dri-devel
Convert printk() args that log error numbers to log the names.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 40 +++++++++----------
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 20 +++++-----
.../drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 12 +++---
3 files changed, 38 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b97ceabe6173..a95086c3969a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6802,7 +6802,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
ret = drm_atomic_helper_check_modeset(dev, state);
if (ret) {
- drm_dbg_atomic(dev, "drm_atomic_helper_check_modeset() failed\n");
+ drm_dbg_atomic(dev, "drm_atomic_helper_check_modeset() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -6817,7 +6817,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
new_crtc_state = drm_atomic_get_crtc_state(state, new_con_state->crtc);
if (IS_ERR(new_crtc_state)) {
- drm_dbg_atomic(dev, "drm_atomic_get_crtc_state() failed\n");
+ drm_dbg_atomic(dev, "drm_atomic_get_crtc_state() failed: %pe\n", new_crtc_state);
ret = PTR_ERR(new_crtc_state);
goto fail;
}
@@ -6837,7 +6837,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
ret = add_affected_mst_dsc_crtcs(state, crtc);
if (ret) {
- drm_dbg_atomic(dev, "add_affected_mst_dsc_crtcs() failed\n");
+ drm_dbg_atomic(dev, "add_affected_mst_dsc_crtcs() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
}
@@ -6854,7 +6854,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
ret = amdgpu_dm_verify_lut_sizes(new_crtc_state);
if (ret) {
- drm_dbg_atomic(dev, "amdgpu_dm_verify_lut_sizes() failed\n");
+ drm_dbg_atomic(dev, "amdgpu_dm_verify_lut_sizes() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -6863,13 +6863,13 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
ret = drm_atomic_add_affected_connectors(state, crtc);
if (ret) {
- drm_dbg_atomic(dev, "drm_atomic_add_affected_connectors() failed\n");
+ drm_dbg_atomic(dev, "drm_atomic_add_affected_connectors() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
ret = drm_atomic_add_affected_planes(state, crtc);
if (ret) {
- drm_dbg_atomic(dev, "drm_atomic_add_affected_planes() failed\n");
+ drm_dbg_atomic(dev, "drm_atomic_add_affected_planes() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -6908,7 +6908,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (IS_ERR(new_plane_state)) {
ret = PTR_ERR(new_plane_state);
- drm_dbg_atomic(dev, "new_plane_state is BAD\n");
+ drm_dbg_atomic(dev, "new_plane_state is BAD: %pe\n", new_plane_state);
goto fail;
}
}
@@ -6922,7 +6922,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
*/
ret = drm_atomic_normalize_zpos(dev, state);
if (ret) {
- drm_dbg(dev, "drm_atomic_normalize_zpos() failed\n");
+ drm_dbg(dev, "drm_atomic_normalize_zpos() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -6936,7 +6936,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
ret = dm_crtc_get_cursor_mode(adev, state, dm_new_crtc_state,
&dm_new_crtc_state->cursor_mode);
if (ret) {
- drm_dbg(dev, "Failed to determine cursor mode\n");
+ drm_dbg(dev, "Failed to determine cursor mode: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -6968,7 +6968,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
&lock_and_validation_needed,
&is_top_most_overlay);
if (ret) {
- drm_dbg_atomic(dev, "dm_update_plane_state() failed\n");
+ drm_dbg_atomic(dev, "dm_update_plane_state() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
}
@@ -6981,7 +6981,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
false,
&lock_and_validation_needed);
if (ret) {
- drm_dbg_atomic(dev, "DISABLE: dm_update_crtc_state() failed\n");
+ drm_dbg_atomic(dev, "DISABLE: dm_update_crtc_state() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
}
@@ -6994,7 +6994,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
true,
&lock_and_validation_needed);
if (ret) {
- drm_dbg_atomic(dev, "ENABLE: dm_update_crtc_state() failed\n");
+ drm_dbg_atomic(dev, "ENABLE: dm_update_crtc_state() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
}
@@ -7008,7 +7008,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
&lock_and_validation_needed,
&is_top_most_overlay);
if (ret) {
- drm_dbg_atomic(dev, "dm_update_plane_state() failed\n");
+ drm_dbg_atomic(dev, "dm_update_plane_state() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
}
@@ -7024,7 +7024,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
/* Run this here since we want to validate the streams we created */
ret = drm_atomic_helper_check_planes(dev, state);
if (ret) {
- drm_dbg_atomic(dev, "drm_atomic_helper_check_planes() failed\n");
+ drm_dbg_atomic(dev, "drm_atomic_helper_check_planes() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -7162,13 +7162,13 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (lock_and_validation_needed) {
ret = dm_atomic_get_state(state, &dm_state);
if (ret) {
- drm_dbg_atomic(dev, "dm_atomic_get_state() failed\n");
+ drm_dbg_atomic(dev, "dm_atomic_get_state() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
ret = do_aquire_global_lock(dev, state);
if (ret) {
- drm_dbg_atomic(dev, "do_aquire_global_lock() failed\n");
+ drm_dbg_atomic(dev, "do_aquire_global_lock() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -7176,7 +7176,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (dc_resource_is_dsc_encoding_supported(dc)) {
ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars);
if (ret) {
- drm_dbg_atomic(dev, "MST_DSC compute_mst_dsc_configs_for_state() failed\n");
+ drm_dbg_atomic(dev, "MST_DSC compute_mst_dsc_configs_for_state() failed: %pe\n", ERR_PTR(ret));
ret = -EINVAL;
goto fail;
}
@@ -7185,7 +7185,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
ret = dm_update_mst_vcpi_slots_for_dsc(state, dm_state->context, vars);
if (ret) {
- drm_dbg_atomic(dev, "dm_update_mst_vcpi_slots_for_dsc() failed\n");
+ drm_dbg_atomic(dev, "dm_update_mst_vcpi_slots_for_dsc() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
@@ -7197,7 +7197,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
*/
ret = drm_dp_mst_atomic_check(state);
if (ret) {
- drm_dbg_atomic(dev, "MST drm_dp_mst_atomic_check() failed\n");
+ drm_dbg_atomic(dev, "MST drm_dp_mst_atomic_check() failed: %pe\n", ERR_PTR(ret));
goto fail;
}
status = dc_validate_global_state(dc, dm_state->context, DC_VALIDATE_MODE_ONLY);
@@ -7286,7 +7286,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
else if (ret == -EINTR || ret == -EAGAIN || ret == -ERESTARTSYS)
drm_dbg_atomic(dev, "Atomic check stopped due to signal.\n");
else
- drm_dbg_atomic(dev, "Atomic check failed with err: %d\n", ret);
+ drm_dbg_atomic(dev, "Atomic check failed: %pe\n", ERR_PTR(ret));
trace_amdgpu_dm_atomic_check_finish(state, ret);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 204b4641f07d..a12da0b60065 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -374,7 +374,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers(s
ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);
if (ret)
- drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned error: %d\n", ret);
+ drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned error: %pe\n", ERR_PTR(ret));
return ret;
}
@@ -415,7 +415,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx12_plane_attributes_from_modifiers(
/* TODO: This seems wrong because there is no DCC plane on GFX12. */
ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);
if (ret)
- drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned error: %d\n", ret);
+ drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned: %pe\n", ERR_PTR(ret));
return ret;
}
@@ -975,13 +975,15 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,
adev = amdgpu_ttm_adev(rbo->tbo.bdev);
r = amdgpu_bo_reserve(rbo, true);
if (r) {
- drm_err(adev_to_drm(adev), "fail to reserve bo (%d)\n", r);
+ drm_err(adev_to_drm(adev), "fail to reserve bo: %pe\n", ERR_PTR(r));
return r;
}
r = dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES);
- if (r)
+ if (r) {
+ drm_err(adev_to_drm(adev), "reserving fence slot failed: %pe\n", ERR_PTR(r));
goto error_unlock;
+ }
if (plane->type != DRM_PLANE_TYPE_CURSOR)
domain = amdgpu_display_supported_domains(adev, rbo->flags);
@@ -992,13 +994,13 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,
r = amdgpu_bo_pin(rbo, domain);
if (unlikely(r != 0)) {
if (r != -ERESTARTSYS)
- DRM_ERROR("Failed to pin framebuffer with error %d\n", r);
+ DRM_ERROR("Failed to pin framebuffer: %pe\n", ERR_PTR(r));
goto error_unlock;
}
r = amdgpu_ttm_alloc_gart(&rbo->tbo);
if (unlikely(r != 0)) {
- DRM_ERROR("%p bind failed\n", rbo);
+ DRM_ERROR("%p bind failed: %pe\n", rbo, ERR_PTR(r));
goto error_unpin;
}
@@ -1058,7 +1060,7 @@ static void amdgpu_dm_plane_helper_cleanup_fb(struct drm_plane *plane,
rbo = gem_to_amdgpu_bo(old_state->fb->obj[0]);
r = amdgpu_bo_reserve(rbo, false);
if (unlikely(r)) {
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve rbo before unpin: %pe\n", ERR_PTR(r));
return;
}
@@ -1861,8 +1863,8 @@ dm_plane_init_colorops(struct drm_plane *plane)
if (dc->ctx->dce_version >= DCN_VERSION_3_0) {
ret = amdgpu_dm_initialize_default_pipeline(plane, &pipelines[len]);
if (ret) {
- drm_err(plane->dev, "Failed to create color pipeline for plane %d: %d\n",
- plane->base.id, ret);
+ drm_err(plane->dev, "Failed to create color pipeline for plane %d: %pe\n",
+ plane->base.id, ERR_PTR(ret));
goto out;
}
len++;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
index 0bf82e46f773..a69657213ce0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
@@ -107,13 +107,15 @@ static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector
r = amdgpu_bo_reserve(rbo, true);
if (r) {
- drm_err(adev_to_drm(adev), "fail to reserve bo (%d)\n", r);
+ drm_err(adev_to_drm(adev), "fail to reserve bo: %pe\n", ERR_PTR(r));
return r;
}
r = dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES);
- if (r)
+ if (r) {
+ drm_err(adev_to_drm(adev), "reserving fence slot failed: %pe\n", ERR_PTR(r));
goto error_unlock;
+ }
domain = amdgpu_display_supported_domains(adev, rbo->flags);
@@ -121,13 +123,13 @@ static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector
r = amdgpu_bo_pin(rbo, domain);
if (unlikely(r != 0)) {
if (r != -ERESTARTSYS)
- DRM_ERROR("Failed to pin framebuffer with error %d\n", r);
+ DRM_ERROR("Failed to pin framebuffer: %pe\n", ERR_PTR(r));
goto error_unlock;
}
r = amdgpu_ttm_alloc_gart(&rbo->tbo);
if (unlikely(r != 0)) {
- DRM_ERROR("%p bind failed\n", rbo);
+ DRM_ERROR("%p bind failed: %pe\n", rbo, ERR_PTR(r));
goto error_unpin;
}
@@ -159,7 +161,7 @@ static void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connector *connector,
rbo = gem_to_amdgpu_bo(job->fb->obj[0]);
r = amdgpu_bo_reserve(rbo, false);
if (unlikely(r)) {
- DRM_ERROR("failed to reserve rbo before unpin\n");
+ DRM_ERROR("failed to reserve rbo before unpin: %pe\n", ERR_PTR(r));
return;
}
--
2.47.3
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 4/5] drm/amd/amdgpu/cgs: Avoid redundant copying of firmware filename
2026-07-02 16:24 [PATCH 0/5] Random debugging quality-of-life improvements Michał Mirosław
` (2 preceding siblings ...)
2026-07-02 16:24 ` [PATCH 2/5] drm/amd/pm/smu7: make SMU message reports more readable Michał Mirosław
@ 2026-07-02 16:24 ` Michał Mirosław
2026-07-02 16:24 ` [PATCH 5/5] drm/amdgpu: debugfs: avoid extra EOLs in amdgpu_gem_info Michał Mirosław
4 siblings, 0 replies; 8+ messages in thread
From: Michał Mirosław @ 2026-07-02 16:24 UTC (permalink / raw)
To: Alex Deucher, Christian König, Harry Wentland, Kenneth Feng,
Leo Li, Rodrigo Siqueira
Cc: amd-gfx, dri-devel
While at it, remove redundant error message - request_firmware() will
log a failure anyway.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 54 ++++++++++++-------------
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 09c8942c22d3..a43cd4980d44 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -241,7 +241,7 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
info->fw_version = amdgpu_get_firmware_version(cgs_device, type);
info->feature_version = (uint16_t)le32_to_cpu(header->ucode_feature_version);
} else {
- char fw_name[30] = {0};
+ const char *fw_name = NULL;
int err = 0;
uint32_t ucode_size;
uint32_t ucode_start_address;
@@ -257,17 +257,17 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
(adev->pdev->revision == 0x81) ||
(adev->pdev->device == 0x665f)) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/bonaire_k_smc.bin");
+ fw_name = "bonaire_k_smc.bin";
} else {
- strscpy(fw_name, "amdgpu/bonaire_smc.bin");
+ fw_name = "bonaire_smc.bin";
}
break;
case CHIP_HAWAII:
if (adev->pdev->revision == 0x80) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/hawaii_k_smc.bin");
+ fw_name = "hawaii_k_smc.bin";
} else {
- strscpy(fw_name, "amdgpu/hawaii_smc.bin");
+ fw_name = "hawaii_smc.bin";
}
break;
case CHIP_TOPAZ:
@@ -277,76 +277,76 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0xD1)) ||
((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0xD3))) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/topaz_k_smc.bin");
+ fw_name = "topaz_k_smc.bin";
} else
- strscpy(fw_name, "amdgpu/topaz_smc.bin");
+ fw_name = "topaz_smc.bin";
break;
case CHIP_TONGA:
if (((adev->pdev->device == 0x6939) && (adev->pdev->revision == 0xf1)) ||
((adev->pdev->device == 0x6938) && (adev->pdev->revision == 0xf1))) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/tonga_k_smc.bin");
+ fw_name = "tonga_k_smc.bin";
} else
- strscpy(fw_name, "amdgpu/tonga_smc.bin");
+ fw_name = "tonga_smc.bin";
break;
case CHIP_FIJI:
- strscpy(fw_name, "amdgpu/fiji_smc.bin");
+ fw_name = "fiji_smc.bin";
break;
case CHIP_POLARIS11:
if (type == CGS_UCODE_ID_SMU) {
if (ASICID_IS_P21(adev->pdev->device, adev->pdev->revision)) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/polaris11_k_smc.bin");
+ fw_name = "polaris11_k_smc.bin";
} else if (ASICID_IS_P31(adev->pdev->device, adev->pdev->revision)) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/polaris11_k2_smc.bin");
+ fw_name = "polaris11_k2_smc.bin";
} else {
- strscpy(fw_name, "amdgpu/polaris11_smc.bin");
+ fw_name = "polaris11_smc.bin";
}
} else if (type == CGS_UCODE_ID_SMU_SK) {
- strscpy(fw_name, "amdgpu/polaris11_smc_sk.bin");
+ fw_name = "polaris11_smc_sk.bin";
}
break;
case CHIP_POLARIS10:
if (type == CGS_UCODE_ID_SMU) {
if (ASICID_IS_P20(adev->pdev->device, adev->pdev->revision)) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/polaris10_k_smc.bin");
+ fw_name = "polaris10_k_smc.bin";
} else if (ASICID_IS_P30(adev->pdev->device, adev->pdev->revision)) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/polaris10_k2_smc.bin");
+ fw_name = "polaris10_k2_smc.bin";
} else {
- strscpy(fw_name, "amdgpu/polaris10_smc.bin");
+ fw_name = "polaris10_smc.bin";
}
} else if (type == CGS_UCODE_ID_SMU_SK) {
- strscpy(fw_name, "amdgpu/polaris10_smc_sk.bin");
+ fw_name = "polaris10_smc_sk.bin";
}
break;
case CHIP_POLARIS12:
if (ASICID_IS_P23(adev->pdev->device, adev->pdev->revision)) {
info->is_kicker = true;
- strscpy(fw_name, "amdgpu/polaris12_k_smc.bin");
+ fw_name = "polaris12_k_smc.bin";
} else {
- strscpy(fw_name, "amdgpu/polaris12_smc.bin");
+ fw_name = "polaris12_smc.bin";
}
break;
case CHIP_VEGAM:
- strscpy(fw_name, "amdgpu/vegam_smc.bin");
+ fw_name = "vegam_smc.bin";
break;
case CHIP_VEGA10:
if ((adev->pdev->device == 0x687f) &&
((adev->pdev->revision == 0xc0) ||
(adev->pdev->revision == 0xc1) ||
(adev->pdev->revision == 0xc3)))
- strscpy(fw_name, "amdgpu/vega10_acg_smc.bin");
+ fw_name = "vega10_acg_smc.bin";
else
- strscpy(fw_name, "amdgpu/vega10_smc.bin");
+ fw_name = "vega10_smc.bin";
break;
case CHIP_VEGA12:
- strscpy(fw_name, "amdgpu/vega12_smc.bin");
+ fw_name = "vega12_smc.bin";
break;
case CHIP_VEGA20:
- strscpy(fw_name, "amdgpu/vega20_smc.bin");
+ fw_name = "vega20_smc.bin";
break;
default:
drm_err(adev_to_drm(adev), "SMC firmware not supported\n");
@@ -355,10 +355,8 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
err = amdgpu_ucode_request(adev, &adev->pm.fw,
AMDGPU_UCODE_REQUIRED,
- "%s", fw_name);
+ "amdgpu/%s", fw_name);
if (err) {
- drm_err(adev_to_drm(adev),
- "Failed to load firmware \"%s\"\n", fw_name);
amdgpu_ucode_release(&adev->pm.fw);
return err;
}
--
2.47.3
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