Re: [PATCH 4/4] drm/amd/display: Don't use tiling flags anymore

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing 2D tiling format modifier for 8 bpp formats on GFX6-8 breaks NV12/NV21 video playback.
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--- Patch [4]: [PATCH 4/4] drm/amd/display: Don't use tiling flags anymore ---
commit 9ecc330329837cba2c5f2f431e911a3b7ec6c4df
Author: Timur Kristóf <timur.kristof@gmail.com>
Subject: drm/amd/display: Don't use tiling flags anymore

The commit removes the usage of legacy tiling flags from the amdgpu_dm
display code, transitioning all supported GPU generations to rely
completely on DRM format modifiers. It updates plane attribute filling,
surface updates, and cursor checks to reflect this change.

> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index a593a44ef97bc..87187c965d55c 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
[ ... ]
> @@ -1235,8 +1201,6 @@ int amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device *adev,
>  										address);
>  		if (ret)
>  			return ret;
> -	} else if (afb->base.modifier == DRM_FORMAT_MOD_INVALID) {
> -		amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags(tiling_info, tiling_flags);
>  	} else {
>  		ret = amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier(tiling_info,
>  									  afb->base.modifier);

[Severity: High]
By removing the legacy tiling flags fallback here, does this break NV12/NV21
video playback on GFX6-8?

Looking at amdgpu_dm_plane_add_gfx6_modifiers(), it appears to add 2D tiled
modifiers only for 16, 32, and 64 bpp:

	amdgpu_dm_plane_add_modifier(mods, size, capacity,
		amdgpu_dm_plane_calc_gfx6_mod(adev, 16, DC_ARRAY_2D_TILED_THIN1));
	amdgpu_dm_plane_add_modifier_dedup(mods, size, capacity,
		amdgpu_dm_plane_calc_gfx6_mod(adev, 32, DC_ARRAY_2D_TILED_THIN1));
	amdgpu_dm_plane_add_modifier_dedup(mods, size, capacity,
		amdgpu_dm_plane_calc_gfx6_mod(adev, 64, DC_ARRAY_2D_TILED_THIN1));

Since the modifier calculation for 8 bpp (which is required for NV12/NV21
formats) is missing, when userspace allocates a 2D-tiled NV12 framebuffer,
won't drm_plane_check_pixel_format() reject the atomic commit since it
cannot find the 8bpp modifier in the plane's advertised list?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260722165925.15805-1-timur.kristof@gmail.com?part=4