* [PATCH] accel/ivpu: Add support for Nova Lake's NPU
@ 2025-10-21 14:19 Maciej Falkowski
2025-10-21 14:52 ` Jeff Hugo
0 siblings, 1 reply; 3+ messages in thread
From: Maciej Falkowski @ 2025-10-21 14:19 UTC (permalink / raw)
To: dri-devel
Cc: oded.gabbay, jeff.hugo, karol.wachowski, lizhi.hou,
Maciej Falkowski
Add support for NPU6 generation that
will be present on Nova Lake CPUs.
As with previous generations, it maintains compatibility
so no bigger functional changes.
Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
---
drivers/accel/ivpu/ivpu_drv.c | 1 +
drivers/accel/ivpu/ivpu_drv.h | 4 ++++
drivers/accel/ivpu/ivpu_fw.c | 2 ++
drivers/accel/ivpu/ivpu_hw_ip.c | 7 +++++++
4 files changed, 14 insertions(+)
diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
index 7d1ab3cf661d..75ae49f8d19c 100644
--- a/drivers/accel/ivpu/ivpu_drv.c
+++ b/drivers/accel/ivpu/ivpu_drv.c
@@ -708,6 +708,7 @@ static struct pci_device_id ivpu_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_LNL) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PTL_P) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_WCL) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_NVL) },
{ }
};
MODULE_DEVICE_TABLE(pci, ivpu_pci_ids);
diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
index 0a04e037cc2e..4e9cf04fa5e4 100644
--- a/drivers/accel/ivpu/ivpu_drv.h
+++ b/drivers/accel/ivpu/ivpu_drv.h
@@ -27,6 +27,7 @@
#define PCI_DEVICE_ID_LNL 0x643e
#define PCI_DEVICE_ID_PTL_P 0xb03e
#define PCI_DEVICE_ID_WCL 0xfd3e
+#define PCI_DEVICE_ID_NVL 0xd71d
#define IVPU_HW_IP_37XX 37
#define IVPU_HW_IP_40XX 40
@@ -246,6 +247,8 @@ static inline int ivpu_hw_ip_gen(struct ivpu_device *vdev)
case PCI_DEVICE_ID_PTL_P:
case PCI_DEVICE_ID_WCL:
return IVPU_HW_IP_50XX;
+ case PCI_DEVICE_ID_NVL:
+ return IVPU_HW_IP_60XX;
default:
dump_stack();
ivpu_err(vdev, "Unknown NPU IP generation\n");
@@ -262,6 +265,7 @@ static inline int ivpu_hw_btrs_gen(struct ivpu_device *vdev)
case PCI_DEVICE_ID_LNL:
case PCI_DEVICE_ID_PTL_P:
case PCI_DEVICE_ID_WCL:
+ case PCI_DEVICE_ID_NVL:
return IVPU_HW_BTRS_LNL;
default:
dump_stack();
diff --git a/drivers/accel/ivpu/ivpu_fw.c b/drivers/accel/ivpu/ivpu_fw.c
index 1bf809f63c3f..10248fcc45ce 100644
--- a/drivers/accel/ivpu/ivpu_fw.c
+++ b/drivers/accel/ivpu/ivpu_fw.c
@@ -56,12 +56,14 @@ static struct {
{ IVPU_HW_IP_40XX, "intel/vpu/vpu_40xx_v0.0.bin" },
{ IVPU_HW_IP_50XX, "intel/vpu/vpu_50xx_v1.bin" },
{ IVPU_HW_IP_50XX, "intel/vpu/vpu_50xx_v0.0.bin" },
+ { IVPU_HW_IP_60XX, "intel/vpu/vpu_60xx_v1.bin" },
};
/* Production fw_names from the table above */
MODULE_FIRMWARE("intel/vpu/vpu_37xx_v1.bin");
MODULE_FIRMWARE("intel/vpu/vpu_40xx_v1.bin");
MODULE_FIRMWARE("intel/vpu/vpu_50xx_v1.bin");
+MODULE_FIRMWARE("intel/vpu/vpu_60xx_v1.bin");
static int ivpu_fw_request(struct ivpu_device *vdev)
{
diff --git a/drivers/accel/ivpu/ivpu_hw_ip.c b/drivers/accel/ivpu/ivpu_hw_ip.c
index 2bf9882ab52e..9d32273e94ed 100644
--- a/drivers/accel/ivpu/ivpu_hw_ip.c
+++ b/drivers/accel/ivpu/ivpu_hw_ip.c
@@ -691,6 +691,13 @@ static void pwr_island_delay_set(struct ivpu_device *vdev)
status = high ? 46 : 3;
break;
+ case PCI_DEVICE_ID_NVL:
+ post = high ? 198 : 17;
+ post1 = 0;
+ post2 = high ? 198 : 17;
+ status = 0;
+ break;
+
default:
dump_stack();
ivpu_err(vdev, "Unknown device ID\n");
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] accel/ivpu: Add support for Nova Lake's NPU
2025-10-21 14:19 [PATCH] accel/ivpu: Add support for Nova Lake's NPU Maciej Falkowski
@ 2025-10-21 14:52 ` Jeff Hugo
2025-10-22 10:58 ` Falkowski, Maciej
0 siblings, 1 reply; 3+ messages in thread
From: Jeff Hugo @ 2025-10-21 14:52 UTC (permalink / raw)
To: Maciej Falkowski, dri-devel; +Cc: oded.gabbay, karol.wachowski, lizhi.hou
On 10/21/2025 8:19 AM, Maciej Falkowski wrote:
> Add support for NPU6 generation that
> will be present on Nova Lake CPUs.
> As with previous generations, it maintains compatibility
> so no bigger functional changes.
Looks like this got word wrapped early. Commit messages can go out to 75
columns if I recall correctly.
>
> Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
With that,
Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] accel/ivpu: Add support for Nova Lake's NPU
2025-10-21 14:52 ` Jeff Hugo
@ 2025-10-22 10:58 ` Falkowski, Maciej
0 siblings, 0 replies; 3+ messages in thread
From: Falkowski, Maciej @ 2025-10-22 10:58 UTC (permalink / raw)
To: Jeff Hugo, dri-devel; +Cc: oded.gabbay, karol.wachowski, lizhi.hou
On 10/21/2025 4:52 PM, Jeff Hugo wrote:
> On 10/21/2025 8:19 AM, Maciej Falkowski wrote:
>> Add support for NPU6 generation that
>> will be present on Nova Lake CPUs.
>> As with previous generations, it maintains compatibility
>> so no bigger functional changes.
>
> Looks like this got word wrapped early. Commit messages can go out to
> 75 columns if I recall correctly.
Thanks, it will be corrected in v2.
Best regards,
Maciej
>
>>
>> Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
>
> With that,
> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-10-22 10:58 UTC | newest]
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2025-10-21 14:19 [PATCH] accel/ivpu: Add support for Nova Lake's NPU Maciej Falkowski
2025-10-21 14:52 ` Jeff Hugo
2025-10-22 10:58 ` Falkowski, Maciej
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