Re: [PATCH v3 2/2] drm/i915/color: Fix step discontinuity in Pre-CSC Gamma LUT

["Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>]

On 5/29/2026 4:37 AM, Sean Paul wrote:
> From: Sean Paul <seanpaul@google.com>
> 
> Clamp Segment 2 to the last user-provided LUT entry value instead of
> hardcoding it to 1.0 (1 << 24) to fix a step discontinuity.
> 

It defintely make sense to me that the point corresponding to 1.0 should 
be programmed to the max lut value that user-space provide. I am not 
quite sure what should be the case for 3.0 and 7.0, however, I presume 
it should be harmless for now. So as of now LGTM.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

> Signed-off-by: Sean Paul <seanpaul@google.com>
> Link: https://lore.kernel.org/intel-gfx/20260521180143.2143262-1-sean@poorly.run/ #v1
> Link: https://lore.kernel.org/intel-gfx/20260525135730.1122696-2-sean@poorly.run/ #v2
> 
> Changes in v2:
> - Split out into separate patches for pre/post csc fixes
> - Dropped loop bounds fix in favor of [1]
> Changes in v3:
> - Fix stale commit message
> 
> [1]- https://lore.kernel.org/r/20260519075245.383864-1-pranay.samala@intel.com
> ---
>   drivers/gpu/drm/i915/display/intel_color.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 7185f3628dcf..458508bcf1f4 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -3968,6 +3968,7 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
>   	enum plane_id plane = to_intel_plane(state->plane)->id;
>   	const struct drm_color_lut32 *pre_csc_lut = plane_state->hw.degamma_lut->data;
>   	u32 i, lut_size;
> +	u32 lut_val = 1 << 24;
>   
>   	if (icl_is_hdr_plane(display, plane)) {
>   		lut_size = 128;
> @@ -3978,7 +3979,7 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
>   
>   		if (pre_csc_lut) {
>   			for (i = 0; i < lut_size; i++) {
> -				u32 lut_val = drm_color_lut32_extract(pre_csc_lut[i].green, 24);
> +				lut_val = drm_color_lut32_extract(pre_csc_lut[i].green, 24);
>   
>   				intel_de_write_dsb(display, dsb,
>   						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
> @@ -3990,7 +3991,7 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
>   			do {
>   				intel_de_write_dsb(display, dsb,
>   						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
> -						   (1 << 24));
> +						   lut_val);
>   			} while (i++ < 130);
>   		} else {
>   			for (i = 0; i < lut_size; i++) {