[PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU

[PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU

[Samuel Pitoiset]

Hi,

This series implements a new GPU sensor interface which will allow to
query the current temperature and the shader/memory clocks via the
GALLIUM_HUD. This adds the same functionality as the Radeon driver.

The first patch of the series syncs amdgpu_drm.h with kernel headers.

Branch is here:
https://cgit.freedesktop.org/~hakzsam/drm/log/?h=si_clocks_temp

Please review.
Thanks!

Samuel Pitoiset (4):
  amdgpu: sync amdgpu_drm.h with the kernel
  amdgpu: add new GPU sensor related interface
  amdgpu: allow to query GPU sensor related information
  Bump version for 2.4.76 release

 amdgpu/amdgpu.h          |  19 +++++++
 amdgpu/amdgpu_gpu_info.c |  15 ++++++
 configure.ac             |   2 +-
 include/drm/amdgpu_drm.h | 135 +++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 170 insertions(+), 1 deletion(-)

-- 
2.11.1

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[PATCH libdrm 1/4] amdgpu: sync amdgpu_drm.h with the kernel

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 include/drm/amdgpu_drm.h | 123 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 123 insertions(+)

diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index d8f24976..2be8b8dc 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -50,6 +50,8 @@ extern "C" {
 #define DRM_AMDGPU_WAIT_CS		0x09
 #define DRM_AMDGPU_GEM_OP		0x10
 #define DRM_AMDGPU_GEM_USERPTR		0x11
+#define DRM_AMDGPU_WAIT_FENCES		0x12
+#define DRM_AMDGPU_FREESYNC	        0x14
 
 #define DRM_IOCTL_AMDGPU_GEM_CREATE	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
 #define DRM_IOCTL_AMDGPU_GEM_MMAP	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -63,6 +65,8 @@ extern "C" {
 #define DRM_IOCTL_AMDGPU_WAIT_CS	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_CS, union drm_amdgpu_wait_cs)
 #define DRM_IOCTL_AMDGPU_GEM_OP		DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_OP, struct drm_amdgpu_gem_op)
 #define DRM_IOCTL_AMDGPU_GEM_USERPTR	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_USERPTR, struct drm_amdgpu_gem_userptr)
+#define DRM_IOCTL_AMDGPU_WAIT_FENCES	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
+#define DRM_IOCTL_AMDGPU_FREESYNC	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
 
 #define AMDGPU_GEM_DOMAIN_CPU		0x1
 #define AMDGPU_GEM_DOMAIN_GTT		0x2
@@ -79,6 +83,10 @@ extern "C" {
 #define AMDGPU_GEM_CREATE_CPU_GTT_USWC		(1 << 2)
 /* Flag that the memory should be in VRAM and cleared */
 #define AMDGPU_GEM_CREATE_VRAM_CLEARED		(1 << 3)
+/* Flag that create shadow bo(GTT) while allocating vram bo */
+#define AMDGPU_GEM_CREATE_SHADOW		(1 << 4)
+/* Flag that allocating the BO should use linear VRAM */
+#define AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS	(1 << 5)
 
 struct drm_amdgpu_gem_create_in  {
 	/** the requested memory size */
@@ -303,6 +311,32 @@ union drm_amdgpu_wait_cs {
 	struct drm_amdgpu_wait_cs_out out;
 };
 
+struct drm_amdgpu_fence {
+	uint32_t ctx_id;
+	uint32_t ip_type;
+	uint32_t ip_instance;
+	uint32_t ring;
+	uint64_t seq_no;
+};
+
+struct drm_amdgpu_wait_fences_in {
+	/** This points to uint64_t * which points to fences */
+	uint64_t fences;
+	uint32_t fence_count;
+	uint32_t wait_all;
+	uint64_t timeout_ns;
+};
+
+struct drm_amdgpu_wait_fences_out {
+	uint32_t status;
+	uint32_t first_signaled;
+};
+
+union drm_amdgpu_wait_fences {
+	struct drm_amdgpu_wait_fences_in in;
+	struct drm_amdgpu_wait_fences_out out;
+};
+
 #define AMDGPU_GEM_OP_GET_GEM_CREATE_INFO	0
 #define AMDGPU_GEM_OP_SET_PLACEMENT		1
 
@@ -329,6 +363,8 @@ struct drm_amdgpu_gem_op {
 #define AMDGPU_VM_PAGE_WRITEABLE	(1 << 2)
 /* executable mapping, new for VI */
 #define AMDGPU_VM_PAGE_EXECUTABLE	(1 << 3)
+/* partially resident texture */
+#define AMDGPU_VM_PAGE_PRT		(1 << 4)
 
 struct drm_amdgpu_gem_va {
 	/** GEM object handle */
@@ -434,6 +470,7 @@ struct drm_amdgpu_cs_chunk_data {
  *
  */
 #define AMDGPU_IDS_FLAGS_FUSION         0x1
+#define AMDGPU_IDS_FLAGS_PREEMPTION     0x2
 
 /* indicate if acceleration can be working */
 #define AMDGPU_INFO_ACCEL_WORKING		0x00
@@ -483,6 +520,20 @@ struct drm_amdgpu_cs_chunk_data {
 #define AMDGPU_INFO_DEV_INFO			0x16
 /* visible vram usage */
 #define AMDGPU_INFO_VIS_VRAM_USAGE		0x17
+/* number of TTM buffer evictions */
+#define AMDGPU_INFO_NUM_EVICTIONS		0x18
+/* Query memory about VRAM and GTT domains */
+#define AMDGPU_INFO_MEMORY			0x19
+/* Query vce clock table */
+#define AMDGPU_INFO_VCE_CLOCK_TABLE		0x1A
+/* Query vbios related information */
+#define AMDGPU_INFO_VBIOS			0x1B
+	/* Subquery id: Query vbios size */
+	#define AMDGPU_INFO_VBIOS_SIZE		0x1
+	/* Subquery id: Query vbios image */
+	#define AMDGPU_INFO_VBIOS_IMAGE		0x2
+/* Query UVD handles */
+#define AMDGPU_INFO_NUM_HANDLES			0x1C
 
 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT	0
 #define AMDGPU_INFO_MMR_SE_INDEX_MASK	0xff
@@ -541,6 +592,11 @@ struct drm_amdgpu_info {
 		} read_mmr_reg;
 
 		struct drm_amdgpu_query_fw query_fw;
+
+		struct {
+			uint32_t type;
+			uint32_t offset;
+		} vbios_info;
 	};
 };
 
@@ -568,6 +624,34 @@ struct drm_amdgpu_info_vram_gtt {
 	uint64_t gtt_size;
 };
 
+struct drm_amdgpu_heap_info {
+	/** max. physical memory */
+	uint64_t total_heap_size;
+
+	/** Theoretical max. available memory in the given heap */
+	uint64_t usable_heap_size;
+
+	/**
+	 * Number of bytes allocated in the heap. This includes all processes
+	 * and private allocations in the kernel. It changes when new buffers
+	 * are allocated, freed, and moved. It cannot be larger than
+	 * heap_size.
+	 */
+	uint64_t heap_usage;
+
+	/**
+	 * Theoretical possible max. size of buffer which
+	 * could be allocated in the given heap
+	 */
+	uint64_t max_allocation;
+};
+
+struct drm_amdgpu_memory_info {
+	struct drm_amdgpu_heap_info vram;
+	struct drm_amdgpu_heap_info cpu_accessible_vram;
+	struct drm_amdgpu_heap_info gtt;
+};
+
 struct drm_amdgpu_info_firmware {
 	uint32_t ver;
 	uint32_t feature;
@@ -641,15 +725,54 @@ struct drm_amdgpu_info_hw_ip {
 	uint32_t  _pad;
 };
 
+struct drm_amdgpu_info_num_handles {
+	/** Max handles as supported by firmware for UVD */
+	uint32_t  uvd_max_handles;
+	/** Handles currently in use for UVD */
+	uint32_t  uvd_used_handles;
+};
+
+#define AMDGPU_VCE_CLOCK_TABLE_ENTRIES		6
+
+struct drm_amdgpu_info_vce_clock_table_entry {
+	/** System clock */
+	uint32_t sclk;
+	/** Memory clock */
+	uint32_t mclk;
+	/** VCE clock */
+	uint32_t eclk;
+	uint32_t pad;
+};
+
+struct drm_amdgpu_info_vce_clock_table {
+	struct drm_amdgpu_info_vce_clock_table_entry entries[AMDGPU_VCE_CLOCK_TABLE_ENTRIES];
+	uint32_t num_valid_entries;
+	uint32_t pad;
+};
+
 /*
  * Supported GPU families
  */
 #define AMDGPU_FAMILY_UNKNOWN			0
+#define AMDGPU_FAMILY_SI			110 /* Hainan, Oland, Verde, Pitcairn, Tahiti */
 #define AMDGPU_FAMILY_CI			120 /* Bonaire, Hawaii */
 #define AMDGPU_FAMILY_KV			125 /* Kaveri, Kabini, Mullins */
 #define AMDGPU_FAMILY_VI			130 /* Iceland, Tonga */
 #define AMDGPU_FAMILY_CZ			135 /* Carrizo, Stoney */
 
+/*
+ * Definition of free sync enter and exit signals
+ * We may have more options in the future
+ */
+#define AMDGPU_FREESYNC_FULLSCREEN_ENTER		1
+#define AMDGPU_FREESYNC_FULLSCREEN_EXIT 		2
+
+struct drm_amdgpu_freesync {
+	uint32_t op;			/* AMDGPU_FREESYNC_FULLSCREEN_ENTER or */
+				        /* AMDGPU_FREESYNC_FULLSCREEN_ENTER */
+	uint32_t spare[7];
+};
+
 #if defined(__cplusplus)
 }
 #endif
-- 
2.11.1

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[PATCH libdrm 2/4] amdgpu: add new GPU sensor related interface

[Samuel Pitoiset]

This will be used to expose the current GPU temperature, the
shader clock and eventually the memory clock (for non-APUs).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 include/drm/amdgpu_drm.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index 2be8b8dc..cd9c8223 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -534,6 +534,14 @@ struct drm_amdgpu_cs_chunk_data {
 	#define AMDGPU_INFO_VBIOS_IMAGE		0x2
 /* Query UVD handles */
 #define AMDGPU_INFO_NUM_HANDLES			0x1C
+/* Query GPU sensor related information */
+#define AMDGPU_INFO_GPU_SENSOR			0x1D
+	/* Query the current shader clock */
+	#define AMDGPU_INFO_GPU_SENSOR_SCLK	0x1
+	/* Query the current memory clock */
+	#define AMDGPU_INFO_GPU_SENSOR_MCLK	0x2
+	/* Query the current temperature */
+	#define AMDGPU_INFO_GPU_SENSOR_TEMP	0x3
 
 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT	0
 #define AMDGPU_INFO_MMR_SE_INDEX_MASK	0xff
@@ -597,6 +605,10 @@ struct drm_amdgpu_info {
 			uint32_t type;
 			uint32_t offset;
 		} vbios_info;
+
+		struct {
+			uint32_t type;
+		} gpu_sensor_info;
 	};
 };
 
-- 
2.11.1

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[PATCH libdrm 3/4] amdgpu: allow to query GPU sensor related information

[Samuel Pitoiset]

This exposes amdgpu_query_gpu_sensor_info().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 amdgpu/amdgpu.h          | 19 +++++++++++++++++++
 amdgpu/amdgpu_gpu_info.c | 15 +++++++++++++++
 2 files changed, 34 insertions(+)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 7b26a04c..b040f6ab 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1059,6 +1059,25 @@ int amdgpu_query_gds_info(amdgpu_device_handle dev,
 			struct amdgpu_gds_resource_info *gds_info);
 
 /**
+ * Query information about GPU sensor.
+ *
+ * The return size is query-specific and depends on the "sensor_type"
+ * parameter. No more than "size" bytes is returned.
+ *
+ * \param   dev         - \c [in] Device handle. See #amdgpu_device_initialize()
+ * \param   sensor_type - \c [in] AMDGPU_INFO_GPU_SENSOR_*
+ * \param   size        - \c [in] Size of the returned value.
+ * \param   value       - \c [out] Pointer to the return value.
+ *
+ * \return   0 on success\n
+ *          <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_query_gpu_sensor_info(amdgpu_device_handle dev,
+				 unsigned sensor_type,
+				 unsigned size, void *value);
+
+/**
  * Read a set of consecutive memory-mapped registers.
  * Not all registers are allowed to be read by userspace.
  *
diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
index 66c7e0e1..778c2ee1 100644
--- a/amdgpu/amdgpu_gpu_info.c
+++ b/amdgpu/amdgpu_gpu_info.c
@@ -314,3 +314,18 @@ int amdgpu_query_gds_info(amdgpu_device_handle dev,
 
 	return 0;
 }
+
+int amdgpu_query_gpu_sensor_info(amdgpu_device_handle dev, unsigned sensor_type,
+				 unsigned size, void *value)
+{
+	struct drm_amdgpu_info request;
+
+	memset(&request, 0, sizeof(request));
+	request.return_pointer = (uintptr_t)value;
+	request.return_size = size;
+	request.query = AMDGPU_INFO_GPU_SENSOR;
+	request.gpu_sensor_info.type = sensor_type;
+
+	return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
+			       sizeof(struct drm_amdgpu_info));
+}
-- 
2.11.1

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[PATCH libdrm 4/4] Bump version for 2.4.76 release

[Samuel Pitoiset]

For AMDGPU GPU sensor interface.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 configure.ac | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 8e593324..8b2db691 100644
--- a/configure.ac
+++ b/configure.ac
@@ -20,7 +20,7 @@
 
 AC_PREREQ([2.63])
 AC_INIT([libdrm],
-        [2.4.75],
+        [2.4.76],
         [https://bugs.freedesktop.org/enter_bug.cgi?product=DRI],
         [libdrm])
 
-- 
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Re: [PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU

[Emil Velikov]

On 14 February 2017 at 00:08, Samuel Pitoiset <samuel.pitoiset@gmail.com> wrote:
> Hi,
>
> This series implements a new GPU sensor interface which will allow to
> query the current temperature and the shader/memory clocks via the
> GALLIUM_HUD. This adds the same functionality as the Radeon driver.
>
> The first patch of the series syncs amdgpu_drm.h with kernel headers.
>
> Branch is here:
> https://cgit.freedesktop.org/~hakzsam/drm/log/?h=si_clocks_temp
>
> Please review.
> Thanks!
>
> Samuel Pitoiset (4):
>   amdgpu: sync amdgpu_drm.h with the kernel
Samuel,

Please read through drm/include/drm/README in particular "When and how
to update these files".
JFYI multiple people are trying to get various UABI in, so do keep an
eye open for fireworks.

>   amdgpu: add new GPU sensor related interface
>   amdgpu: allow to query GPU sensor related information
You'll need to add the new interface(s) to the symbols test. `make
check' must pass.

>   Bump version for 2.4.76 release
>
Skim through RELEASING for details on how to roll one.

Pardon, if I'm flocking up a dead horse here.

Thanks
Emil
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Re: [PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU

[Christian König]

Am 14.02.2017 um 02:44 schrieb Emil Velikov:
> On 14 February 2017 at 00:08, Samuel Pitoiset <samuel.pitoiset@gmail.com> wrote:
>> Hi,
>>
>> This series implements a new GPU sensor interface which will allow to
>> query the current temperature and the shader/memory clocks via the
>> GALLIUM_HUD. This adds the same functionality as the Radeon driver.
>>
>> The first patch of the series syncs amdgpu_drm.h with kernel headers.
>>
>> Branch is here:
>> https://cgit.freedesktop.org/~hakzsam/drm/log/?h=si_clocks_temp
>>
>> Please review.
>> Thanks!
>>
>> Samuel Pitoiset (4):
>>    amdgpu: sync amdgpu_drm.h with the kernel
> Samuel,
>
> Please read through drm/include/drm/README in particular "When and how
> to update these files".
> JFYI multiple people are trying to get various UABI in, so do keep an
> eye open for fireworks.
>
>>    amdgpu: add new GPU sensor related interface
>>    amdgpu: allow to query GPU sensor related information
> You'll need to add the new interface(s) to the symbols test. `make
> check' must pass.
>
>>    Bump version for 2.4.76 release
>>
> Skim through RELEASING for details on how to roll one.
>
> Pardon, if I'm flocking up a dead horse here.

Please keep an eye open on this Emil.

Additionally to what said before you didn't used upstream, but rather 
the branch including the DC code (with the freesync IOCTL).

We are probably not getting this upstream like that, so pushing it into 
libdrm is clearly not a good idea.

Regards,
Christian.

>
> Thanks
> Emil
> _______________________________________________
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> dri-devel@lists.freedesktop.org
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Re: [PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU

[Samuel Pitoiset]

On 02/14/2017 10:43 AM, Christian König wrote:
> Am 14.02.2017 um 02:44 schrieb Emil Velikov:
>> On 14 February 2017 at 00:08, Samuel Pitoiset
>> <samuel.pitoiset@gmail.com> wrote:
>>> Hi,
>>>
>>> This series implements a new GPU sensor interface which will allow to
>>> query the current temperature and the shader/memory clocks via the
>>> GALLIUM_HUD. This adds the same functionality as the Radeon driver.
>>>
>>> The first patch of the series syncs amdgpu_drm.h with kernel headers.
>>>
>>> Branch is here:
>>> https://cgit.freedesktop.org/~hakzsam/drm/log/?h=si_clocks_temp
>>>
>>> Please review.
>>> Thanks!
>>>
>>> Samuel Pitoiset (4):
>>>    amdgpu: sync amdgpu_drm.h with the kernel
>> Samuel,
>>
>> Please read through drm/include/drm/README in particular "When and how
>> to update these files".
>> JFYI multiple people are trying to get various UABI in, so do keep an
>> eye open for fireworks.
>>
>>>    amdgpu: add new GPU sensor related interface
>>>    amdgpu: allow to query GPU sensor related information
>> You'll need to add the new interface(s) to the symbols test. `make
>> check' must pass.
>>
>>>    Bump version for 2.4.76 release
>>>
>> Skim through RELEASING for details on how to roll one.
>>
>> Pardon, if I'm flocking up a dead horse here.
>
> Please keep an eye open on this Emil.
>
> Additionally to what said before you didn't used upstream, but rather
> the branch including the DC code (with the freesync IOCTL).
>
> We are probably not getting this upstream like that, so pushing it into
> libdrm is clearly not a good idea.

Thanks for your feedbacks. I will first wait for the kernel interface to 
be merged before making a new series.

>
> Regards,
> Christian.
>
>>
>> Thanks
>> Emil
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
>
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