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From: "Michel Dänzer" <michel@daenzer.net>
To: "Dieter Nützel" <Dieter@nuetzel-hh.de>
Cc: mesa-dev@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 0/5] radeon: Write-combined CPU mappings of BOs in GTT
Date: Fri, 18 Jul 2014 18:52:23 +0900	[thread overview]
Message-ID: <53C8EE57.10601@daenzer.net> (raw)
In-Reply-To: <1209b7deca65e20852da9e97183333ed@mail.ud03.udmedia.de>

On 18.07.2014 12:58, Dieter Nützel wrote:
> Am 18.07.2014 05:07, schrieb Michel Dänzer:
>> On 17.07.2014 19:09, Christian König wrote:
>>> Am 17.07.2014 12:01, schrieb Michel Dänzer:
>>>> [PATCH 5/5] drm/radeon: Use VRAM for indirect buffers on >= SI
>>>
>>> I'm still not very keen with this change since I still don't understand
>>> the reason why it's faster than with GTT. Definitely needs more testing
>>> on a wider range of systems.
>>
>> Sure. If anyone wants to give this patch a spin and see if they can
>> measure any performance difference, good or bad, that would be
>> interesting.
>>
>>> Maybe limit it to APUs for now?
>>
>> But IIRC, CPU writes to VRAM vs. write-combined GTT are actually an even
>> bigger win with dedicated GPUs than with the Kaveri built-in GPU on my
>> system. I suspect it may depend on the bandwidth available for PCIe vs.
>> system memory though.
> 
> Michel,
> 
> please, please do NOT change anything on this!;-)
> You all know that I currently can only run this on my poor Duron 1800
> with RV730 (AGP), but...
> 
> With this all 'objview' demos (mesa-demos) run at 60 fps (vsync),
> even with chip set/CPU power management enabled (athcool on).
> 
> If I set vblank_mode=0
> the slowest GreatLakesBiplaneHP.obj
> run at ~100 fps (~16 fps before) => 6x speedup.
> (Even 5 planes run at 30 fps) - Wow!!!

That's great, but note that the disputed change above only has an effect
with SI or newer GPUs, i.e. none with yours.

I suspect that speedup is because the app ends up using effectively
static vertex/index buffers, which are now in VRAM instead of in GTT due
to my Mesa changes.


> Overall X/Kwin eXperience is much better.
> Let me know which benchmarks you need.

I'm not looking for anything in particular, basically anything where you
care about performance. E.g. the usual suspects in PTS.


> BTW Do anyone know how I can override BIOS GTT settings?
> I can only set 256 MB max. - BIOS patching?

Your AGP bridge hardware might not support more.

> With agpmode=-1 I can run with 1024 MB GTT

What effect does that have on performance? I'm not sure if AGP provides
any benefit for GPUs with PCIe GART.


-- 
Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer
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  reply	other threads:[~2014-07-18  9:52 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-17 10:01 [PATCH 0/5] radeon: Write-combined CPU mappings of BOs in GTT Michel Dänzer
2014-07-17 10:01 ` [PATCH 1/5] drm/radeon: Remove radeon_gart_restore() Michel Dänzer
2014-07-17 10:01 ` [PATCH 2/5] drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitly Michel Dänzer
2014-07-17 10:01 ` [PATCH 3/5] drm/radeon: Allow write-combined CPU mappings of BOs in GTT Michel Dänzer
2014-07-17 10:01 ` [PATCH 4/5] drm/radeon: Use write-combined CPU mappings of rings and IBs on >= SI Michel Dänzer
2014-07-17 10:01 ` [PATCH 5/5] drm/radeon: Use VRAM for indirect buffers " Michel Dänzer
2014-07-17 10:01 ` [PATCH 1/5] winsys/radeon: Use separate caching buffer managers for VRAM and GTT Michel Dänzer
2014-07-17 10:01 ` [PATCH 2/5] r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT Michel Dänzer
2014-07-17 10:01 ` [PATCH 3/5] r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffers Michel Dänzer
2014-07-17 10:01 ` [PATCH 4/5] r600g, radeonsi: Use write-combined persistent GTT mappings Michel Dänzer
2014-07-17 10:56   ` Grigori Goronzy
2014-07-17 12:00   ` Marek Olšák
2014-07-18  3:19     ` [Mesa-dev] " Michel Dänzer
2014-07-18 11:45       ` Marek Olšák
2014-07-18 19:50         ` [Mesa-dev] " Grigori Goronzy
2014-07-18 20:52           ` Marek Olšák
2014-07-23  6:32         ` Michel Dänzer
2014-07-23 11:52           ` Marek Olšák
2014-07-18 20:55       ` Marek Olšák
2014-07-17 10:01 ` [PATCH 5/5] r600g, radeonsi: Prefer VRAM for persistent mappings Michel Dänzer
2014-07-17 12:17   ` Marek Olšák
2014-07-17 10:09 ` [PATCH 0/5] radeon: Write-combined CPU mappings of BOs in GTT Christian König
2014-07-18  3:07   ` Michel Dänzer
2014-07-18  3:58     ` Dieter Nützel
2014-07-18  9:52       ` Michel Dänzer [this message]
2014-07-18 15:47     ` Christian König
2014-07-18 17:47       ` Marek Olšák
2014-07-18 22:03         ` Marek Olšák
2014-07-19  1:15       ` Michel Dänzer
2014-07-21  8:07         ` Christian König
2014-07-23  3:54           ` Michel Dänzer
2014-07-23  6:42             ` Christian König
2014-07-23  7:21               ` Michel Dänzer
2014-07-23  7:32                 ` Christian König
2014-07-23 12:07                 ` Marek Olšák
2014-07-23 13:59             ` Alex Deucher
2014-07-17 12:25 ` Marek Olšák
2014-07-17 13:35 ` Alex Deucher

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