From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
To: Hai Li <hali@codeaurora.org>, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] rnndb/dsi: Add more bits for DSI PHY
Date: Mon, 24 Aug 2015 22:20:01 +0200 [thread overview]
Message-ID: <55DB7C71.2020108@gmail.com> (raw)
In-Reply-To: <1439502278-7617-1-git-send-email-hali@codeaurora.org>
Hi Hai,
I don't know what those bits are used for, but I'm a bit curious about
how did you find them?
Also, the next time don't forget to send patches related to envytools to
nouveau@lists.freedesktop.org
(or better send a pull request from github).
Thanks.
On 08/13/2015 11:44 PM, Hai Li wrote:
> More registers and bit fields are added for PHY timings
> and bitclk source selection.
>
> Signed-off-by: Hai Li <hali@codeaurora.org>
> ---
> rnndb/dsi/dsi.xml | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi/dsi.xml
> index 02cfa3b..956f3ff 100644
> --- a/rnndb/dsi/dsi.xml
> +++ b/rnndb/dsi/dsi.xml
> @@ -217,6 +217,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
> <reg32 offset="0x00128" name="PHY_RESET">
> <bitfield name="RESET" pos="0" type="boolean"/>
> </reg32>
> + <reg32 offset="0x0017c" name="T_CLK_PRE_EXTEND">
> + <bitfield name="INC_BY_2_BYTECLK" pos="0" type="boolean"/>
> + </reg32>
> <reg32 offset="0x001d0" name="RDBK_DATA_CTRL">
> <bitfield name="COUNT" low="16" high="23" type="uint"/>
> <bitfield name="CLR" pos="0" type="boolean"/>
> @@ -437,7 +440,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
> <reg32 offset="0x001c4" name="BIST_CTRL_4"/>
> <reg32 offset="0x001c8" name="BIST_CTRL_5"/>
>
> - <reg32 offset="0x001d4" name="GLBL_TEST_CTRL"/>
> + <reg32 offset="0x001d4" name="GLBL_TEST_CTRL">
> + <bitfield name="BITCLK_HS_SEL" pos="0" type="boolean"/>
> + </reg32>
> <reg32 offset="0x001dc" name="LDO_CNTRL"/>
> </domain>
>
> @@ -608,7 +613,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
> <reg32 offset="0x001c4" name="BIST_CTRL_4"/>
> <reg32 offset="0x001c8" name="BIST_CTRL_5"/>
>
> - <reg32 offset="0x001d4" name="GLBL_TEST_CTRL"/>
> + <reg32 offset="0x001d4" name="GLBL_TEST_CTRL">
> + <bitfield name="BITCLK_HS_SEL" pos="0" type="boolean"/>
> + </reg32>
> <reg32 offset="0x001dc" name="LDO_CNTRL"/>
> </domain>
>
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next prev parent reply other threads:[~2015-08-24 20:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-13 21:44 [PATCH] rnndb/dsi: Add more bits for DSI PHY Hai Li
2015-08-24 20:20 ` Samuel Pitoiset [this message]
2015-08-24 20:16 ` Rob Clark
2015-08-24 20:26 ` Samuel Pitoiset
2015-08-24 20:22 ` Ilia Mirkin
2015-08-24 20:46 ` Rob Clark
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