* [PATCH v2 0/4] Fix HFVSDB parsing
@ 2022-09-16 10:05 Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 1/4] drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink Ankit Nautiyal
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Ankit Nautiyal @ 2022-09-16 10:05 UTC (permalink / raw)
To: dri-devel; +Cc: swati2.sharma, intel-gfx, uma.shankar, maarten.lankhorst
Fix issues in HFVSDB parsing for DSC support.
Also minor refactoring in Logging.
Split from original patch into a new series.
https://patchwork.freedesktop.org/patch/495193/
v2: Minor styling fixes.
Ankit Nautiyal (4):
drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink
drm/edid: Split DSC parsing into separate function
drm/edid: Refactor HFVSDB parsing for DSC1.2
drm/edid: Avoid multiple log lines for HFVSDB parsing
drivers/gpu/drm/drm_edid.c | 153 +++++++++++++++++++++----------------
1 file changed, 87 insertions(+), 66 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/4] drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink
2022-09-16 10:05 [PATCH v2 0/4] Fix HFVSDB parsing Ankit Nautiyal
@ 2022-09-16 10:05 ` Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 2/4] drm/edid: Split DSC parsing into separate function Ankit Nautiyal
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Ankit Nautiyal @ 2022-09-16 10:05 UTC (permalink / raw)
To: dri-devel; +Cc: swati2.sharma, intel-gfx, uma.shankar, maarten.lankhorst
HF-VSDB/SCDB has bits to advertise support for 16, 12 and 10 bpc.
If none of the bits are set, the minimum bpc supported with DSC is 8.
This patch corrects the min bpc supported to be 8, instead of 0.
Fixes: 76ee7b905678 ("drm/edid: Parse DSC1.2 cap fields from HFVSDB block")
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
v2: s/DSC1.2/DSC 1.2
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/drm_edid.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4005dab6147d..ebe02cf7cd95 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5819,7 +5819,8 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
hdmi_dsc->bpc_supported = 10;
else
- hdmi_dsc->bpc_supported = 0;
+ /* Supports min 8 BPC if DSC 1.2 is supported*/
+ hdmi_dsc->bpc_supported = 8;
dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/4] drm/edid: Split DSC parsing into separate function
2022-09-16 10:05 [PATCH v2 0/4] Fix HFVSDB parsing Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 1/4] drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink Ankit Nautiyal
@ 2022-09-16 10:05 ` Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 3/4] drm/edid: Refactor HFVSDB parsing for DSC1.2 Ankit Nautiyal
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Ankit Nautiyal @ 2022-09-16 10:05 UTC (permalink / raw)
To: dri-devel; +Cc: swati2.sharma, intel-gfx, uma.shankar, maarten.lankhorst
Move the DSC parsing logic into separate function.
v2: Rebase.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/drm_edid.c | 128 ++++++++++++++++++++-----------------
1 file changed, 69 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ebe02cf7cd95..92c9c2e28902 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5752,6 +5752,73 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
hdmi->y420_dc_modes = dc_mask;
}
+static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
+ const u8 *hf_scds)
+{
+ u8 dsc_max_slices;
+ u8 dsc_max_frl_rate;
+
+ hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
+
+ if (!hdmi_dsc->v_1p2)
+ return;
+
+ hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420;
+ hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
+
+ if (hf_scds[11] & DRM_EDID_DSC_16BPC)
+ hdmi_dsc->bpc_supported = 16;
+ else if (hf_scds[11] & DRM_EDID_DSC_12BPC)
+ hdmi_dsc->bpc_supported = 12;
+ else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
+ hdmi_dsc->bpc_supported = 10;
+ else
+ /* Supports min 8 BPC if DSC 1.2 is supported*/
+ hdmi_dsc->bpc_supported = 8;
+
+ dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
+ drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
+ &hdmi_dsc->max_frl_rate_per_lane);
+ hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
+
+ dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
+
+ switch (dsc_max_slices) {
+ case 1:
+ hdmi_dsc->max_slices = 1;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 2:
+ hdmi_dsc->max_slices = 2;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 3:
+ hdmi_dsc->max_slices = 4;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 4:
+ hdmi_dsc->max_slices = 8;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 5:
+ hdmi_dsc->max_slices = 8;
+ hdmi_dsc->clk_per_slice = 400;
+ break;
+ case 6:
+ hdmi_dsc->max_slices = 12;
+ hdmi_dsc->clk_per_slice = 400;
+ break;
+ case 7:
+ hdmi_dsc->max_slices = 16;
+ hdmi_dsc->clk_per_slice = 400;
+ break;
+ case 0:
+ default:
+ hdmi_dsc->max_slices = 0;
+ hdmi_dsc->clk_per_slice = 0;
+ }
+}
+
/* Sink Capability Data Structure */
static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
const u8 *hf_scds)
@@ -5798,71 +5865,14 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
if (hf_scds[7]) {
u8 max_frl_rate;
- u8 dsc_max_frl_rate;
- u8 dsc_max_slices;
struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
&hdmi->max_frl_rate_per_lane);
- hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
-
- if (hdmi_dsc->v_1p2) {
- hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420;
- hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
-
- if (hf_scds[11] & DRM_EDID_DSC_16BPC)
- hdmi_dsc->bpc_supported = 16;
- else if (hf_scds[11] & DRM_EDID_DSC_12BPC)
- hdmi_dsc->bpc_supported = 12;
- else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
- hdmi_dsc->bpc_supported = 10;
- else
- /* Supports min 8 BPC if DSC 1.2 is supported*/
- hdmi_dsc->bpc_supported = 8;
-
- dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
- drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
- &hdmi_dsc->max_frl_rate_per_lane);
- hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
-
- dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
- switch (dsc_max_slices) {
- case 1:
- hdmi_dsc->max_slices = 1;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 2:
- hdmi_dsc->max_slices = 2;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 3:
- hdmi_dsc->max_slices = 4;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 4:
- hdmi_dsc->max_slices = 8;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 5:
- hdmi_dsc->max_slices = 8;
- hdmi_dsc->clk_per_slice = 400;
- break;
- case 6:
- hdmi_dsc->max_slices = 12;
- hdmi_dsc->clk_per_slice = 400;
- break;
- case 7:
- hdmi_dsc->max_slices = 16;
- hdmi_dsc->clk_per_slice = 400;
- break;
- case 0:
- default:
- hdmi_dsc->max_slices = 0;
- hdmi_dsc->clk_per_slice = 0;
- }
- }
+
+ drm_parse_dsc_info(hdmi_dsc, hf_scds);
}
drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 3/4] drm/edid: Refactor HFVSDB parsing for DSC1.2
2022-09-16 10:05 [PATCH v2 0/4] Fix HFVSDB parsing Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 1/4] drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 2/4] drm/edid: Split DSC parsing into separate function Ankit Nautiyal
@ 2022-09-16 10:05 ` Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 4/4] drm/edid: Avoid multiple log lines for HFVSDB parsing Ankit Nautiyal
2022-10-04 17:36 ` [PATCH v2 0/4] Fix " Jani Nikula
4 siblings, 0 replies; 6+ messages in thread
From: Ankit Nautiyal @ 2022-09-16 10:05 UTC (permalink / raw)
To: dri-devel; +Cc: swati2.sharma, intel-gfx, uma.shankar, maarten.lankhorst
DSC capabilities are given in bytes 11-13 of VSDB (i.e. bytes 8-10 of
SCDS). Since minimum length of Data block is 7, all bytes greater than 7
must be read only after checking the length of the data block.
This patch adds check for data block length before reading relavant DSC
bytes.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/drm_edid.c | 93 ++++++++++++++++++++------------------
1 file changed, 49 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 92c9c2e28902..27bdbdf6d345 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5755,9 +5755,6 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
const u8 *hf_scds)
{
- u8 dsc_max_slices;
- u8 dsc_max_frl_rate;
-
hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
if (!hdmi_dsc->v_1p2)
@@ -5776,47 +5773,54 @@ static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
/* Supports min 8 BPC if DSC 1.2 is supported*/
hdmi_dsc->bpc_supported = 8;
- dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
- drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
- &hdmi_dsc->max_frl_rate_per_lane);
- hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
+ if (cea_db_payload_len(hf_scds) >= 12 && hf_scds[12]) {
+ u8 dsc_max_slices;
+ u8 dsc_max_frl_rate;
- dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
+ dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
+ drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
+ &hdmi_dsc->max_frl_rate_per_lane);
- switch (dsc_max_slices) {
- case 1:
- hdmi_dsc->max_slices = 1;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 2:
- hdmi_dsc->max_slices = 2;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 3:
- hdmi_dsc->max_slices = 4;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 4:
- hdmi_dsc->max_slices = 8;
- hdmi_dsc->clk_per_slice = 340;
- break;
- case 5:
- hdmi_dsc->max_slices = 8;
- hdmi_dsc->clk_per_slice = 400;
- break;
- case 6:
- hdmi_dsc->max_slices = 12;
- hdmi_dsc->clk_per_slice = 400;
- break;
- case 7:
- hdmi_dsc->max_slices = 16;
- hdmi_dsc->clk_per_slice = 400;
- break;
- case 0:
- default:
- hdmi_dsc->max_slices = 0;
- hdmi_dsc->clk_per_slice = 0;
+ dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
+
+ switch (dsc_max_slices) {
+ case 1:
+ hdmi_dsc->max_slices = 1;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 2:
+ hdmi_dsc->max_slices = 2;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 3:
+ hdmi_dsc->max_slices = 4;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 4:
+ hdmi_dsc->max_slices = 8;
+ hdmi_dsc->clk_per_slice = 340;
+ break;
+ case 5:
+ hdmi_dsc->max_slices = 8;
+ hdmi_dsc->clk_per_slice = 400;
+ break;
+ case 6:
+ hdmi_dsc->max_slices = 12;
+ hdmi_dsc->clk_per_slice = 400;
+ break;
+ case 7:
+ hdmi_dsc->max_slices = 16;
+ hdmi_dsc->clk_per_slice = 400;
+ break;
+ case 0:
+ default:
+ hdmi_dsc->max_slices = 0;
+ hdmi_dsc->clk_per_slice = 0;
+ }
}
+
+ if (cea_db_payload_len(hf_scds) >= 13 && hf_scds[13])
+ hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
}
/* Sink Capability Data Structure */
@@ -5825,6 +5829,7 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
{
struct drm_display_info *display = &connector->display_info;
struct drm_hdmi_info *hdmi = &display->hdmi;
+ struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
display->has_hdmi_infoframe = true;
@@ -5865,17 +5870,17 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
if (hf_scds[7]) {
u8 max_frl_rate;
- struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
&hdmi->max_frl_rate_per_lane);
-
- drm_parse_dsc_info(hdmi_dsc, hf_scds);
}
drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
+
+ if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11])
+ drm_parse_dsc_info(hdmi_dsc, hf_scds);
}
static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 4/4] drm/edid: Avoid multiple log lines for HFVSDB parsing
2022-09-16 10:05 [PATCH v2 0/4] Fix HFVSDB parsing Ankit Nautiyal
` (2 preceding siblings ...)
2022-09-16 10:05 ` [PATCH v2 3/4] drm/edid: Refactor HFVSDB parsing for DSC1.2 Ankit Nautiyal
@ 2022-09-16 10:05 ` Ankit Nautiyal
2022-10-04 17:36 ` [PATCH v2 0/4] Fix " Jani Nikula
4 siblings, 0 replies; 6+ messages in thread
From: Ankit Nautiyal @ 2022-09-16 10:05 UTC (permalink / raw)
To: dri-devel; +Cc: swati2.sharma, intel-gfx, uma.shankar, maarten.lankhorst
Replace multiple log lines with a single log line at the end of
parsing HF-VSDB. Also use drm_dbg_kms instead of DRM_DBG_KMS, and
add log for DSC1.2 support.
v2: Fixed the formatting issues in the logging (Jani).
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/drm_edid.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 27bdbdf6d345..1c61e3af79c6 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5830,6 +5830,9 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
struct drm_display_info *display = &connector->display_info;
struct drm_hdmi_info *hdmi = &display->hdmi;
struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
+ int max_tmds_clock = 0;
+ u8 max_frl_rate = 0;
+ bool dsc_support = false;
display->has_hdmi_infoframe = true;
@@ -5849,14 +5852,13 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
*/
if (hf_scds[5]) {
- /* max clock is 5000 KHz times block value */
- u32 max_tmds_clock = hf_scds[5] * 5000;
struct drm_scdc *scdc = &hdmi->scdc;
+ /* max clock is 5000 KHz times block value */
+ max_tmds_clock = hf_scds[5] * 5000;
+
if (max_tmds_clock > 340000) {
display->max_tmds_clock = max_tmds_clock;
- DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n",
- display->max_tmds_clock);
}
if (scdc->supported) {
@@ -5869,9 +5871,6 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
}
if (hf_scds[7]) {
- u8 max_frl_rate;
-
- DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
&hdmi->max_frl_rate_per_lane);
@@ -5879,8 +5878,14 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
- if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11])
+ if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) {
drm_parse_dsc_info(hdmi_dsc, hf_scds);
+ dsc_support = true;
+ }
+
+ drm_dbg_kms(connector->dev,
+ "HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support: %s, DSC 1.2 support: %s\n",
+ max_tmds_clock, str_yes_no(max_frl_rate), str_yes_no(dsc_support));
}
static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/4] Fix HFVSDB parsing
2022-09-16 10:05 [PATCH v2 0/4] Fix HFVSDB parsing Ankit Nautiyal
` (3 preceding siblings ...)
2022-09-16 10:05 ` [PATCH v2 4/4] drm/edid: Avoid multiple log lines for HFVSDB parsing Ankit Nautiyal
@ 2022-10-04 17:36 ` Jani Nikula
4 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2022-10-04 17:36 UTC (permalink / raw)
To: Ankit Nautiyal, dri-devel
Cc: intel-gfx, uma.shankar, swati2.sharma, maarten.lankhorst
On Fri, 16 Sep 2022, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Fix issues in HFVSDB parsing for DSC support.
> Also minor refactoring in Logging.
>
> Split from original patch into a new series.
> https://patchwork.freedesktop.org/patch/495193/
>
> v2: Minor styling fixes.
Thanks for the patches, pushed to drm-misc-next.
BR,
Jani.
>
> Ankit Nautiyal (4):
> drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink
> drm/edid: Split DSC parsing into separate function
> drm/edid: Refactor HFVSDB parsing for DSC1.2
> drm/edid: Avoid multiple log lines for HFVSDB parsing
>
> drivers/gpu/drm/drm_edid.c | 153 +++++++++++++++++++++----------------
> 1 file changed, 87 insertions(+), 66 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
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2022-09-16 10:05 [PATCH v2 0/4] Fix HFVSDB parsing Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 1/4] drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 2/4] drm/edid: Split DSC parsing into separate function Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 3/4] drm/edid: Refactor HFVSDB parsing for DSC1.2 Ankit Nautiyal
2022-09-16 10:05 ` [PATCH v2 4/4] drm/edid: Avoid multiple log lines for HFVSDB parsing Ankit Nautiyal
2022-10-04 17:36 ` [PATCH v2 0/4] Fix " Jani Nikula
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