* [PATCH 0/2] Enable Wa_14018913170 on DG2/MTL/PVD
@ 2023-09-14 22:28 John.C.Harrison
2023-09-14 22:28 ` [PATCH 1/2] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL John.C.Harrison
2023-09-14 22:28 ` [PATCH 2/2] drm/i915/guc: Enable WA 14018913170 John.C.Harrison
0 siblings, 2 replies; 4+ messages in thread
From: John.C.Harrison @ 2023-09-14 22:28 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Enable a WA on the latest platforms. Also update the recommended GuC
version for those platforms to the latest available. Further patches
will follow to make use of other features in the latest GuC firmware,
but the w/a at least requires something newer than what was previously
in use.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Daniele Ceraolo Spurio (1):
drm/i915/guc: Enable WA 14018913170
John Harrison (1):
drm/i915/guc: Update 'recommended' version to 70.11.0 for
DG2/ADL-P/MTL
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 6 ++++++
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +++---
4 files changed, 11 insertions(+), 3 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL
2023-09-14 22:28 [PATCH 0/2] Enable Wa_14018913170 on DG2/MTL/PVD John.C.Harrison
@ 2023-09-14 22:28 ` John.C.Harrison
2023-09-14 22:28 ` [PATCH 2/2] drm/i915/guc: Enable WA 14018913170 John.C.Harrison
1 sibling, 0 replies; 4+ messages in thread
From: John.C.Harrison @ 2023-09-14 22:28 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
The latest GuC has new features and new workarounds that we wish to
enable. So let the universe know that it is useful to update their
firmware.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 32e27e9a2490f..a40f96c98308b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -88,9 +88,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* security fixes, etc. to be enabled.
*/
#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \
- fw_def(METEORLAKE, 0, guc_maj(mtl, 70, 6, 6)) \
- fw_def(DG2, 0, guc_maj(dg2, 70, 5, 1)) \
- fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5, 1)) \
+ fw_def(METEORLAKE, 0, guc_maj(mtl, 70, 11, 0)) \
+ fw_def(DG2, 0, guc_maj(dg2, 70, 11, 0)) \
+ fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 11, 0)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \
fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5, 1)) \
--
2.41.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/i915/guc: Enable WA 14018913170
2023-09-14 22:28 [PATCH 0/2] Enable Wa_14018913170 on DG2/MTL/PVD John.C.Harrison
2023-09-14 22:28 ` [PATCH 1/2] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL John.C.Harrison
@ 2023-09-14 22:28 ` John.C.Harrison
2023-10-06 0:37 ` [Intel-gfx] " Belgaumkar, Vinay
1 sibling, 1 reply; 4+ messages in thread
From: John.C.Harrison @ 2023-09-14 22:28 UTC (permalink / raw)
To: Intel-GFX; +Cc: Daniele Ceraolo Spurio, John Harrison, DRI-Devel
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 6 ++++++
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
3 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 27df41c53b890..3f3df1166b860 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -319,6 +319,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
if (!RCS_MASK(gt))
flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;
+ /* Wa_14018913170 */
+ if (GUC_FIRMWARE_VER(guc) >= MAKE_GUC_VER(70, 7, 0)) {
+ if (IS_DG2(gt->i915) || IS_METEORLAKE(gt->i915) || IS_PONTEVECCHIO(gt->i915))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6c392bad29c19..818c8c146fd47 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -295,6 +295,7 @@ struct intel_guc {
#define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
#define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch)
#define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
+#define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
{
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index b4d56eccfb1f0..123ad75d2eb28 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -100,6 +100,7 @@
#define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
--
2.41.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Enable WA 14018913170
2023-09-14 22:28 ` [PATCH 2/2] drm/i915/guc: Enable WA 14018913170 John.C.Harrison
@ 2023-10-06 0:37 ` Belgaumkar, Vinay
0 siblings, 0 replies; 4+ messages in thread
From: Belgaumkar, Vinay @ 2023-10-06 0:37 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 9/14/2023 3:28 PM, John.C.Harrison@Intel.com wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 6 ++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
> 3 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 27df41c53b890..3f3df1166b860 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -319,6 +319,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
> if (!RCS_MASK(gt))
> flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;
>
> + /* Wa_14018913170 */
> + if (GUC_FIRMWARE_VER(guc) >= MAKE_GUC_VER(70, 7, 0)) {
> + if (IS_DG2(gt->i915) || IS_METEORLAKE(gt->i915) || IS_PONTEVECCHIO(gt->i915))
> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> + }
> +
> return flags;
LGTM,
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index 6c392bad29c19..818c8c146fd47 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -295,6 +295,7 @@ struct intel_guc {
> #define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> #define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch)
> #define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
> +#define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
>
> static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
> {
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index b4d56eccfb1f0..123ad75d2eb28 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -100,6 +100,7 @@
> #define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-09-14 22:28 [PATCH 0/2] Enable Wa_14018913170 on DG2/MTL/PVD John.C.Harrison
2023-09-14 22:28 ` [PATCH 1/2] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL John.C.Harrison
2023-09-14 22:28 ` [PATCH 2/2] drm/i915/guc: Enable WA 14018913170 John.C.Harrison
2023-10-06 0:37 ` [Intel-gfx] " Belgaumkar, Vinay
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