Re: [PATCH v6 4/5] drm/xe/xe_hw_error: Add support for Core-Compute errors

[Raag Jadav <raag.jadav@intel.com>]

On Mon, Feb 16, 2026 at 12:17:30PM +0530, Riana Tauro wrote:
> PVC supports GT error reporting via vector registers along with
> error status register. Add support to report these errors and
> update respective counters. Incase of Subslice error reported
> by vector register, process the error status register
> for applicable bits.

...

> +static void gt_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err,
> +				u32 error_id)
> +{
> +	const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);
> +	struct xe_device *xe = tile_to_xe(tile);
> +	struct xe_drm_ras *ras = &xe->ras;
> +	struct xe_drm_ras_counter *info = ras->info[severity];
> +	struct xe_mmio *mmio = &tile->mmio;
> +	unsigned long err_stat = 0;
> +	int i, len;
> +
> +	if (xe->info.platform != XE_PVC)
> +		return;
> +
> +	if (hw_err == HARDWARE_ERROR_NONFATAL) {
> +		atomic_inc(&info[error_id].counter);
> +		log_hw_error(tile, info[error_id].name, severity);
> +		return;
> +	}
> +
> +	/* Registers till ERR_STAT_GT_VECTOR4 are applicable for correctable errors */
> +	len = (hw_err == HARDWARE_ERROR_CORRECTABLE) ? ERR_STAT_GT_VECTOR4
> +						     : ERR_STAT_GT_VECTOR_MAX;
> +

Nit: Similar to PVC_ERROR_MASK_SET(), we can make this a bit less busy
with something like PVC_GT_VECTOR_LEN(). With that perhaps you won't
even need len variable.

Reviewed-by: Raag Jadav <raag.jadav@intel.com>