[PATCH 0/3] DRM Google Nexus 10 display support

[PATCH 0/3] DRM Google Nexus 10 display support

[Alexandre Marquet via B4 Relay]

This series proposes to add an entry in panel_edp for the panel used in
the Google Nexus 10, as well as two modifications in analogix_dp and exynos_dp,
which allow to effectively enable the use of aux-bus on the platform.

It is actually a follow up of [1], with only the drm patches kept, as suggested
in [2].

I preferred not to label this series as v2, and opted to change the title
instead. Indeed, this series contains only drm patches, which are actually all
new with respect to [1], following the guidance received to use aux-bus if
possible (in [3]), which it is, building upon recent work on analogix_dp, and
after applying the patches of this series.

[1] https://lore.kernel.org/all/20260423-manta-display-v1-0-196f80c5673a@timmermann.space/
[2] https://lore.kernel.org/all/20260425-uncovered-otter-of-sunshine-d00ed0@quoll/
[3] https://lore.kernel.org/all/CAD=FV=VNvPtG_f1W942SKJfM4ptK8Wvd-nZs4geBCG3bO_A0BA@mail.gmail.com/

Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
---
Alexandre Marquet (3):
      drm/bridge: analogix_dp: deassert DP_PHY_PD on power-on for exynos
      drm/exynos: exynos_dp: change poweron/off to encoder enable/disable
      drm/panel_edp: Add SEC LTL101DL02-002 panel

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 19 +++++++----
 drivers/gpu/drm/exynos/exynos_dp.c                | 40 ++++++++---------------
 drivers/gpu/drm/panel/panel-edp.c                 |  2 ++
 3 files changed, 28 insertions(+), 33 deletions(-)
---
base-commit: cf61bef3801c3c9d0d8c39026b7b2fb242898a3a
change-id: 20261023-drm-misc-next-manta-auxbus-7b5b0fd9a038

Best regards,
--  
Alexandre Marquet <tb@a-marquet.fr>

[PATCH 1/3] drm/bridge: analogix_dp: deassert DP_PHY_PD on power-on for exynos

[Alexandre Marquet via B4 Relay]

From: Alexandre Marquet <tb@a-marquet.fr>

On exynos platforms at least, calling
analogix_dp_set_analog_power_down() to power on (with enable=false) CH0
to CH3 or the AUX bus currently produces no effect, unless the function
is first called to power on everything (by setting block to POWER_ALL or
ANALOG_TOTAL). The reason for this is that DP_PHY_PD being asserted
(which is its default state) renders every other register bit
ineffective.

This is particularly an issue for AUX bus initialization, that tends to
happen before anything else (e.g., to request EDID), and thus, before
anything has any chance to request a power on of the whole analog
section of the chip.

This commit allows analogix_dp_set_analog_power_down() to power on any
block, by deasserting DP_PHY_PD if needed.

Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index c1344a3f013a..9f634d4e4793 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -256,6 +256,19 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	if (dp->plat_data && analogix_dp_is_rockchip(dp->plat_data->dev_type))
 		phy_pd_addr = ANALOGIX_DP_PD;
 
+	reg = readl(dp->reg_base + phy_pd_addr);
+
+	if (dp->plat_data && (dp->plat_data->dev_type == EXYNOS_DP)) {
+		/* On exynos, register AUX_PD and CH[0-3]_PD have no effect if
+		 * DP_PHY_PD is asserted. So, when powering any of them up, we
+		 * need to deassert DP_PHY_PD first.
+		 */
+		if (!enable && (reg & DP_PHY_PD)) {
+			reg &= ~DP_PHY_PD;
+			reg |= AUX_PD | CH0_PD | CH1_PD | CH2_PD | CH3_PD;
+		}
+	}
+
 	switch (block) {
 	case AUX_BLOCK:
 		if (dp->plat_data && analogix_dp_is_rockchip(dp->plat_data->dev_type))
@@ -263,7 +276,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		else
 			mask = AUX_PD;
 
-		reg = readl(dp->reg_base + phy_pd_addr);
 		if (enable)
 			reg |= mask;
 		else
@@ -272,7 +284,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		break;
 	case CH0_BLOCK:
 		mask = CH0_PD;
-		reg = readl(dp->reg_base + phy_pd_addr);
 
 		if (enable)
 			reg |= mask;
@@ -282,7 +293,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		break;
 	case CH1_BLOCK:
 		mask = CH1_PD;
-		reg = readl(dp->reg_base + phy_pd_addr);
 
 		if (enable)
 			reg |= mask;
@@ -292,7 +302,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		break;
 	case CH2_BLOCK:
 		mask = CH2_PD;
-		reg = readl(dp->reg_base + phy_pd_addr);
 
 		if (enable)
 			reg |= mask;
@@ -302,7 +311,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		break;
 	case CH3_BLOCK:
 		mask = CH3_PD;
-		reg = readl(dp->reg_base + phy_pd_addr);
 
 		if (enable)
 			reg |= mask;
@@ -321,7 +329,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		else
 			mask = DP_PHY_PD;
 
-		reg = readl(dp->reg_base + phy_pd_addr);
 		if (enable)
 			reg |= mask;
 		else

-- 
2.43.0

Re: [PATCH 1/3] drm/bridge: analogix_dp: deassert DP_PHY_PD on power-on for exynos

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/bridge: analogix_dp_set_analog_power_down() breaks ANALOG_TOTAL
--

commit 91a05dce5d444dd4add713f60a3388d24c0834b4
Author: Alexandre Marquet <tb@a-marquet.fr>

drm/bridge: analogix_dp: deassert DP_PHY_PD on power-on for exynos

This commit modifies analogix_dp_set_analog_power_down() on Exynos platforms
to deassert DP_PHY_PD and assert individual block power-down bits before
powering on requested analog blocks.

> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index c1344a3f013ab..9f634d4e47933 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -256,6 +256,19 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  	if (dp->plat_data && analogix_dp_is_rockchip(dp->plat_data->dev_type))
>  		phy_pd_addr = ANALOGIX_DP_PD;
>  
> +	reg = readl(dp->reg_base + phy_pd_addr);
> +
> +	if (dp->plat_data && (dp->plat_data->dev_type == EXYNOS_DP)) {
> +		/* On exynos, register AUX_PD and CH[0-3]_PD have no effect if
> +		 * DP_PHY_PD is asserted. So, when powering any of them up, we
> +		 * need to deassert DP_PHY_PD first.
> +		 */
> +		if (!enable && (reg & DP_PHY_PD)) {
> +			reg &= ~DP_PHY_PD;
> +			reg |= AUX_PD | CH0_PD | CH1_PD | CH2_PD | CH3_PD;
> +		}
> +	}

[Severity: Medium]
What happens when analogix_dp_set_analog_power_down() is called on EXYNOS_DP
with block set to ANALOG_TOTAL and enable set to false while DP_PHY_PD is
asserted in ANALOGIX_DP_PHY_PD?

Because this check runs before switch (block) for all block values, it clears
DP_PHY_PD and sets AUX_PD | CH0_PD | CH1_PD | CH2_PD | CH3_PD in reg. When
execution then reaches the ANALOG_TOTAL case:

drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c:analogix_dp_set_analog_power_down() {
	...
	case ANALOG_TOTAL:
		if (dp->plat_data && analogix_dp_is_rockchip(dp->plat_data->dev_type))
			mask = DP_INC_BG;
		else
			mask = DP_PHY_PD;

		if (enable)
			reg |= mask;
		else
			reg &= ~mask;

		writel(reg, dp->reg_base + phy_pd_addr);
	...
}

reg &= ~DP_PHY_PD leaves AUX_PD and CH0_PD through CH3_PD set, so writel()
powers down AUX and all four channels instead of powering on everything as
described in the commit message.

Should the ANALOG_TOTAL case also clear AUX_PD | CH0_PD | CH1_PD | CH2_PD |
CH3_PD when enable is false, or should the pre-switch check exclude
ANALOG_TOTAL and POWER_ALL?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261027-drm-misc-next-manta-auxbus-v1-0-3a45c3cf531d@a-marquet.fr?part=1

Re: [PATCH 1/3] drm/bridge: analogix_dp: deassert DP_PHY_PD on power-on for exynos

[Marek Szyprowski]

On 27.10.2026 13:01, Alexandre Marquet via B4 Relay wrote:
> From: Alexandre Marquet <tb@a-marquet.fr>
>
> On exynos platforms at least, calling
> analogix_dp_set_analog_power_down() to power on (with enable=false) CH0
> to CH3 or the AUX bus currently produces no effect, unless the function
> is first called to power on everything (by setting block to POWER_ALL or
> ANALOG_TOTAL). The reason for this is that DP_PHY_PD being asserted
> (which is its default state) renders every other register bit
> ineffective.
>
> This is particularly an issue for AUX bus initialization, that tends to
> happen before anything else (e.g., to request EDID), and thus, before
> anything has any chance to request a power on of the whole analog
> section of the chip.
>
> This commit allows analogix_dp_set_analog_power_down() to power on any
> block, by deasserting DP_PHY_PD if needed.
>
> Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>

Snow, Peach-Pit and Peach-Pi Chromebooks work fine with this change.

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 19 +++++++++++++------
>  1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index c1344a3f013a..9f634d4e4793 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -256,6 +256,19 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  	if (dp->plat_data && analogix_dp_is_rockchip(dp->plat_data->dev_type))
>  		phy_pd_addr = ANALOGIX_DP_PD;
>  
> +	reg = readl(dp->reg_base + phy_pd_addr);
> +
> +	if (dp->plat_data && (dp->plat_data->dev_type == EXYNOS_DP)) {
> +		/* On exynos, register AUX_PD and CH[0-3]_PD have no effect if
> +		 * DP_PHY_PD is asserted. So, when powering any of them up, we
> +		 * need to deassert DP_PHY_PD first.
> +		 */
> +		if (!enable && (reg & DP_PHY_PD)) {
> +			reg &= ~DP_PHY_PD;
> +			reg |= AUX_PD | CH0_PD | CH1_PD | CH2_PD | CH3_PD;
> +		}
> +	}
> +
>  	switch (block) {
>  	case AUX_BLOCK:
>  		if (dp->plat_data && analogix_dp_is_rockchip(dp->plat_data->dev_type))
> @@ -263,7 +276,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		else
>  			mask = AUX_PD;
>  
> -		reg = readl(dp->reg_base + phy_pd_addr);
>  		if (enable)
>  			reg |= mask;
>  		else
> @@ -272,7 +284,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		break;
>  	case CH0_BLOCK:
>  		mask = CH0_PD;
> -		reg = readl(dp->reg_base + phy_pd_addr);
>  
>  		if (enable)
>  			reg |= mask;
> @@ -282,7 +293,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		break;
>  	case CH1_BLOCK:
>  		mask = CH1_PD;
> -		reg = readl(dp->reg_base + phy_pd_addr);
>  
>  		if (enable)
>  			reg |= mask;
> @@ -292,7 +302,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		break;
>  	case CH2_BLOCK:
>  		mask = CH2_PD;
> -		reg = readl(dp->reg_base + phy_pd_addr);
>  
>  		if (enable)
>  			reg |= mask;
> @@ -302,7 +311,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		break;
>  	case CH3_BLOCK:
>  		mask = CH3_PD;
> -		reg = readl(dp->reg_base + phy_pd_addr);
>  
>  		if (enable)
>  			reg |= mask;
> @@ -321,7 +329,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		else
>  			mask = DP_PHY_PD;
>  
> -		reg = readl(dp->reg_base + phy_pd_addr);
>  		if (enable)
>  			reg |= mask;
>  		else
>
Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

[PATCH 2/3] drm/exynos: exynos_dp: change poweron/off to encoder enable/disable

[Alexandre Marquet via B4 Relay]

From: Alexandre Marquet <tb@a-marquet.fr>

Current functions exynos_dp_poweron()/exynos_dp_poweroff(), that
supposedly powers on/off the device, actually only enable the encoder
clock. This cause issues where poweron() calls fail silently in
analogix_dp_probe(), leading in some cases to a state were the encoder
is never enabled but the rest of the driver assumes that it is.

Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
---
 drivers/gpu/drm/exynos/exynos_dp.c | 40 +++++++++++++-------------------------
 1 file changed, 13 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 82c238829921..16b00aacd55b 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -43,39 +43,27 @@ struct exynos_dp_device {
 	struct analogix_dp_plat_data plat_data;
 };
 
-static int exynos_dp_crtc_clock_enable(struct analogix_dp_plat_data *plat_data,
-				bool enable)
-{
-	struct exynos_dp_device *dp = to_dp(plat_data);
-	struct drm_encoder *encoder = &dp->encoder;
-
-	if (!encoder->crtc)
-		return -EPERM;
-
-	exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable);
-
-	return 0;
-}
-
-static int exynos_dp_poweron(struct analogix_dp_plat_data *plat_data)
+static void exynos_dp_mode_set(struct drm_encoder *encoder,
+			       struct drm_display_mode *mode,
+			       struct drm_display_mode *adjusted_mode)
 {
-	return exynos_dp_crtc_clock_enable(plat_data, true);
 }
 
-static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
+static void exynos_dp_crtc_clock_enable(struct drm_encoder *encoder,
+					bool enable)
 {
-	return exynos_dp_crtc_clock_enable(plat_data, false);
+	if (encoder->crtc)
+		exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable);
 }
 
-static void exynos_dp_mode_set(struct drm_encoder *encoder,
-			       struct drm_display_mode *mode,
-			       struct drm_display_mode *adjusted_mode)
+static void exynos_dp_enable(struct drm_encoder *encoder)
 {
+	exynos_dp_crtc_clock_enable(encoder, true);
 }
 
-static void exynos_dp_nop(struct drm_encoder *encoder)
+static void exynos_dp_disable(struct drm_encoder *encoder)
 {
-	/* do nothing */
+	exynos_dp_crtc_clock_enable(encoder, false);
 }
 
 static const struct drm_encoder_funcs exynos_dp_encoder_funcs = {
@@ -84,8 +72,8 @@ static const struct drm_encoder_funcs exynos_dp_encoder_funcs = {
 
 static const struct drm_encoder_helper_funcs exynos_dp_encoder_helper_funcs = {
 	.mode_set = exynos_dp_mode_set,
-	.enable = exynos_dp_nop,
-	.disable = exynos_dp_nop,
+	.enable = exynos_dp_enable,
+	.disable = exynos_dp_disable,
 };
 
 static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
@@ -171,8 +159,6 @@ static int exynos_dp_probe(struct platform_device *pdev)
 
 	/* The remote port can be either a panel or a bridge */
 	dp->plat_data.dev_type = EXYNOS_DP;
-	dp->plat_data.power_on = exynos_dp_poweron;
-	dp->plat_data.power_off = exynos_dp_poweroff;
 	dp->plat_data.ops = &exynos_dp_ops;
 
 	dp->adp = analogix_dp_probe(dev, &dp->plat_data);

-- 
2.43.0

Re: [PATCH 2/3] drm/exynos: exynos_dp: change poweron/off to encoder enable/disable

[Marek Szyprowski]

On 27.10.2026 13:01, Alexandre Marquet via B4 Relay wrote:
> From: Alexandre Marquet <tb@a-marquet.fr>
>
> Current functions exynos_dp_poweron()/exynos_dp_poweroff(), that
> supposedly powers on/off the device, actually only enable the encoder
> clock. This cause issues where poweron() calls fail silently in
> analogix_dp_probe(), leading in some cases to a state were the encoder
> is never enabled but the rest of the driver assumes that it is.
>
> Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>

Snow, Peach-Pit and Peach-Pi Chromebooks work fine with this change.

> ---
>  drivers/gpu/drm/exynos/exynos_dp.c | 40 +++++++++++++-------------------------
>  1 file changed, 13 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
> index 82c238829921..16b00aacd55b 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
> @@ -43,39 +43,27 @@ struct exynos_dp_device {
>  	struct analogix_dp_plat_data plat_data;
>  };
>  
> -static int exynos_dp_crtc_clock_enable(struct analogix_dp_plat_data *plat_data,
> -				bool enable)
> -{
> -	struct exynos_dp_device *dp = to_dp(plat_data);
> -	struct drm_encoder *encoder = &dp->encoder;
> -
> -	if (!encoder->crtc)
> -		return -EPERM;
> -
> -	exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable);
> -
> -	return 0;
> -}
> -
> -static int exynos_dp_poweron(struct analogix_dp_plat_data *plat_data)
> +static void exynos_dp_mode_set(struct drm_encoder *encoder,
> +			       struct drm_display_mode *mode,
> +			       struct drm_display_mode *adjusted_mode)
>  {
> -	return exynos_dp_crtc_clock_enable(plat_data, true);
>  }
>  
> -static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
> +static void exynos_dp_crtc_clock_enable(struct drm_encoder *encoder,
> +					bool enable)
>  {
> -	return exynos_dp_crtc_clock_enable(plat_data, false);
> +	if (encoder->crtc)
> +		exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable);
>  }
>  
> -static void exynos_dp_mode_set(struct drm_encoder *encoder,
> -			       struct drm_display_mode *mode,
> -			       struct drm_display_mode *adjusted_mode)
> +static void exynos_dp_enable(struct drm_encoder *encoder)
>  {
> +	exynos_dp_crtc_clock_enable(encoder, true);
>  }
>  
> -static void exynos_dp_nop(struct drm_encoder *encoder)
> +static void exynos_dp_disable(struct drm_encoder *encoder)
>  {
> -	/* do nothing */
> +	exynos_dp_crtc_clock_enable(encoder, false);
>  }
>  
>  static const struct drm_encoder_funcs exynos_dp_encoder_funcs = {
> @@ -84,8 +72,8 @@ static const struct drm_encoder_funcs exynos_dp_encoder_funcs = {
>  
>  static const struct drm_encoder_helper_funcs exynos_dp_encoder_helper_funcs = {
>  	.mode_set = exynos_dp_mode_set,
> -	.enable = exynos_dp_nop,
> -	.disable = exynos_dp_nop,
> +	.enable = exynos_dp_enable,
> +	.disable = exynos_dp_disable,
>  };
>  
>  static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
> @@ -171,8 +159,6 @@ static int exynos_dp_probe(struct platform_device *pdev)
>  
>  	/* The remote port can be either a panel or a bridge */
>  	dp->plat_data.dev_type = EXYNOS_DP;
> -	dp->plat_data.power_on = exynos_dp_poweron;
> -	dp->plat_data.power_off = exynos_dp_poweroff;
>  	dp->plat_data.ops = &exynos_dp_ops;
>  
>  	dp->adp = analogix_dp_probe(dev, &dp->plat_data);
>
Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

[PATCH 3/3] drm/panel_edp: Add SEC LTL101DL02-002 panel

[Alexandre Marquet via B4 Relay]

From: Alexandre Marquet <tb@a-marquet.fr>

Add an entry for the eDP SEC LTL101DL02-002 panel used in
google-manta.

Raw EDID dump:

00 ff ff ff ff ff ff 00 4c a3 0f 9c 00 00 00 00
05 0e 01 03 80 21 19 78 0a 87 fe 98 57 51 8c 27
21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 14 69 00 a0 a0 40 2e 60 30 20
36 00 1e d6 10 00 00 19 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 9e

Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
---
 drivers/gpu/drm/panel/panel-edp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index 94bc54c3833a..c92985363093 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -2198,6 +2198,8 @@ static const struct edp_panel_entry edp_panels[] = {
 	EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"),
 	EDP_PANEL_ENTRY('L', 'G', 'D', 0x07fe, &delay_200_500_e200_d200, "LP116WHA-SPB1"),
 
+	EDP_PANEL_ENTRY('S', 'E', 'C', 0x9c0f, &delay_200_500_e50, "LTL101DL02-002"),
+
 	EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
 	EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"),
 	EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"),

-- 
2.43.0

Re: [PATCH 3/3] drm/panel_edp: Add SEC LTL101DL02-002 panel

[Doug Anderson]

Hi,

On Tue, Oct 27, 2026 at 5:01 AM Alexandre Marquet via B4 Relay
<devnull+tb.a-marquet.fr@kernel.org> wrote:
>
> From: Alexandre Marquet <tb@a-marquet.fr>
>
> Add an entry for the eDP SEC LTL101DL02-002 panel used in
> google-manta.
>
> Raw EDID dump:
>
> 00 ff ff ff ff ff ff 00 4c a3 0f 9c 00 00 00 00
> 05 0e 01 03 80 21 19 78 0a 87 fe 98 57 51 8c 27
> 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
> 01 01 01 01 01 01 14 69 00 a0 a0 40 2e 60 30 20
> 36 00 1e d6 10 00 00 19 00 00 00 00 00 00 00 00
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 9e
>
> Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
> ---
>  drivers/gpu/drm/panel/panel-edp.c | 2 ++
>  1 file changed, 2 insertions(+)

nit: subject doesn't quite fit the pattern of recent commits (_ vs -).


> diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
> index 94bc54c3833a..c92985363093 100644
> --- a/drivers/gpu/drm/panel/panel-edp.c
> +++ b/drivers/gpu/drm/panel/panel-edp.c
> @@ -2198,6 +2198,8 @@ static const struct edp_panel_entry edp_panels[] = {
>         EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"),
>         EDP_PANEL_ENTRY('L', 'G', 'D', 0x07fe, &delay_200_500_e200_d200, "LP116WHA-SPB1"),
>
> +       EDP_PANEL_ENTRY('S', 'E', 'C', 0x9c0f, &delay_200_500_e50, "LTL101DL02-002"),
> +

It would also be good to note in the commit message where you got the
timings from. Datasheet? Downstream code? Guessing?

I had my AI agent take a look for itself. It found evidence suggesting
the enable delay should be 97ms, not 50ms. The other ones seem to be
OK.

-Doug