[PATCH 0/8] rust: io: register: allow paths for relative register bases

[PATCH 0/8] rust: io: register: allow paths for relative register bases

[Alexandre Courbot]

The register! macro currently accepts an identifier as the base of a
relative register. This requires base types declared in other modules to
be imported into the module containing the register declaration, rather
than allowing a qualified path to be used directly, which is arbitrarily
limiting.

This series allows path to be used as relative register bases. Since a
`path` fragment cannot be followed by `+` in declarative macros, the
`Base + Offset` and `Base + Alias` forms are replaced with `Base:
Offset` and `Base: Alias`, inducing a syntax change.

The first two patches clean up the macro's internal dispatch and
arguments in preparation for the change. Patches 3-6 gradually add
support for the new syntax and update docs and examples, while
preserving the old syntax. Patch 7 updates Nova to use the new syntax,
and patch 8 removes support for the now unused old syntax.

The series is structured this way so the Nova update and deprecated
syntax removal can be merged separately, as otherwise the whole series
would need to go through drm-rust.

Outside of the syntax update, no functional change is intended.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
Alexandre Courbot (8):
      rust: io: register: dispatch fixed array shortcut internally
      rust: io: register: remove unused rule arguments
      rust: io: register: use path fragment for alias destination
      rust: io: register: use path fragment in relative internal rules
      rust: io: register: allow paths for relative register bases
      rust: io: register: use new relative base syntax in doc and examples
      gpu: nova-core: convert relative registers to new syntax
      rust: io: register: remove deprecated relative register rule

 drivers/gpu/nova-core/regs.rs | 74 +++++++++++++++++++++---------------------
 rust/kernel/io/register.rs    | 75 +++++++++++++++++++++----------------------
 2 files changed, 74 insertions(+), 75 deletions(-)
---
base-commit: 22e77d81d0a9ab3aee1c5538b3f2f8a66930bfa7
change-id: 20260418-registers_fix-7a67ebef9ba0

Best regards,
--  
Alexandre Courbot <acourbot@nvidia.com>

[PATCH 1/8] rust: io: register: dispatch fixed array shortcut internally

[Alexandre Courbot]

The contiguous fixed-register-array shortcut redispatches an already
normalized declaration through the public register! entry point. This is
unneeded - the public rule should only be invoked by users.

Dispatch directly to the appropriate internal @reg rule instead.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 80e638a892d7..27a9fe45b06d 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -888,7 +888,8 @@ macro_rules! register {
             { $($fields:tt)* }
     ) => {
         $crate::register!(
-            $(#[$attr])* $vis $name($storage) [ $size, stride = ::core::mem::size_of::<$storage>() ]
+            @reg $(#[$attr])* $vis $name($storage)
+                [ $size, stride = ::core::mem::size_of::<$storage>() ]
                 @ $offset { $($fields)* }
         );
     };

-- 
2.55.0

[PATCH 2/8] rust: io: register: remove unused rule arguments

[Alexandre Courbot]

A few arguments passed to internal rules are never used and just add
unneeded complexity. Remove them to simplify the rules a bit.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 27a9fe45b06d..82f674aea45a 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -832,7 +832,7 @@ macro_rules! register {
     ) => {
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
         $crate::register!(@io_base $name($storage) @ $offset);
-        $crate::register!(@io_fixed $(#[$attr])* $vis $name($storage));
+        $crate::register!(@io_fixed $(#[$attr])* $vis $name);
     };
 
     // Creates an alias register of fixed offset register `alias` with its own fields.
@@ -845,7 +845,7 @@ macro_rules! register {
             @io_base $name($storage) @
             <$alias as $crate::io::register::Register>::OFFSET
         );
-        $crate::register!(@io_fixed $(#[$attr])* $vis $name($storage));
+        $crate::register!(@io_fixed $(#[$attr])* $vis $name);
     };
 
     // Creates a register at a relative offset from a base address provider.
@@ -855,7 +855,7 @@ macro_rules! register {
     ) => {
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
         $crate::register!(@io_base $name($storage) @ $offset);
-        $crate::register!(@io_relative $vis $name($storage) @ $base);
+        $crate::register!(@io_relative $name @ $base);
     };
 
     // Creates an alias register of relative offset register `alias` with its own fields.
@@ -867,7 +867,7 @@ macro_rules! register {
         $crate::register!(
             @io_base $name($storage) @ <$alias as $crate::io::register::Register>::OFFSET
         );
-        $crate::register!(@io_relative $vis $name($storage) @ $base);
+        $crate::register!(@io_relative $name @ $base);
     };
 
     // Creates an array of registers at a fixed offset of the MMIO space.
@@ -879,7 +879,7 @@ macro_rules! register {
 
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
         $crate::register!(@io_base $name($storage) @ $offset);
-        $crate::register!(@io_array $vis $name($storage) [ $size, stride = $stride ]);
+        $crate::register!(@io_array $name [ $size, stride = $stride ]);
     };
 
     // Shortcut for contiguous array of registers (stride == size of element).
@@ -909,7 +909,7 @@ macro_rules! register {
             <$alias as $crate::io::register::Register>::OFFSET
                 + $idx * <$alias as $crate::io::register::RegisterArray>::STRIDE
         );
-        $crate::register!(@io_fixed $(#[$attr])* $vis $name($storage));
+        $crate::register!(@io_fixed $(#[$attr])* $vis $name);
     };
 
     // Creates an array of registers at a relative offset from a base address provider.
@@ -922,9 +922,7 @@ macro_rules! register {
 
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
         $crate::register!(@io_base $name($storage) @ $offset);
-        $crate::register!(
-            @io_relative_array $vis $name($storage) [ $size, stride = $stride ] @ $base + $offset
-        );
+        $crate::register!(@io_relative_array $name [ $size, stride = $stride ] @ $base);
     };
 
     // Shortcut for contiguous array of relative registers (stride == size of element).
@@ -954,7 +952,7 @@ macro_rules! register {
                 <$alias as $crate::io::register::Register>::OFFSET +
                 $idx * <$alias as $crate::io::register::RegisterArray>::STRIDE
         );
-        $crate::register!(@io_relative $vis $name($storage) @ $base);
+        $crate::register!(@io_relative $name @ $base);
     };
 
     // Generates the bitfield for the register.
@@ -980,7 +978,7 @@ impl $crate::io::register::Register for $name {
     };
 
     // Implementations of fixed registers.
-    (@io_fixed $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)) => {
+    (@io_fixed $(#[$attr:meta])* $vis:vis $name:ident) => {
         impl $crate::io::register::FixedRegister for $name {}
 
         $(#[$attr])*
@@ -989,7 +987,7 @@ impl $crate::io::register::FixedRegister for $name {}
     };
 
     // Implementations of relative registers.
-    (@io_relative $vis:vis $name:ident ($storage:ty) @ $base:ident) => {
+    (@io_relative $name:ident @ $base:ident) => {
         impl $crate::io::register::WithBase for $name {
             type BaseFamily = $base;
         }
@@ -998,7 +996,7 @@ impl $crate::io::register::RelativeRegister for $name {}
     };
 
     // Implementations of register arrays.
-    (@io_array $vis:vis $name:ident ($storage:ty) [ $size:expr, stride = $stride:expr ]) => {
+    (@io_array $name:ident [ $size:expr, stride = $stride:expr ]) => {
         impl $crate::io::register::Array for $name {}
 
         impl $crate::io::register::RegisterArray for $name {
@@ -1009,8 +1007,7 @@ impl $crate::io::register::RegisterArray for $name {
 
     // Implementations of relative array registers.
     (
-        @io_relative_array $vis:vis $name:ident ($storage:ty) [ $size:expr, stride = $stride:expr ]
-            @ $base:ident + $offset:literal
+        @io_relative_array $name:ident [ $size:expr, stride = $stride:expr ] @ $base:ident
     ) => {
         impl $crate::io::register::WithBase for $name {
             type BaseFamily = $base;

-- 
2.55.0

[PATCH 3/8] rust: io: register: use path fragment for alias destination

[Alexandre Courbot]

The destination of an alias, whether it is fixed, relative, or indexed,
is always another register, i.e. a `struct` type. Replace the `ident`
fragment with a `path` one which is more accurate, and allows
referencing registers using a qualified path instead of only identifiers
visible from the current module.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 82f674aea45a..1e0e23e4233f 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -809,7 +809,7 @@ macro_rules! register {
             $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
                 $([ $size:expr $(, stride = $stride:expr)? ])?
                 $(@ $($base:ident +)? $offset:literal)?
-                $(=> $alias:ident $(+ $alias_offset:ident)? $([$alias_idx:expr])? )?
+                $(=> $alias:ident $(+ $alias_offset:path)? $([$alias_idx:expr])? )?
             { $($fields:tt)* }
         )*
     ) => {
@@ -837,7 +837,7 @@ macro_rules! register {
 
     // Creates an alias register of fixed offset register `alias` with its own fields.
     (
-        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $alias:ident
+        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $alias:path
             { $($fields:tt)* }
     ) => {
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
@@ -860,7 +860,7 @@ macro_rules! register {
 
     // Creates an alias register of relative offset register `alias` with its own fields.
     (
-        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $base:ident + $alias:ident
+        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $base:ident + $alias:path
             { $($fields:tt)* }
     ) => {
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
@@ -896,7 +896,7 @@ macro_rules! register {
 
     // Creates an alias of register `idx` of array of registers `alias` with its own fields.
     (
-        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $alias:ident [ $idx:expr ]
+        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $alias:path [ $idx:expr ]
             { $($fields:tt)* }
     ) => {
         $crate::build_assert::static_assert!(
@@ -940,7 +940,7 @@ macro_rules! register {
     // fields.
     (
         @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
-            => $base:ident + $alias:ident [ $idx:expr ] { $($fields:tt)* }
+            => $base:ident + $alias:path [ $idx:expr ] { $($fields:tt)* }
     ) => {
         $crate::build_assert::static_assert!(
             $idx < <$alias as $crate::io::register::RegisterArray>::SIZE

-- 
2.55.0

[PATCH 4/8] rust: io: register: use path fragment in relative internal rules

[Alexandre Courbot]

The base of a relative register is a type, but its current fragment is
`ident`. This prevents referencing bases that are e.g. declared in
another module.

The `path` fragment is more accurate to represent relative register
bases, but bases are currently followed by `+`, which is forbidden right
after `path` fragments.

`:` is another separator that can carry the desired semantics, and is
legal to follow a `path` fragment. Thus, replace the `+` separator with
`:` in the internal rules so we can change the fragment for relative
register bases to `path`.

The public rule still uses the `+` notation and an `ident` fragment, so
there is no user-facing change yet; only a minor replumbing of the
internals to better support the new syntax introduced in the next patch.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 1e0e23e4233f..62208f52752a 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -816,8 +816,8 @@ macro_rules! register {
         $(
         $crate::register!(
             @reg $(#[$attr])* $vis $name ($storage) $([$size $(, stride = $stride)?])?
-                $(@ $($base +)? $offset)?
-                $(=> $alias $(+ $alias_offset)? $([$alias_idx])? )?
+                $(@ $($base :)? $offset)?
+                $(=> $alias $(: $alias_offset)? $([$alias_idx])? )?
             { $($fields)* }
         );
         )*
@@ -850,7 +850,7 @@ macro_rules! register {
 
     // Creates a register at a relative offset from a base address provider.
     (
-        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) @ $base:ident + $offset:literal
+        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) @ $base:path : $offset:literal
             { $($fields:tt)* }
     ) => {
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
@@ -860,7 +860,7 @@ macro_rules! register {
 
     // Creates an alias register of relative offset register `alias` with its own fields.
     (
-        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $base:ident + $alias:path
+        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $base:path : $alias:path
             { $($fields:tt)* }
     ) => {
         $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
@@ -916,7 +916,7 @@ macro_rules! register {
     (
         @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
             [ $size:expr, stride = $stride:expr ]
-            @ $base:ident + $offset:literal { $($fields:tt)* }
+            @ $base:path : $offset:literal { $($fields:tt)* }
     ) => {
         $crate::build_assert::static_assert!(::core::mem::size_of::<$storage>() <= $stride);
 
@@ -928,11 +928,12 @@ macro_rules! register {
     // Shortcut for contiguous array of relative registers (stride == size of element).
     (
         @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) [ $size:expr ]
-            @ $base:ident + $offset:literal { $($fields:tt)* }
+            @ $base:path : $offset:literal { $($fields:tt)* }
     ) => {
         $crate::register!(
-            $(#[$attr])* $vis $name($storage) [ $size, stride = ::core::mem::size_of::<$storage>() ]
-                @ $base + $offset { $($fields)* }
+            @reg $(#[$attr])* $vis $name($storage)
+                [ $size, stride = ::core::mem::size_of::<$storage>() ]
+                @ $base : $offset { $($fields)* }
         );
     };
 
@@ -940,7 +941,7 @@ macro_rules! register {
     // fields.
     (
         @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
-            => $base:ident + $alias:path [ $idx:expr ] { $($fields:tt)* }
+            => $base:path : $alias:path [ $idx:expr ] { $($fields:tt)* }
     ) => {
         $crate::build_assert::static_assert!(
             $idx < <$alias as $crate::io::register::RegisterArray>::SIZE
@@ -987,7 +988,7 @@ impl $crate::io::register::FixedRegister for $name {}
     };
 
     // Implementations of relative registers.
-    (@io_relative $name:ident @ $base:ident) => {
+    (@io_relative $name:ident @ $base:path) => {
         impl $crate::io::register::WithBase for $name {
             type BaseFamily = $base;
         }
@@ -1007,7 +1008,7 @@ impl $crate::io::register::RegisterArray for $name {
 
     // Implementations of relative array registers.
     (
-        @io_relative_array $name:ident [ $size:expr, stride = $stride:expr ] @ $base:ident
+        @io_relative_array $name:ident [ $size:expr, stride = $stride:expr ] @ $base:path
     ) => {
         impl $crate::io::register::WithBase for $name {
             type BaseFamily = $base;

-- 
2.55.0

[PATCH 5/8] rust: io: register: allow paths for relative register bases

[Alexandre Courbot]

Relative register bases are currently matched as `ident` fragments,
so bases declared in another module must first be imported into the
current scope.

Add `Base: Offset` and `Base: Alias` forms whose bases are matched as
`path` fragments. A colon is used because macro_rules! does not allow
a `path` fragment to be followed by `+`.

The old form continues to be accepted temporarily so in-tree users can
be converted in subsequent patches.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 62208f52752a..4070fabb00f4 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -801,6 +801,26 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// ```
 #[macro_export]
 macro_rules! register {
+    // Deprecated `+` syntax for relative registers and their aliases.
+    (
+        $(
+            $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
+                $([ $size:expr $(, stride = $stride:expr)? ])?
+                $(@ $($base:ident +)? $offset:literal)?
+                $(=> $alias:ident $(+ $alias_offset:ty)? $([$alias_idx:expr])? )?
+            { $($fields:tt)* }
+        )*
+    ) => {
+        $(
+        $crate::register!(
+            @reg $(#[$attr])* $vis $name ($storage) $([$size $(, stride = $stride)?])?
+                $(@ $($base :)? $offset)?
+                $(=> $alias $(: $alias_offset)? $([$alias_idx])? )?
+            { $($fields)* }
+        );
+        )*
+    };
+
     // Entry point for the macro, allowing multiple registers to be defined in one call.
     // It matches all possible register declaration patterns to dispatch them to corresponding
     // `@reg` rule that defines a single register.
@@ -808,8 +828,8 @@ macro_rules! register {
         $(
             $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
                 $([ $size:expr $(, stride = $stride:expr)? ])?
-                $(@ $($base:ident +)? $offset:literal)?
-                $(=> $alias:ident $(+ $alias_offset:path)? $([$alias_idx:expr])? )?
+                $(@ $($base:path :)? $offset:literal)?
+                $(=> $alias:path $(: $alias_offset:path)? $([$alias_idx:expr])? )?
             { $($fields:tt)* }
         )*
     ) => {

-- 
2.55.0

[PATCH 6/8] rust: io: register: use new relative base syntax in doc and examples

[Alexandre Courbot]

Convert the documentation and examples to use the new `Base:` syntax to
specify relative registers bases.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 4070fabb00f4..eeb7f859f8b9 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -527,11 +527,11 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// space segment. Since both instances of `CPU_CTL` share the same layout, we don't want to define
 /// them twice and would prefer a way to select which one to use from a single definition.
 ///
-/// This can be done using the `Base + Offset` syntax when specifying the register's address:
+/// This can be done using the `Base: Offset` syntax when specifying the register's address:
 ///
 /// ```ignore
 /// register! {
-///     pub RELATIVE_REG(u32) @ Base + 0x80 {
+///     pub RELATIVE_REG(u32) @ Base: 0x80 {
 ///         ...
 ///     }
 /// }
@@ -579,7 +579,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// // This makes `CPU_CTL` accessible from all implementors of `RegisterBase<CpuCtlBase>`.
 /// register! {
 ///     /// CPU core control.
-///     pub CPU_CTL(u32) @ CpuCtlBase + 0x10 {
+///     pub CPU_CTL(u32) @ CpuCtlBase: 0x10 {
 ///         0:0 start;
 ///     }
 /// }
@@ -595,7 +595,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// // Aliases can also be defined for relative register.
 /// register! {
 ///     /// Alias to CPU core control.
-///     pub CPU_CTL_ALIAS(u32) => CpuCtlBase + CPU_CTL {
+///     pub CPU_CTL_ALIAS(u32) => CpuCtlBase: CPU_CTL {
 ///         /// Start the aliased CPU core.
 ///         1:1 alias_start;
 ///     }
@@ -703,7 +703,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 ///
 /// ```ignore
 /// register! {
-///     pub RELATIVE_REGISTER_ARRAY(u8)[10, stride = 4] @ Base + 0x100 {
+///     pub RELATIVE_REGISTER_ARRAY(u8)[10, stride = 4] @ Base: 0x100 {
 ///         ...
 ///     }
 /// }
@@ -747,7 +747,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// // 64 per-cpu scratch registers, arranged as a contiguous array.
 /// register! {
 ///     /// Per-CPU scratch registers.
-///     pub CPU_SCRATCH(u32)[64] @ CpuCtlBase + 0x00000080 {
+///     pub CPU_SCRATCH(u32)[64] @ CpuCtlBase: 0x00000080 {
 ///         31:0 value;
 ///     }
 /// }
@@ -774,7 +774,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// // Alias to `SCRATCH[8]` used to convey the firmware exit code.
 /// register! {
 ///     /// Per-CPU firmware exit status code.
-///     pub CPU_FIRMWARE_STATUS(u32) => CpuCtlBase + CPU_SCRATCH[8] {
+///     pub CPU_FIRMWARE_STATUS(u32) => CpuCtlBase: CPU_SCRATCH[8] {
 ///         7:0 status;
 ///     }
 /// }
@@ -784,12 +784,12 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// // registers of the two declarations below are interleaved.
 /// register! {
 ///     /// Scratch registers bank 0.
-///     pub CPU_SCRATCH_INTERLEAVED_0(u32)[16, stride = 8] @ CpuCtlBase + 0x00000d00 {
+///     pub CPU_SCRATCH_INTERLEAVED_0(u32)[16, stride = 8] @ CpuCtlBase: 0x00000d00 {
 ///         31:0 value;
 ///     }
 ///
 ///     /// Scratch registers bank 1.
-///     pub CPU_SCRATCH_INTERLEAVED_1(u32)[16, stride = 8] @ CpuCtlBase + 0x00000d04 {
+///     pub CPU_SCRATCH_INTERLEAVED_1(u32)[16, stride = 8] @ CpuCtlBase: 0x00000d04 {
 ///         31:0 value;
 ///     }
 /// }

-- 
2.55.0

[PATCH 7/8] gpu: nova-core: convert relative registers to new syntax

[Alexandre Courbot]

Convert all relative registers declarations to use the new `Base:`
syntax.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 drivers/gpu/nova-core/regs.rs | 74 +++++++++++++++++++++----------------------
 1 file changed, 37 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index 397124f245ee..744c6087220e 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -158,19 +158,19 @@ fn fmt(&self, f: &mut kernel::fmt::Formatter<'_>) -> kernel::fmt::Result {
     // through a primary and an EG (egress) pair that must both be programmed to the same
     // address. Hardware ignores bits 7:0 of each LO register. The boot path uses a fixed
     // HSHUB0 base, so the multiple runtime-discovered HSHUB bases are not needed here.
-    pub(crate) NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_LO(u32) @ Hshub0Base + 0x00000e50 {
+    pub(crate) NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_LO(u32) @ Hshub0Base: 0x00000e50 {
         31:0    adr => u32;
     }
 
-    pub(crate) NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_HI(u32) @ Hshub0Base + 0x00000e54 {
+    pub(crate) NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_HI(u32) @ Hshub0Base: 0x00000e54 {
         19:0    adr;
     }
 
-    pub(crate) NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_LO(u32) @ Hshub0Base + 0x000006c0 {
+    pub(crate) NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_LO(u32) @ Hshub0Base: 0x000006c0 {
         31:0    adr => u32;
     }
 
-    pub(crate) NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_HI(u32) @ Hshub0Base + 0x000006c4 {
+    pub(crate) NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_HI(u32) @ Hshub0Base: 0x000006c4 {
         19:0    adr;
     }
 }
@@ -323,30 +323,30 @@ pub(crate) fn usable_fb_size(self) -> u64 {
 // PFALCON
 
 register! {
-    pub(crate) NV_PFALCON_FALCON_IRQSCLR(u32) @ PFalconBase + 0x00000004 {
+    pub(crate) NV_PFALCON_FALCON_IRQSCLR(u32) @ PFalconBase: 0x00000004 {
         6:6     swgen0 => bool;
         4:4     halt => bool;
     }
 
-    pub(crate) NV_PFALCON_FALCON_MAILBOX0(u32) @ PFalconBase + 0x00000040 {
+    pub(crate) NV_PFALCON_FALCON_MAILBOX0(u32) @ PFalconBase: 0x00000040 {
         31:0    value => u32;
     }
 
-    pub(crate) NV_PFALCON_FALCON_MAILBOX1(u32) @ PFalconBase + 0x00000044 {
+    pub(crate) NV_PFALCON_FALCON_MAILBOX1(u32) @ PFalconBase: 0x00000044 {
         31:0    value => u32;
     }
 
     /// Used to store version information about the firmware running
     /// on the Falcon processor.
-    pub(crate) NV_PFALCON_FALCON_OS(u32) @ PFalconBase + 0x00000080 {
+    pub(crate) NV_PFALCON_FALCON_OS(u32) @ PFalconBase: 0x00000080 {
         31:0    value => u32;
     }
 
-    pub(crate) NV_PFALCON_FALCON_RM(u32) @ PFalconBase + 0x00000084 {
+    pub(crate) NV_PFALCON_FALCON_RM(u32) @ PFalconBase: 0x00000084 {
         31:0    value => u32;
     }
 
-    pub(crate) NV_PFALCON_FALCON_HWCFG2(u32) @ PFalconBase + 0x000000f4 {
+    pub(crate) NV_PFALCON_FALCON_HWCFG2(u32) @ PFalconBase: 0x000000f4 {
         /// Signal indicating that reset is completed (GA102+).
         31:31   reset_ready => bool;
         /// RISC-V branch privilege lockdown bit.
@@ -356,17 +356,17 @@ pub(crate) fn usable_fb_size(self) -> u64 {
         10:10   riscv => bool;
     }
 
-    pub(crate) NV_PFALCON_FALCON_CPUCTL(u32) @ PFalconBase + 0x00000100 {
+    pub(crate) NV_PFALCON_FALCON_CPUCTL(u32) @ PFalconBase: 0x00000100 {
         6:6     alias_en => bool;
         4:4     halted => bool;
         1:1     startcpu => bool;
     }
 
-    pub(crate) NV_PFALCON_FALCON_BOOTVEC(u32) @ PFalconBase + 0x00000104 {
+    pub(crate) NV_PFALCON_FALCON_BOOTVEC(u32) @ PFalconBase: 0x00000104 {
         31:0    value => u32;
     }
 
-    pub(crate) NV_PFALCON_FALCON_DMACTL(u32) @ PFalconBase + 0x0000010c {
+    pub(crate) NV_PFALCON_FALCON_DMACTL(u32) @ PFalconBase: 0x0000010c {
         7:7     secure_stat => bool;
         6:3     dmaq_num;
         2:2     imem_scrubbing => bool;
@@ -374,15 +374,15 @@ pub(crate) fn usable_fb_size(self) -> u64 {
         0:0     require_ctx => bool;
     }
 
-    pub(crate) NV_PFALCON_FALCON_DMATRFBASE(u32) @ PFalconBase + 0x00000110 {
+    pub(crate) NV_PFALCON_FALCON_DMATRFBASE(u32) @ PFalconBase: 0x00000110 {
         31:0    base => u32;
     }
 
-    pub(crate) NV_PFALCON_FALCON_DMATRFMOFFS(u32) @ PFalconBase + 0x00000114 {
+    pub(crate) NV_PFALCON_FALCON_DMATRFMOFFS(u32) @ PFalconBase: 0x00000114 {
         23:0    offs;
     }
 
-    pub(crate) NV_PFALCON_FALCON_DMATRFCMD(u32) @ PFalconBase + 0x00000118 {
+    pub(crate) NV_PFALCON_FALCON_DMATRFCMD(u32) @ PFalconBase: 0x00000118 {
         16:16   set_dmtag;
         14:12   ctxdma;
         10:8    size ?=> DmaTrfCmdSize;
@@ -393,15 +393,15 @@ pub(crate) fn usable_fb_size(self) -> u64 {
         0:0     full => bool;
     }
 
-    pub(crate) NV_PFALCON_FALCON_DMATRFFBOFFS(u32) @ PFalconBase + 0x0000011c {
+    pub(crate) NV_PFALCON_FALCON_DMATRFFBOFFS(u32) @ PFalconBase: 0x0000011c {
         31:0    offs => u32;
     }
 
-    pub(crate) NV_PFALCON_FALCON_DMATRFBASE1(u32) @ PFalconBase + 0x00000128 {
+    pub(crate) NV_PFALCON_FALCON_DMATRFBASE1(u32) @ PFalconBase: 0x00000128 {
         8:0     base;
     }
 
-    pub(crate) NV_PFALCON_FALCON_HWCFG1(u32) @ PFalconBase + 0x0000012c {
+    pub(crate) NV_PFALCON_FALCON_HWCFG1(u32) @ PFalconBase: 0x0000012c {
         /// Core revision subversion.
         7:6     core_rev_subversion => FalconCoreRevSubversion;
         /// Security model.
@@ -410,12 +410,12 @@ pub(crate) fn usable_fb_size(self) -> u64 {
         3:0     core_rev ?=> FalconCoreRev;
     }
 
-    pub(crate) NV_PFALCON_FALCON_CPUCTL_ALIAS(u32) @ PFalconBase + 0x00000130 {
+    pub(crate) NV_PFALCON_FALCON_CPUCTL_ALIAS(u32) @ PFalconBase: 0x00000130 {
         1:1     startcpu => bool;
     }
 
     /// IMEM access control register. Up to 4 ports are available for IMEM access.
-    pub(crate) NV_PFALCON_FALCON_IMEMC(u32)[4, stride = 16] @ PFalconBase + 0x00000180 {
+    pub(crate) NV_PFALCON_FALCON_IMEMC(u32)[4, stride = 16] @ PFalconBase: 0x00000180 {
         /// Access secure IMEM.
         28:28     secure => bool;
         /// Auto-increment on write.
@@ -426,17 +426,17 @@ pub(crate) fn usable_fb_size(self) -> u64 {
 
     /// IMEM data register. Reading/writing this register accesses IMEM at the address
     /// specified by the corresponding IMEMC register.
-    pub(crate) NV_PFALCON_FALCON_IMEMD(u32)[4, stride = 16] @ PFalconBase + 0x00000184 {
+    pub(crate) NV_PFALCON_FALCON_IMEMD(u32)[4, stride = 16] @ PFalconBase: 0x00000184 {
         31:0      data;
     }
 
     /// IMEM tag register. Used to set the tag for the current IMEM block.
-    pub(crate) NV_PFALCON_FALCON_IMEMT(u32)[4, stride = 16] @ PFalconBase + 0x00000188 {
+    pub(crate) NV_PFALCON_FALCON_IMEMT(u32)[4, stride = 16] @ PFalconBase: 0x00000188 {
         15:0      tag;
     }
 
     /// DMEM access control register. Up to 8 ports are available for DMEM access.
-    pub(crate) NV_PFALCON_FALCON_DMEMC(u32)[8, stride = 8] @ PFalconBase + 0x000001c0 {
+    pub(crate) NV_PFALCON_FALCON_DMEMC(u32)[8, stride = 8] @ PFalconBase: 0x000001c0 {
         /// Auto-increment on write.
         24:24     aincw => bool;
         /// DMEM block and word offset.
@@ -445,29 +445,29 @@ pub(crate) fn usable_fb_size(self) -> u64 {
 
     /// DMEM data register. Reading/writing this register accesses DMEM at the address
     /// specified by the corresponding DMEMC register.
-    pub(crate) NV_PFALCON_FALCON_DMEMD(u32)[8, stride = 8] @ PFalconBase + 0x000001c4 {
+    pub(crate) NV_PFALCON_FALCON_DMEMD(u32)[8, stride = 8] @ PFalconBase: 0x000001c4 {
         31:0      data;
     }
 
     /// Actually known as `NV_PSEC_FALCON_ENGINE` and `NV_PGSP_FALCON_ENGINE` depending on the
     /// falcon instance.
-    pub(crate) NV_PFALCON_FALCON_ENGINE(u32) @ PFalconBase + 0x000003c0 {
+    pub(crate) NV_PFALCON_FALCON_ENGINE(u32) @ PFalconBase: 0x000003c0 {
         0:0     reset => bool;
     }
 
-    pub(crate) NV_PFALCON_FBIF_TRANSCFG(u32)[8] @ PFalconBase + 0x00000600 {
+    pub(crate) NV_PFALCON_FBIF_TRANSCFG(u32)[8] @ PFalconBase: 0x00000600 {
         2:2     mem_type => FalconFbifMemType;
         1:0     target ?=> FalconFbifTarget;
     }
 
-    pub(crate) NV_PFALCON_FBIF_CTL(u32) @ PFalconBase + 0x00000624 {
+    pub(crate) NV_PFALCON_FBIF_CTL(u32) @ PFalconBase: 0x00000624 {
         7:7     allow_phys_no_ctx => bool;
     }
 
     // Falcon EMEM PIO registers (used by FSP on Hopper/Blackwell).
     // These provide the falcon external memory communication interface.
 
-    pub(crate) NV_PFALCON_FALCON_EMEMC(u32) @ PFalconBase + 0x00000ac0 {
+    pub(crate) NV_PFALCON_FALCON_EMEMC(u32) @ PFalconBase: 0x00000ac0 {
         /// EMEM byte offset (4-byte aligned) within the block.
         7:2     offs;
         /// EMEM block to access.
@@ -478,7 +478,7 @@ pub(crate) fn usable_fb_size(self) -> u64 {
         25:25   aincr => bool;
     }
 
-    pub(crate) NV_PFALCON_FALCON_EMEMD(u32) @ PFalconBase + 0x00000ac4 {
+    pub(crate) NV_PFALCON_FALCON_EMEMD(u32) @ PFalconBase: 0x00000ac4 {
         31:0    data => u32;
     }
 }
@@ -524,21 +524,21 @@ pub(crate) fn mem_scrubbing_done(self) -> bool {
 /* PFALCON2 */
 
 register! {
-    pub(crate) NV_PFALCON2_FALCON_MOD_SEL(u32) @ PFalcon2Base + 0x00000180 {
+    pub(crate) NV_PFALCON2_FALCON_MOD_SEL(u32) @ PFalcon2Base: 0x00000180 {
         7:0     algo ?=> FalconModSelAlgo;
     }
 
-    pub(crate) NV_PFALCON2_FALCON_BROM_CURR_UCODE_ID(u32) @ PFalcon2Base + 0x00000198 {
+    pub(crate) NV_PFALCON2_FALCON_BROM_CURR_UCODE_ID(u32) @ PFalcon2Base: 0x00000198 {
         7:0    ucode_id => u8;
     }
 
-    pub(crate) NV_PFALCON2_FALCON_BROM_ENGIDMASK(u32) @ PFalcon2Base + 0x0000019c {
+    pub(crate) NV_PFALCON2_FALCON_BROM_ENGIDMASK(u32) @ PFalcon2Base: 0x0000019c {
         31:0    value => u32;
     }
 
     /// OpenRM defines this as a register array, but doesn't specify its size and only uses its
     /// first element. Be conservative until we know the actual size or need to use more registers.
-    pub(crate) NV_PFALCON2_FALCON_BROM_PARAADDR(u32)[1] @ PFalcon2Base + 0x00000210 {
+    pub(crate) NV_PFALCON2_FALCON_BROM_PARAADDR(u32)[1] @ PFalcon2Base: 0x00000210 {
         31:0    value => u32;
     }
 }
@@ -548,19 +548,19 @@ pub(crate) fn mem_scrubbing_done(self) -> bool {
 register! {
     /// RISC-V status register for debug (Turing and GA100 only).
     /// Reflects current RISC-V core status.
-    pub(crate) NV_PRISCV_RISCV_CORE_SWITCH_RISCV_STATUS(u32) @ PFalcon2Base + 0x00000240 {
+    pub(crate) NV_PRISCV_RISCV_CORE_SWITCH_RISCV_STATUS(u32) @ PFalcon2Base: 0x00000240 {
         /// RISC-V core active/inactive status.
         0:0     active_stat => bool;
     }
 
     /// GA102 and later.
-    pub(crate) NV_PRISCV_RISCV_CPUCTL(u32) @ PFalcon2Base + 0x00000388 {
+    pub(crate) NV_PRISCV_RISCV_CPUCTL(u32) @ PFalcon2Base: 0x00000388 {
         7:7     active_stat => bool;
         0:0     halted => bool;
     }
 
     /// GA102 and later.
-    pub(crate) NV_PRISCV_RISCV_BCR_CTRL(u32) @ PFalcon2Base + 0x00000668 {
+    pub(crate) NV_PRISCV_RISCV_BCR_CTRL(u32) @ PFalcon2Base: 0x00000668 {
         8:8     br_fetch => bool;
         4:4     core_select => PeregrineCoreSelect;
         0:0     valid => bool;

-- 
2.55.0

[PATCH 8/8] rust: io: register: remove deprecated relative register rule

[Alexandre Courbot]

Now that all users are converted to the new syntax, remove the
deprecated rule for the `Base +` relative register base syntax.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/io/register.rs | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index eeb7f859f8b9..2c88ebf0057e 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -801,26 +801,6 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
 /// ```
 #[macro_export]
 macro_rules! register {
-    // Deprecated `+` syntax for relative registers and their aliases.
-    (
-        $(
-            $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
-                $([ $size:expr $(, stride = $stride:expr)? ])?
-                $(@ $($base:ident +)? $offset:literal)?
-                $(=> $alias:ident $(+ $alias_offset:ty)? $([$alias_idx:expr])? )?
-            { $($fields:tt)* }
-        )*
-    ) => {
-        $(
-        $crate::register!(
-            @reg $(#[$attr])* $vis $name ($storage) $([$size $(, stride = $stride)?])?
-                $(@ $($base :)? $offset)?
-                $(=> $alias $(: $alias_offset)? $([$alias_idx])? )?
-            { $($fields)* }
-        );
-        )*
-    };
-
     // Entry point for the macro, allowing multiple registers to be defined in one call.
     // It matches all possible register declaration patterns to dispatch them to corresponding
     // `@reg` rule that defines a single register.

-- 
2.55.0

Re: [PATCH 4/8] rust: io: register: use path fragment in relative internal rules

[Alexandre Courbot]

On Tue Jul 21, 2026 at 4:00 AM PDT, Alexandre Courbot wrote:
> The base of a relative register is a type, but its current fragment is
> `ident`. This prevents referencing bases that are e.g. declared in
> another module.
>
> The `path` fragment is more accurate to represent relative register
> bases, but bases are currently followed by `+`, which is forbidden right
> after `path` fragments.
>
> `:` is another separator that can carry the desired semantics, and is
> legal to follow a `path` fragment. Thus, replace the `+` separator with
> `:` in the internal rules so we can change the fragment for relative
> register bases to `path`.
>
> The public rule still uses the `+` notation and an `ident` fragment, so
> there is no user-facing change yet; only a minor replumbing of the
> internals to better support the new syntax introduced in the next patch.
>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
>  rust/kernel/io/register.rs | 23 ++++++++++++-----------
>  1 file changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
> index 1e0e23e4233f..62208f52752a 100644
> --- a/rust/kernel/io/register.rs
> +++ b/rust/kernel/io/register.rs
> @@ -816,8 +816,8 @@ macro_rules! register {
>          $(
>          $crate::register!(
>              @reg $(#[$attr])* $vis $name ($storage) $([$size $(, stride = $stride)?])?
> -                $(@ $($base +)? $offset)?
> -                $(=> $alias $(+ $alias_offset)? $([$alias_idx])? )?
> +                $(@ $($base :)? $offset)?
> +                $(=> $alias $(: $alias_offset)? $([$alias_idx])? )?
>              { $($fields)* }
>          );
>          )*
> @@ -850,7 +850,7 @@ macro_rules! register {
>  
>      // Creates a register at a relative offset from a base address provider.
>      (
> -        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) @ $base:ident + $offset:literal
> +        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) @ $base:path : $offset:literal
>              { $($fields:tt)* }
>      ) => {
>          $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
> @@ -860,7 +860,7 @@ macro_rules! register {
>  
>      // Creates an alias register of relative offset register `alias` with its own fields.
>      (
> -        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $base:ident + $alias:path
> +        @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) => $base:path : $alias:path
>              { $($fields:tt)* }
>      ) => {
>          $crate::register!(@bitfield $(#[$attr])* $vis struct $name($storage) { $($fields)* });
> @@ -916,7 +916,7 @@ macro_rules! register {
>      (
>          @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty)
>              [ $size:expr, stride = $stride:expr ]
> -            @ $base:ident + $offset:literal { $($fields:tt)* }
> +            @ $base:path : $offset:literal { $($fields:tt)* }
>      ) => {
>          $crate::build_assert::static_assert!(::core::mem::size_of::<$storage>() <= $stride);
>  
> @@ -928,11 +928,12 @@ macro_rules! register {
>      // Shortcut for contiguous array of relative registers (stride == size of element).
>      (
>          @reg $(#[$attr:meta])* $vis:vis $name:ident ($storage:ty) [ $size:expr ]
> -            @ $base:ident + $offset:literal { $($fields:tt)* }
> +            @ $base:path : $offset:literal { $($fields:tt)* }
>      ) => {
>          $crate::register!(
> -            $(#[$attr])* $vis $name($storage) [ $size, stride = ::core::mem::size_of::<$storage>() ]
> -                @ $base + $offset { $($fields)* }
> +            @reg $(#[$attr])* $vis $name($storage)

Mmm looks like this `@reg` should also have been added by the first patch.

Re: [PATCH 1/8] rust: io: register: dispatch fixed array shortcut internally

[Gary Guo]

On Tue Jul 21, 2026 at 12:00 PM BST, Alexandre Courbot wrote:
> The contiguous fixed-register-array shortcut redispatches an already
> normalized declaration through the public register! entry point. This is
> unneeded - the public rule should only be invoked by users.
> 
> Dispatch directly to the appropriate internal @reg rule instead.
> 
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>

Reviewed-by: Gary Guo <gary@garyguo.net>

> ---
>  rust/kernel/io/register.rs | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Re: [PATCH 1/8] rust: io: register: dispatch fixed array shortcut internally

[Gary Guo]

On Tue Jul 21, 2026 at 12:00 PM BST, Alexandre Courbot wrote:
> The contiguous fixed-register-array shortcut redispatches an already
> normalized declaration through the public register! entry point. This is
> unneeded - the public rule should only be invoked by users.
>
> Dispatch directly to the appropriate internal @reg rule instead.
>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
>  rust/kernel/io/register.rs | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
> index 80e638a892d7..27a9fe45b06d 100644
> --- a/rust/kernel/io/register.rs
> +++ b/rust/kernel/io/register.rs
> @@ -888,7 +888,8 @@ macro_rules! register {
>              { $($fields:tt)* }
>      ) => {
>          $crate::register!(
> -            $(#[$attr])* $vis $name($storage) [ $size, stride = ::core::mem::size_of::<$storage>() ]
> +            @reg $(#[$attr])* $vis $name($storage)
> +                [ $size, stride = ::core::mem::size_of::<$storage>() ]
>                  @ $offset { $($fields)* }

Actually there are two rules that misses the @reg.

>          );
>      };

Re: [PATCH 0/8] rust: io: register: allow paths for relative register bases

[Gary Guo]

On Tue Jul 21, 2026 at 12:00 PM BST, Alexandre Courbot wrote:
> The register! macro currently accepts an identifier as the base of a
> relative register. This requires base types declared in other modules to
> be imported into the module containing the register declaration, rather
> than allowing a qualified path to be used directly, which is arbitrarily
> limiting.
>
> This series allows path to be used as relative register bases. Since a
> `path` fragment cannot be followed by `+` in declarative macros, the
> `Base + Offset` and `Base + Alias` forms are replaced with `Base:
> Offset` and `Base: Alias`, inducing a syntax change.
>
> The first two patches clean up the macro's internal dispatch and
> arguments in preparation for the change. Patches 3-6 gradually add
> support for the new syntax and update docs and examples, while
> preserving the old syntax. Patch 7 updates Nova to use the new syntax,
> and patch 8 removes support for the now unused old syntax.
>
> The series is structured this way so the Nova update and deprecated
> syntax removal can be merged separately, as otherwise the whole series
> would need to go through drm-rust.

I would like to avoid adding new features to relative registers as I aspire to
get rid of them entirely with typed registers.

I'll work on a prototype.

Best,
Gary

>
> Outside of the syntax update, no functional change is intended.
>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> Alexandre Courbot (8):
>       rust: io: register: dispatch fixed array shortcut internally
>       rust: io: register: remove unused rule arguments
>       rust: io: register: use path fragment for alias destination
>       rust: io: register: use path fragment in relative internal rules
>       rust: io: register: allow paths for relative register bases
>       rust: io: register: use new relative base syntax in doc and examples
>       gpu: nova-core: convert relative registers to new syntax
>       rust: io: register: remove deprecated relative register rule
>
>  drivers/gpu/nova-core/regs.rs | 74 +++++++++++++++++++++---------------------
>  rust/kernel/io/register.rs    | 75 +++++++++++++++++++++----------------------
>  2 files changed, 74 insertions(+), 75 deletions(-)
> ---
> base-commit: 22e77d81d0a9ab3aee1c5538b3f2f8a66930bfa7
> change-id: 20260418-registers_fix-7a67ebef9ba0
>
> Best regards,
> --  
> Alexandre Courbot <acourbot@nvidia.com>

Re: [PATCH 0/8] rust: io: register: allow paths for relative register bases

[Alexandre Courbot]

On Tue Jul 21, 2026 at 7:34 AM PDT, Gary Guo wrote:
> On Tue Jul 21, 2026 at 12:00 PM BST, Alexandre Courbot wrote:
>> The register! macro currently accepts an identifier as the base of a
>> relative register. This requires base types declared in other modules to
>> be imported into the module containing the register declaration, rather
>> than allowing a qualified path to be used directly, which is arbitrarily
>> limiting.
>>
>> This series allows path to be used as relative register bases. Since a
>> `path` fragment cannot be followed by `+` in declarative macros, the
>> `Base + Offset` and `Base + Alias` forms are replaced with `Base:
>> Offset` and `Base: Alias`, inducing a syntax change.
>>
>> The first two patches clean up the macro's internal dispatch and
>> arguments in preparation for the change. Patches 3-6 gradually add
>> support for the new syntax and update docs and examples, while
>> preserving the old syntax. Patch 7 updates Nova to use the new syntax,
>> and patch 8 removes support for the now unused old syntax.
>>
>> The series is structured this way so the Nova update and deprecated
>> syntax removal can be merged separately, as otherwise the whole series
>> would need to go through drm-rust.
>
> I would like to avoid adding new features to relative registers as I aspire to
> get rid of them entirely with typed registers.

This is a fix rather than a new feature. Relative register bases should
have been captured as a path since the beginning.

I'll be glad to remove relative registers entirely if projections can
cover their use-case better, but I would not withhold a fix while a
replacement is not visible yet.

Re: [PATCH 0/8] rust: io: register: allow paths for relative register bases

[Gary Guo]

On Tue Jul 21, 2026 at 4:02 PM BST, Alexandre Courbot wrote:
> On Tue Jul 21, 2026 at 7:34 AM PDT, Gary Guo wrote:
>> On Tue Jul 21, 2026 at 12:00 PM BST, Alexandre Courbot wrote:
>>> The register! macro currently accepts an identifier as the base of a
>>> relative register. This requires base types declared in other modules to
>>> be imported into the module containing the register declaration, rather
>>> than allowing a qualified path to be used directly, which is arbitrarily
>>> limiting.
>>>
>>> This series allows path to be used as relative register bases. Since a
>>> `path` fragment cannot be followed by `+` in declarative macros, the
>>> `Base + Offset` and `Base + Alias` forms are replaced with `Base:
>>> Offset` and `Base: Alias`, inducing a syntax change.
>>>
>>> The first two patches clean up the macro's internal dispatch and
>>> arguments in preparation for the change. Patches 3-6 gradually add
>>> support for the new syntax and update docs and examples, while
>>> preserving the old syntax. Patch 7 updates Nova to use the new syntax,
>>> and patch 8 removes support for the now unused old syntax.
>>>
>>> The series is structured this way so the Nova update and deprecated
>>> syntax removal can be merged separately, as otherwise the whole series
>>> would need to go through drm-rust.
>>
>> I would like to avoid adding new features to relative registers as I aspire to
>> get rid of them entirely with typed registers.
>
> This is a fix rather than a new feature. Relative register bases should
> have been captured as a path since the beginning.
>
> I'll be glad to remove relative registers entirely if projections can
> cover their use-case better, but I would not withhold a fix while a
> replacement is not visible yet.

I'm not seeing this as a fix. Nova doesn't need to use a path, and requiring an
import is hardly a restriction.

Best,
Gary