* [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines
@ 2020-01-29 3:26 Arjun Melkaveri
2020-01-29 3:53 ` [igt-dev] ✗ GitLab.Pipeline: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Arjun Melkaveri @ 2020-01-29 3:26 UTC (permalink / raw)
To: arjun.melkaveri, igt-dev
Added __for_each_physical_engine to utilize all available engines.
Moved single, signal, preempt, poll and headless test cases
from static to dynamic group.
Cc: Dec Katarzyna <katarzyna.dec@intel.com>
Cc: Kempczynski Zbigniew <zbigniew.kempczynski@intel.com>
Cc: Tahvanainen Jari <jari.tahvanainen@intel.com>
Cc: Ursulin Tvrtko <tvrtko.ursulin@intel.com>
Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
---
V1 -> V2
Addressed Tvrtko review comments
1) removed gem_require_ring
2) replaced gem_can_store_dword with gem_class_can_store_dword
3) Fixed WhiteSpace issues.
---
V2 -> V3
Added back missing code. i.e. MIN_PRIO
---
V3 -> V4
1) Added gem_context_set_all_engines , that was deleted accidentally
2) Removed gem_require_ring from fence_signal
3) Passing NULL in fence_signal to run test for all engines.
---
V4 -> V5
Used gem_context_clone_with_engines for creating contexts
---
V5 -> V6
Added missing code to check context support. gem_context_clone_with_engines
checks this by calling gem_context_create having igt_assert_eq for
__gem_context_create.
---
V6 -> V7
Minor correction related to check context support.
---
V7 -> V8
Used gem_require_contexts to check requirement of Context support.
gem_require_contexts has igt_require(gem_has_contexts(fd)) which
would skip test when condition is not met.
---
tests/i915/gem_exec_nop.c | 173 +++++++++++++++++++++-----------------
1 file changed, 96 insertions(+), 77 deletions(-)
diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 9a2efd32..ed9568e5 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -66,8 +66,9 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
(end->tv_nsec - start->tv_nsec)*1e-9);
}
-static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
- int timeout, unsigned long *out)
+static double nop_on_ring(int fd, uint32_t handle,
+ const struct intel_execution_engine2 *e, int timeout,
+ unsigned long *out)
{
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
@@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
if (__gem_execbuf(fd, &execbuf)) {
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
gem_execbuf(fd, &execbuf);
}
intel_detect_and_clear_missed_interrupts(fd);
@@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
return elapsed(&start, &now);
}
-static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
+static void poll_ring(int fd, const struct intel_execution_engine2 *e,
+ int timeout)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -121,9 +123,8 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
if (gen == 4 || gen == 5)
flags |= I915_EXEC_SECURE;
- gem_require_ring(fd, engine);
- igt_require(gem_can_store_dword(fd, engine));
- igt_require(gem_engine_has_mutable_submission(fd, engine));
+ igt_require(gem_class_can_store_dword(fd, e->class));
+ igt_require(gem_class_has_mutable_submission(fd, e->class));
memset(&obj, 0, sizeof(obj));
obj.handle = gem_create(fd, 4096);
@@ -187,7 +188,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = engine | flags;
+ execbuf.flags = e->flags | flags;
cycles = 0;
do {
@@ -209,7 +210,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
gem_sync(fd, obj.handle);
igt_info("%s completed %ld cycles: %.3f us\n",
- name, cycles, elapsed*1e-3/cycles);
+ e->name, cycles, elapsed*1e-3/cycles);
munmap(batch, 4096);
gem_close(fd, obj.handle);
@@ -218,6 +219,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
static void poll_sequential(int fd, const char *name, int timeout)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
+ const struct intel_execution_engine2 *e;
const uint32_t MI_ARB_CHK = 0x5 << 23;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj[2];
@@ -234,13 +236,14 @@ static void poll_sequential(int fd, const char *name, int timeout)
flags |= I915_EXEC_SECURE;
nengine = 0;
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)) ||
- !gem_engine_has_mutable_submission(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e) {
+ if (!gem_class_can_store_dword(fd, e->class) ||
+ !gem_class_has_mutable_submission(fd, e->class))
continue;
- engines[nengine++] = eb_ring(e);
+ engines[nengine++] = e->flags;
}
+
igt_require(nengine);
memset(obj, 0, sizeof(obj));
@@ -344,21 +347,20 @@ static void poll_sequential(int fd, const char *name, int timeout)
}
static void single(int fd, uint32_t handle,
- unsigned ring_id, const char *ring_name)
+ const struct intel_execution_engine2 *e)
{
double time;
unsigned long count;
- gem_require_ring(fd, ring_id);
-
- time = nop_on_ring(fd, handle, ring_id, 20, &count);
+ time = nop_on_ring(fd, handle, e, 20, &count);
igt_info("%s: %'lu cycles: %.3fus\n",
- ring_name, count, time*1e6 / count);
+ e->name, count, time*1e6 / count);
}
static double
-stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
- int timeout, int reps)
+stable_nop_on_ring(int fd, uint32_t handle,
+ const struct intel_execution_engine2 *e, int timeout,
+ int reps)
{
igt_stats_t s;
double n;
@@ -372,7 +374,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
unsigned long count;
double time;
- time = nop_on_ring(fd, handle, engine, timeout, &count);
+ time = nop_on_ring(fd, handle, e, timeout, &count);
igt_stats_push_float(&s, time / count);
}
@@ -388,7 +390,8 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
"'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
#x, #ref, x, tolerance * 100.0, ref)
-static void headless(int fd, uint32_t handle)
+static void headless(int fd, uint32_t handle,
+ const struct intel_execution_engine2 *e)
{
unsigned int nr_connected = 0;
drmModeConnector *connector;
@@ -411,7 +414,7 @@ static void headless(int fd, uint32_t handle)
kmstest_set_vt_graphics_mode();
/* benchmark nops */
- n_display = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
+ n_display = stable_nop_on_ring(fd, handle, e, 1, 5);
igt_info("With one display connected: %.2fus\n",
n_display * 1e6);
@@ -419,7 +422,7 @@ static void headless(int fd, uint32_t handle)
kmstest_unset_all_crtcs(fd, res);
/* benchmark nops again */
- n_headless = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
+ n_headless = stable_nop_on_ring(fd, handle, e, 1, 5);
igt_info("Without a display connected (headless): %.2fus\n",
n_headless * 1e6);
@@ -429,6 +432,7 @@ static void headless(int fd, uint32_t handle)
static void parallel(int fd, uint32_t handle, int timeout)
{
+ const struct intel_execution_engine2 *e;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
unsigned engines[16];
@@ -439,12 +443,11 @@ static void parallel(int fd, uint32_t handle, int timeout)
sum = 0;
nengine = 0;
- for_each_physical_engine(e, fd) {
- engines[nengine] = eb_ring(e);
- names[nengine] = e->name;
- nengine++;
+ __for_each_physical_engine(fd, e) {
+ engines[nengine] = e->flags;
+ names[nengine++] = e->name;
- time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
+ time = nop_on_ring(fd, handle, e, 1, &count) / count;
sum += time;
igt_debug("%s: %.3fus\n", e->name, 1e6*time);
}
@@ -490,6 +493,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
static void series(int fd, uint32_t handle, int timeout)
{
+ const struct intel_execution_engine2 *e;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
struct timespec start, now, sync;
@@ -500,8 +504,8 @@ static void series(int fd, uint32_t handle, int timeout)
const char *name;
nengine = 0;
- for_each_physical_engine(e, fd) {
- time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
+ __for_each_physical_engine(fd, e) {
+ time = nop_on_ring(fd, handle, e, 1, &count) / count;
if (time > max) {
name = e->name;
max = time;
@@ -509,7 +513,7 @@ static void series(int fd, uint32_t handle, int timeout)
if (time < min)
min = time;
sum += time;
- engines[nengine++] = eb_ring(e);
+ engines[nengine++] = e->flags;
}
igt_require(nengine);
igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
@@ -580,6 +584,7 @@ static void xchg(void *array, unsigned i, unsigned j)
static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
{
const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
+ const struct intel_execution_engine2 *e;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj[2];
unsigned engines[16];
@@ -595,14 +600,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
nengine = 0;
sum = 0;
- for_each_physical_engine(e, fd) {
+ __for_each_physical_engine(fd, e) {
unsigned long count;
- time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
+ time = nop_on_ring(fd, handle, e, 1, &count) / count;
sum += time;
igt_debug("%s: %.3fus\n", e->name, 1e6*time);
- engines[nengine++] = eb_ring(e);
+ engines[nengine++] = e->flags;
}
igt_require(nengine);
igt_info("Total (individual) execution latency %.3fus per cycle\n",
@@ -621,10 +626,8 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
igt_require(__gem_execbuf(fd, &execbuf) == 0);
if (flags & CONTEXT) {
- uint32_t id;
-
- igt_require(__gem_context_create(fd, &id) == 0);
- execbuf.rsvd1 = id;
+ gem_require_contexts(fd);
+ execbuf.rsvd1 = gem_context_clone_with_engines(fd, 0);
}
for (n = 0; n < nengine; n++) {
@@ -642,8 +645,10 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
obj[0].handle = gem_create(fd, 4096);
gem_execbuf(fd, &execbuf);
- if (flags & CONTEXT)
- execbuf.rsvd1 = gem_context_create(fd);
+ if (flags & CONTEXT) {
+ gem_require_contexts(fd);
+ execbuf.rsvd1 = gem_context_clone_with_engines(fd, 0);
+ }
hars_petruska_f54_1_random_perturb(child);
@@ -710,12 +715,13 @@ static bool fence_wait(int fence)
}
static void fence_signal(int fd, uint32_t handle,
- unsigned ring_id, const char *ring_name,
- int timeout)
+ const struct intel_execution_engine2 *ring_id,
+ const char *ring_name, int timeout)
{
#define NFENCES 512
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
+ struct intel_execution_engine2 *__e;
struct timespec start, now;
unsigned engines[16];
unsigned nengine;
@@ -725,12 +731,11 @@ static void fence_signal(int fd, uint32_t handle,
igt_require(gem_has_exec_fence(fd));
nengine = 0;
- if (ring_id == ALL_ENGINES) {
- for_each_physical_engine(e, fd)
- engines[nengine++] = eb_ring(e);
+ if (!ring_id) {
+ __for_each_physical_engine(fd, __e)
+ engines[nengine++] = __e->flags;
} else {
- gem_require_ring(fd, ring_id);
- engines[nengine++] = ring_id;
+ engines[nengine++] = ring_id->flags;
}
igt_require(nengine);
@@ -787,7 +792,7 @@ static void fence_signal(int fd, uint32_t handle,
}
static void preempt(int fd, uint32_t handle,
- unsigned ring_id, const char *ring_name)
+ const struct intel_execution_engine2 *e)
{
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
@@ -795,12 +800,10 @@ static void preempt(int fd, uint32_t handle,
unsigned long count;
uint32_t ctx[2];
- gem_require_ring(fd, ring_id);
-
- ctx[0] = gem_context_create(fd);
+ ctx[0] = gem_context_clone_with_engines(fd, 0);
gem_context_set_priority(fd, ctx[0], MIN_PRIO);
- ctx[1] = gem_context_create(fd);
+ ctx[1] = gem_context_clone_with_engines(fd, 0);
gem_context_set_priority(fd, ctx[1], MAX_PRIO);
memset(&obj, 0, sizeof(obj));
@@ -809,11 +812,11 @@ static void preempt(int fd, uint32_t handle,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
if (__gem_execbuf(fd, &execbuf)) {
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
gem_execbuf(fd, &execbuf);
}
execbuf.rsvd1 = ctx[1];
@@ -825,7 +828,7 @@ static void preempt(int fd, uint32_t handle,
igt_spin_t *spin =
__igt_spin_new(fd,
.ctx = ctx[0],
- .engine = ring_id);
+ .engine = e->flags);
for (int loop = 0; loop < 1024; loop++)
gem_execbuf(fd, &execbuf);
@@ -841,12 +844,12 @@ static void preempt(int fd, uint32_t handle,
gem_context_destroy(fd, ctx[0]);
igt_info("%s: %'lu cycles: %.3fus\n",
- ring_name, count, elapsed(&start, &now)*1e6 / count);
+ e->name, count, elapsed(&start, &now)*1e6 / count);
}
igt_main
{
- const struct intel_execution_engine *e;
+ const struct intel_execution_engine2 *e;
uint32_t handle = 0;
int device = -1;
@@ -873,15 +876,24 @@ igt_main
igt_subtest("basic-sequential")
sequential(device, handle, 0, 2);
- for (e = intel_execution_engines; e->name; e++) {
- igt_subtest_f("%s", e->name)
- single(device, handle, eb_ring(e), e->name);
- igt_subtest_f("signal-%s", e->name)
- fence_signal(device, handle, eb_ring(e), e->name, 2);
+ igt_subtest_with_dynamic("single") {
+ __for_each_physical_engine(device, e) {
+ igt_dynamic_f("%s", e->name)
+ single(device, handle, e);
+ }
+ }
+
+ igt_subtest_with_dynamic("signal") {
+ __for_each_physical_engine(device, e) {
+ igt_dynamic_f("%s", e->name)
+ fence_signal(device, handle, e,
+ e->name, 2);
+ }
}
igt_subtest("signal-all")
- fence_signal(device, handle, ALL_ENGINES, "all", 20);
+ /* NULL value means all engines */
+ fence_signal(device, handle, NULL, "all", 20);
igt_subtest("series")
series(device, handle, 20);
@@ -907,10 +919,11 @@ igt_main
igt_require(gem_scheduler_has_ctx_priority(device));
igt_require(gem_scheduler_has_preemption(device));
}
-
- for (e = intel_execution_engines; e->name; e++) {
- igt_subtest_f("preempt-%s", e->name)
- preempt(device, handle, eb_ring(e), e->name);
+ igt_subtest_with_dynamic("preempt") {
+ __for_each_physical_engine(device, e) {
+ igt_dynamic_f("%s", e->name)
+ preempt(device, handle, e);
+ }
}
}
@@ -919,19 +932,25 @@ igt_main
igt_device_set_master(device);
}
- for (e = intel_execution_engines; e->name; e++) {
- /* Requires master for STORE_DWORD on gen4/5 */
- igt_subtest_f("poll-%s", e->name)
- poll_ring(device, eb_ring(e), e->name, 20);
+ igt_subtest_with_dynamic("poll") {
+ __for_each_physical_engine(device, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ poll_ring(device, e, 20);
+ }
+ }
+
+ igt_subtest_with_dynamic("headless") {
+ __for_each_physical_engine(device, e) {
+ igt_dynamic_f("%s", e->name)
+ /* Requires master for changing display modes */
+ headless(device, handle, e);
+ }
}
igt_subtest("poll-sequential")
poll_sequential(device, "Sequential", 20);
- igt_subtest("headless") {
- /* Requires master for changing display modes */
- headless(device, handle);
- }
}
igt_fixture {
--
2.24.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [igt-dev] ✗ GitLab.Pipeline: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) 2020-01-29 3:26 [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Arjun Melkaveri @ 2020-01-29 3:53 ` Patchwork 2020-01-29 4:05 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-01-29 3:53 UTC (permalink / raw) To: Arjun Melkaveri; +Cc: igt-dev == Series Details == Series: i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) URL : https://patchwork.freedesktop.org/series/72334/ State : failure == Summary == ERROR! This series introduces new undocumented tests: gem_exec_nop@poll gem_exec_nop@preempt gem_exec_nop@signal gem_exec_nop@single Can you document them as per the requirement in the [CONTRIBUTING.md]? [Documentation] has more details on how to do this. Here are few examples: https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/0316695d03aa46108296b27f3982ec93200c7a6e https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/443cc658e1e6b492ee17bf4f4d891029eb7a205d Thanks in advance! [CONTRIBUTING.md]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/blob/master/CONTRIBUTING.md#L19 [Documentation]: https://drm.pages.freedesktop.org/igt-gpu-tools/igt-gpu-tools-Core.html#igt-describe Other than that, pipeline status: SUCCESS. see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/102528 for the overview. == Logs == For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/102528 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) 2020-01-29 3:26 [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Arjun Melkaveri 2020-01-29 3:53 ` [igt-dev] ✗ GitLab.Pipeline: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork @ 2020-01-29 4:05 ` Patchwork 2020-01-29 10:15 ` [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Tvrtko Ursulin 2020-01-31 2:50 ` [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-01-29 4:05 UTC (permalink / raw) To: Arjun Melkaveri; +Cc: igt-dev == Series Details == Series: i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) URL : https://patchwork.freedesktop.org/series/72334/ State : success == Summary == CI Bug Log - changes from IGT_5396 -> IGTPW_4023 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html Known issues ------------ Here are the changes found in IGTPW_4023 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_close_race@basic-threads: - fi-hsw-peppy: [PASS][1] -> [INCOMPLETE][2] ([i915#816]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-hsw-peppy/igt@gem_close_race@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-hsw-peppy/igt@gem_close_race@basic-threads.html * igt@gem_exec_parallel@fds: - fi-byt-n2820: [PASS][3] -> [TIMEOUT][4] ([fdo#112271]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-byt-n2820/igt@gem_exec_parallel@fds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-byt-n2820/igt@gem_exec_parallel@fds.html * igt@i915_selftest@live_gem_contexts: - fi-byt-n2820: [PASS][5] -> [DMESG-FAIL][6] ([i915#722]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html #### Possible fixes #### * igt@i915_selftest@live_blt: - fi-hsw-4770r: [DMESG-FAIL][7] ([i915#725]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-hsw-4770r/igt@i915_selftest@live_blt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-hsw-4770r/igt@i915_selftest@live_blt.html - fi-ivb-3770: [DMESG-FAIL][9] ([i915#563]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-ivb-3770/igt@i915_selftest@live_blt.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-ivb-3770/igt@i915_selftest@live_blt.html - fi-hsw-4770: [DMESG-FAIL][11] ([i915#725]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-hsw-4770/igt@i915_selftest@live_blt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@kms_chamelium@dp-edid-read: - fi-cml-u2: [FAIL][13] ([i915#217]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563 [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816 Participating hosts (49 -> 41) ------------------------------ Missing (8): fi-ilk-m540 fi-bdw-gvtdvm fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5396 -> IGTPW_4023 CI-20190529: 20190529 CI_DRM_7833: 8210f0f999e2d396a8611e0cabc2f6c6a52468de @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4023: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html IGT_5396: b85f96d6aa71795684b14d3b3d4c752dd61ff62e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@gem_exec_nop@poll +igt@gem_exec_nop@preempt +igt@gem_exec_nop@signal +igt@gem_exec_nop@single -igt@gem_exec_nop@blt -igt@gem_exec_nop@bsd -igt@gem_exec_nop@bsd1 -igt@gem_exec_nop@bsd2 -igt@gem_exec_nop@default -igt@gem_exec_nop@poll-blt -igt@gem_exec_nop@poll-bsd -igt@gem_exec_nop@poll-bsd1 -igt@gem_exec_nop@poll-bsd2 -igt@gem_exec_nop@poll-default -igt@gem_exec_nop@poll-render -igt@gem_exec_nop@poll-vebox -igt@gem_exec_nop@preempt-blt -igt@gem_exec_nop@preempt-bsd -igt@gem_exec_nop@preempt-bsd1 -igt@gem_exec_nop@preempt-bsd2 -igt@gem_exec_nop@preempt-default -igt@gem_exec_nop@preempt-render -igt@gem_exec_nop@preempt-vebox -igt@gem_exec_nop@render -igt@gem_exec_nop@signal-blt -igt@gem_exec_nop@signal-bsd -igt@gem_exec_nop@signal-bsd1 -igt@gem_exec_nop@signal-bsd2 -igt@gem_exec_nop@signal-default -igt@gem_exec_nop@signal-render -igt@gem_exec_nop@signal-vebox -igt@gem_exec_nop@vebox == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines 2020-01-29 3:26 [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Arjun Melkaveri 2020-01-29 3:53 ` [igt-dev] ✗ GitLab.Pipeline: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork 2020-01-29 4:05 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork @ 2020-01-29 10:15 ` Tvrtko Ursulin 2020-01-31 2:50 ` [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Tvrtko Ursulin @ 2020-01-29 10:15 UTC (permalink / raw) To: Arjun Melkaveri, igt-dev On 29/01/2020 03:26, Arjun Melkaveri wrote: > Added __for_each_physical_engine to utilize all available engines. > Moved single, signal, preempt, poll and headless test cases > from static to dynamic group. > > Cc: Dec Katarzyna <katarzyna.dec@intel.com> > Cc: Kempczynski Zbigniew <zbigniew.kempczynski@intel.com> > Cc: Tahvanainen Jari <jari.tahvanainen@intel.com> > Cc: Ursulin Tvrtko <tvrtko.ursulin@intel.com> > Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com> > --- > V1 -> V2 > > Addressed Tvrtko review comments > 1) removed gem_require_ring > 2) replaced gem_can_store_dword with gem_class_can_store_dword > 3) Fixed WhiteSpace issues. > --- > V2 -> V3 > > Added back missing code. i.e. MIN_PRIO > --- > V3 -> V4 > > 1) Added gem_context_set_all_engines , that was deleted accidentally > 2) Removed gem_require_ring from fence_signal > 3) Passing NULL in fence_signal to run test for all engines. > --- > V4 -> V5 > > Used gem_context_clone_with_engines for creating contexts > --- > V5 -> V6 > > Added missing code to check context support. gem_context_clone_with_engines > checks this by calling gem_context_create having igt_assert_eq for > __gem_context_create. > --- > V6 -> V7 > > Minor correction related to check context support. > --- > V7 -> V8 > > Used gem_require_contexts to check requirement of Context support. > gem_require_contexts has igt_require(gem_has_contexts(fd)) which > would skip test when condition is not met. > --- > tests/i915/gem_exec_nop.c | 173 +++++++++++++++++++++----------------- > 1 file changed, 96 insertions(+), 77 deletions(-) > > diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c > index 9a2efd32..ed9568e5 100644 > --- a/tests/i915/gem_exec_nop.c > +++ b/tests/i915/gem_exec_nop.c > @@ -66,8 +66,9 @@ static double elapsed(const struct timespec *start, const struct timespec *end) > (end->tv_nsec - start->tv_nsec)*1e-9); > } > > -static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id, > - int timeout, unsigned long *out) > +static double nop_on_ring(int fd, uint32_t handle, > + const struct intel_execution_engine2 *e, int timeout, > + unsigned long *out) > { > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj; > @@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id, > memset(&execbuf, 0, sizeof(execbuf)); > execbuf.buffers_ptr = to_user_pointer(&obj); > execbuf.buffer_count = 1; > - execbuf.flags = ring_id; > + execbuf.flags = e->flags; > execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; > execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; > if (__gem_execbuf(fd, &execbuf)) { > - execbuf.flags = ring_id; > + execbuf.flags = e->flags; > gem_execbuf(fd, &execbuf); > } > intel_detect_and_clear_missed_interrupts(fd); > @@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id, > return elapsed(&start, &now); > } > > -static void poll_ring(int fd, unsigned engine, const char *name, int timeout) > +static void poll_ring(int fd, const struct intel_execution_engine2 *e, > + int timeout) > { > const int gen = intel_gen(intel_get_drm_devid(fd)); > const uint32_t MI_ARB_CHK = 0x5 << 23; > @@ -121,9 +123,8 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout) > if (gen == 4 || gen == 5) > flags |= I915_EXEC_SECURE; > > - gem_require_ring(fd, engine); > - igt_require(gem_can_store_dword(fd, engine)); > - igt_require(gem_engine_has_mutable_submission(fd, engine)); > + igt_require(gem_class_can_store_dword(fd, e->class)); > + igt_require(gem_class_has_mutable_submission(fd, e->class)); > > memset(&obj, 0, sizeof(obj)); > obj.handle = gem_create(fd, 4096); > @@ -187,7 +188,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout) > memset(&execbuf, 0, sizeof(execbuf)); > execbuf.buffers_ptr = to_user_pointer(&obj); > execbuf.buffer_count = 1; > - execbuf.flags = engine | flags; > + execbuf.flags = e->flags | flags; > > cycles = 0; > do { > @@ -209,7 +210,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout) > gem_sync(fd, obj.handle); > > igt_info("%s completed %ld cycles: %.3f us\n", > - name, cycles, elapsed*1e-3/cycles); > + e->name, cycles, elapsed*1e-3/cycles); > > munmap(batch, 4096); > gem_close(fd, obj.handle); > @@ -218,6 +219,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout) > static void poll_sequential(int fd, const char *name, int timeout) > { > const int gen = intel_gen(intel_get_drm_devid(fd)); > + const struct intel_execution_engine2 *e; > const uint32_t MI_ARB_CHK = 0x5 << 23; > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj[2]; > @@ -234,13 +236,14 @@ static void poll_sequential(int fd, const char *name, int timeout) > flags |= I915_EXEC_SECURE; > > nengine = 0; > - for_each_physical_engine(e, fd) { > - if (!gem_can_store_dword(fd, eb_ring(e)) || > - !gem_engine_has_mutable_submission(fd, eb_ring(e))) > + __for_each_physical_engine(fd, e) { > + if (!gem_class_can_store_dword(fd, e->class) || > + !gem_class_has_mutable_submission(fd, e->class)) > continue; > > - engines[nengine++] = eb_ring(e); > + engines[nengine++] = e->flags; > } > + > igt_require(nengine); > > memset(obj, 0, sizeof(obj)); > @@ -344,21 +347,20 @@ static void poll_sequential(int fd, const char *name, int timeout) > } > > static void single(int fd, uint32_t handle, > - unsigned ring_id, const char *ring_name) > + const struct intel_execution_engine2 *e) > { > double time; > unsigned long count; > > - gem_require_ring(fd, ring_id); > - > - time = nop_on_ring(fd, handle, ring_id, 20, &count); > + time = nop_on_ring(fd, handle, e, 20, &count); > igt_info("%s: %'lu cycles: %.3fus\n", > - ring_name, count, time*1e6 / count); > + e->name, count, time*1e6 / count); > } > > static double > -stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine, > - int timeout, int reps) > +stable_nop_on_ring(int fd, uint32_t handle, > + const struct intel_execution_engine2 *e, int timeout, > + int reps) > { > igt_stats_t s; > double n; > @@ -372,7 +374,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine, > unsigned long count; > double time; > > - time = nop_on_ring(fd, handle, engine, timeout, &count); > + time = nop_on_ring(fd, handle, e, timeout, &count); > igt_stats_push_float(&s, time / count); > } > > @@ -388,7 +390,8 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine, > "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\ > #x, #ref, x, tolerance * 100.0, ref) > > -static void headless(int fd, uint32_t handle) > +static void headless(int fd, uint32_t handle, > + const struct intel_execution_engine2 *e) > { > unsigned int nr_connected = 0; > drmModeConnector *connector; > @@ -411,7 +414,7 @@ static void headless(int fd, uint32_t handle) > kmstest_set_vt_graphics_mode(); > > /* benchmark nops */ > - n_display = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5); > + n_display = stable_nop_on_ring(fd, handle, e, 1, 5); > igt_info("With one display connected: %.2fus\n", > n_display * 1e6); > > @@ -419,7 +422,7 @@ static void headless(int fd, uint32_t handle) > kmstest_unset_all_crtcs(fd, res); > > /* benchmark nops again */ > - n_headless = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5); > + n_headless = stable_nop_on_ring(fd, handle, e, 1, 5); > igt_info("Without a display connected (headless): %.2fus\n", > n_headless * 1e6); > > @@ -429,6 +432,7 @@ static void headless(int fd, uint32_t handle) > > static void parallel(int fd, uint32_t handle, int timeout) > { > + const struct intel_execution_engine2 *e; > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj; > unsigned engines[16]; > @@ -439,12 +443,11 @@ static void parallel(int fd, uint32_t handle, int timeout) > > sum = 0; > nengine = 0; > - for_each_physical_engine(e, fd) { > - engines[nengine] = eb_ring(e); > - names[nengine] = e->name; > - nengine++; > + __for_each_physical_engine(fd, e) { > + engines[nengine] = e->flags; > + names[nengine++] = e->name; > > - time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count; > + time = nop_on_ring(fd, handle, e, 1, &count) / count; > sum += time; > igt_debug("%s: %.3fus\n", e->name, 1e6*time); > } > @@ -490,6 +493,7 @@ static void parallel(int fd, uint32_t handle, int timeout) > > static void series(int fd, uint32_t handle, int timeout) > { > + const struct intel_execution_engine2 *e; > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj; > struct timespec start, now, sync; > @@ -500,8 +504,8 @@ static void series(int fd, uint32_t handle, int timeout) > const char *name; > > nengine = 0; > - for_each_physical_engine(e, fd) { > - time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count; > + __for_each_physical_engine(fd, e) { > + time = nop_on_ring(fd, handle, e, 1, &count) / count; > if (time > max) { > name = e->name; > max = time; > @@ -509,7 +513,7 @@ static void series(int fd, uint32_t handle, int timeout) > if (time < min) > min = time; > sum += time; > - engines[nengine++] = eb_ring(e); > + engines[nengine++] = e->flags; > } > igt_require(nengine); > igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n", > @@ -580,6 +584,7 @@ static void xchg(void *array, unsigned i, unsigned j) > static void sequential(int fd, uint32_t handle, unsigned flags, int timeout) > { > const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1; > + const struct intel_execution_engine2 *e; > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj[2]; > unsigned engines[16]; > @@ -595,14 +600,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout) > > nengine = 0; > sum = 0; > - for_each_physical_engine(e, fd) { > + __for_each_physical_engine(fd, e) { > unsigned long count; > > - time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count; > + time = nop_on_ring(fd, handle, e, 1, &count) / count; > sum += time; > igt_debug("%s: %.3fus\n", e->name, 1e6*time); > > - engines[nengine++] = eb_ring(e); > + engines[nengine++] = e->flags; > } > igt_require(nengine); > igt_info("Total (individual) execution latency %.3fus per cycle\n", > @@ -621,10 +626,8 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout) > igt_require(__gem_execbuf(fd, &execbuf) == 0); > > if (flags & CONTEXT) { > - uint32_t id; > - > - igt_require(__gem_context_create(fd, &id) == 0); > - execbuf.rsvd1 = id; > + gem_require_contexts(fd); > + execbuf.rsvd1 = gem_context_clone_with_engines(fd, 0); > } > > for (n = 0; n < nengine; n++) { > @@ -642,8 +645,10 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout) > obj[0].handle = gem_create(fd, 4096); > gem_execbuf(fd, &execbuf); > > - if (flags & CONTEXT) > - execbuf.rsvd1 = gem_context_create(fd); > + if (flags & CONTEXT) { > + gem_require_contexts(fd); > + execbuf.rsvd1 = gem_context_clone_with_engines(fd, 0); > + } > > hars_petruska_f54_1_random_perturb(child); > > @@ -710,12 +715,13 @@ static bool fence_wait(int fence) > } > > static void fence_signal(int fd, uint32_t handle, > - unsigned ring_id, const char *ring_name, > - int timeout) > + const struct intel_execution_engine2 *ring_id, > + const char *ring_name, int timeout) > { > #define NFENCES 512 > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj; > + struct intel_execution_engine2 *__e; > struct timespec start, now; > unsigned engines[16]; > unsigned nengine; > @@ -725,12 +731,11 @@ static void fence_signal(int fd, uint32_t handle, > igt_require(gem_has_exec_fence(fd)); > > nengine = 0; > - if (ring_id == ALL_ENGINES) { > - for_each_physical_engine(e, fd) > - engines[nengine++] = eb_ring(e); > + if (!ring_id) { > + __for_each_physical_engine(fd, __e) > + engines[nengine++] = __e->flags; > } else { > - gem_require_ring(fd, ring_id); > - engines[nengine++] = ring_id; > + engines[nengine++] = ring_id->flags; > } > igt_require(nengine); > > @@ -787,7 +792,7 @@ static void fence_signal(int fd, uint32_t handle, > } > > static void preempt(int fd, uint32_t handle, > - unsigned ring_id, const char *ring_name) > + const struct intel_execution_engine2 *e) > { > struct drm_i915_gem_execbuffer2 execbuf; > struct drm_i915_gem_exec_object2 obj; > @@ -795,12 +800,10 @@ static void preempt(int fd, uint32_t handle, > unsigned long count; > uint32_t ctx[2]; > > - gem_require_ring(fd, ring_id); > - > - ctx[0] = gem_context_create(fd); > + ctx[0] = gem_context_clone_with_engines(fd, 0); > gem_context_set_priority(fd, ctx[0], MIN_PRIO); > > - ctx[1] = gem_context_create(fd); > + ctx[1] = gem_context_clone_with_engines(fd, 0); > gem_context_set_priority(fd, ctx[1], MAX_PRIO); > > memset(&obj, 0, sizeof(obj)); > @@ -809,11 +812,11 @@ static void preempt(int fd, uint32_t handle, > memset(&execbuf, 0, sizeof(execbuf)); > execbuf.buffers_ptr = to_user_pointer(&obj); > execbuf.buffer_count = 1; > - execbuf.flags = ring_id; > + execbuf.flags = e->flags; > execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT; > execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC; > if (__gem_execbuf(fd, &execbuf)) { > - execbuf.flags = ring_id; > + execbuf.flags = e->flags; > gem_execbuf(fd, &execbuf); > } > execbuf.rsvd1 = ctx[1]; > @@ -825,7 +828,7 @@ static void preempt(int fd, uint32_t handle, > igt_spin_t *spin = > __igt_spin_new(fd, > .ctx = ctx[0], > - .engine = ring_id); > + .engine = e->flags); > > for (int loop = 0; loop < 1024; loop++) > gem_execbuf(fd, &execbuf); > @@ -841,12 +844,12 @@ static void preempt(int fd, uint32_t handle, > gem_context_destroy(fd, ctx[0]); > > igt_info("%s: %'lu cycles: %.3fus\n", > - ring_name, count, elapsed(&start, &now)*1e6 / count); > + e->name, count, elapsed(&start, &now)*1e6 / count); > } > > igt_main > { > - const struct intel_execution_engine *e; > + const struct intel_execution_engine2 *e; > uint32_t handle = 0; > int device = -1; > > @@ -873,15 +876,24 @@ igt_main > igt_subtest("basic-sequential") > sequential(device, handle, 0, 2); > > - for (e = intel_execution_engines; e->name; e++) { > - igt_subtest_f("%s", e->name) > - single(device, handle, eb_ring(e), e->name); > - igt_subtest_f("signal-%s", e->name) > - fence_signal(device, handle, eb_ring(e), e->name, 2); > + igt_subtest_with_dynamic("single") { > + __for_each_physical_engine(device, e) { > + igt_dynamic_f("%s", e->name) > + single(device, handle, e); > + } > + } > + > + igt_subtest_with_dynamic("signal") { > + __for_each_physical_engine(device, e) { > + igt_dynamic_f("%s", e->name) > + fence_signal(device, handle, e, > + e->name, 2); > + } > } > > igt_subtest("signal-all") > - fence_signal(device, handle, ALL_ENGINES, "all", 20); > + /* NULL value means all engines */ > + fence_signal(device, handle, NULL, "all", 20); > > igt_subtest("series") > series(device, handle, 20); > @@ -907,10 +919,11 @@ igt_main > igt_require(gem_scheduler_has_ctx_priority(device)); > igt_require(gem_scheduler_has_preemption(device)); > } > - > - for (e = intel_execution_engines; e->name; e++) { > - igt_subtest_f("preempt-%s", e->name) > - preempt(device, handle, eb_ring(e), e->name); > + igt_subtest_with_dynamic("preempt") { > + __for_each_physical_engine(device, e) { > + igt_dynamic_f("%s", e->name) > + preempt(device, handle, e); > + } > } > } > > @@ -919,19 +932,25 @@ igt_main > igt_device_set_master(device); > } > > - for (e = intel_execution_engines; e->name; e++) { > - /* Requires master for STORE_DWORD on gen4/5 */ > - igt_subtest_f("poll-%s", e->name) > - poll_ring(device, eb_ring(e), e->name, 20); > + igt_subtest_with_dynamic("poll") { > + __for_each_physical_engine(device, e) { > + /* Requires master for STORE_DWORD on gen4/5 */ > + igt_dynamic_f("%s", e->name) > + poll_ring(device, e, 20); > + } > + } > + > + igt_subtest_with_dynamic("headless") { > + __for_each_physical_engine(device, e) { > + igt_dynamic_f("%s", e->name) > + /* Requires master for changing display modes */ > + headless(device, handle, e); > + } > } > > igt_subtest("poll-sequential") > poll_sequential(device, "Sequential", 20); > > - igt_subtest("headless") { > - /* Requires master for changing display modes */ > - headless(device, handle); > - } > } > > igt_fixture { > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) 2020-01-29 3:26 [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Arjun Melkaveri ` (2 preceding siblings ...) 2020-01-29 10:15 ` [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Tvrtko Ursulin @ 2020-01-31 2:50 ` Patchwork 2020-01-31 10:15 ` Tvrtko Ursulin 3 siblings, 1 reply; 6+ messages in thread From: Patchwork @ 2020-01-31 2:50 UTC (permalink / raw) To: Arjun Melkaveri; +Cc: igt-dev == Series Details == Series: i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) URL : https://patchwork.freedesktop.org/series/72334/ State : failure == Summary == CI Bug Log - changes from IGT_5396_full -> IGTPW_4023_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_4023_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_4023_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_4023_full: ### IGT changes ### #### Possible regressions #### * igt@gem_partial_pwrite_pread@writes-after-reads: - shard-hsw: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-hsw6/igt@gem_partial_pwrite_pread@writes-after-reads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-hsw2/igt@gem_partial_pwrite_pread@writes-after-reads.html Known issues ------------ Here are the changes found in IGTPW_4023_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +13 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb4/igt@gem_busy@busy-vcs1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb7/igt@gem_busy@busy-vcs1.html * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +8 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-kbl3/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_persistence@vcs1-mixed: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [fdo#112080]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb1/igt@gem_ctx_persistence@vcs1-mixed.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb7/igt@gem_ctx_persistence@vcs1-mixed.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#110854]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb1/igt@gem_exec_balancer@smoke.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb3/igt@gem_exec_balancer@smoke.html * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-apl: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-apl4/igt@gem_ppgtt@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-apl7/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#454]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb1/igt@i915_pm_dc@dc6-dpms.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_rps@waitboost: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#413]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb8/igt@i915_pm_rps@waitboost.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb3/igt@i915_pm_rps@waitboost.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +3 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-apl2/igt@i915_suspend@fence-restore-tiled2untiled.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_cursor_crc@pipe-c-cursor-128x42-random: - shard-apl: [PASS][21] -> [FAIL][22] ([i915#54]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html - shard-glk: [PASS][23] -> [FAIL][24] ([i915#54]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-glk9/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-glk5/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html - shard-kbl: [PASS][25] -> [FAIL][26] ([i915#54]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html * igt@kms_flip@2x-plain-flip-ts-check: - shard-glk: [PASS][27] -> [FAIL][28] ([i915#34]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-glk4/igt@kms_flip@2x-plain-flip-ts-check.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-glk2/igt@kms_flip@2x-plain-flip-ts-check.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +3 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@prime_mmap_coherency@write: - shard-hsw: [PASS][31] -> [FAIL][32] ([i915#914]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-hsw2/igt@prime_mmap_coherency@write.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-hsw1/igt@prime_mmap_coherency@write.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109276]) +13 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb7/igt@prime_vgem@fence-wait-bsd2.html #### Possible fixes #### * {igt@gem_ctx_persistence@hang}: - shard-kbl: [FAIL][35] ([i915#1074]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-kbl1/igt@gem_ctx_persistence@hang.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-kbl2/igt@gem_ctx_persistence@hang.html * igt@gem_ctx_persistence@vcs1-hostile-preempt: - shard-iclb: [SKIP][37] ([fdo#109276] / [fdo#112080]) -> [PASS][38] +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb3/igt@gem_ctx_persistence@vcs1-hostile-preempt.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb4/igt@gem_ctx_persistence@vcs1-hostile-preempt.html * igt@gem_ctx_shared@exec-shared-gtt-bsd: - shard-tglb: [FAIL][39] ([i915#616]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-tglb1/igt@gem_ctx_shared@exec-shared-gtt-bsd.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-tglb1/igt@gem_ctx_shared@exec-shared-gtt-bsd.html * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [SKIP][41] ([fdo#110841]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_parallel@rcs0-fds: - shard-hsw: [INCOMPLETE][43] ([i915#61]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-hsw2/igt@gem_exec_parallel@rcs0-fds.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-hsw8/igt@gem_exec_parallel@rcs0-fds.html * igt@gem_exec_schedule@pi-shared-iova-bsd: - shard-iclb: [SKIP][45] ([i915#677]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb3/igt@gem_exec_schedule@pi-shared-iova-bsd.html * igt@gem_exec_schedule@promotion-bsd1: - shard-iclb: [SKIP][47] ([fdo#109276]) -> [PASS][48] +17 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb5/igt@gem_exec_schedule@promotion-bsd1.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [SKIP][49] ([fdo#112146]) -> [PASS][50] +6 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb4/igt@gem_exec_schedule@reorder-wide-bsd.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb7/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_softpin@noreloc-s3: - shard-apl: [DMESG-WARN][51] ([i915#180]) -> [PASS][52] +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-apl6/igt@gem_softpin@noreloc-s3.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-apl7/igt@gem_softpin@noreloc-s3.html * igt@gem_workarounds@suspend-resume: - shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +2 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-kbl4/igt@gem_workarounds@suspend-resume.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-kbl1/igt@gem_workarounds@suspend-resume.html * igt@gen7_exec_parse@basic-allocation: - shard-hsw: [FAIL][55] ([i915#694]) -> [PASS][56] +3 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-hsw6/igt@gen7_exec_parse@basic-allocation.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-hsw1/igt@gen7_exec_parse@basic-allocation.html * igt@gen9_exec_parse@allowed-all: - shard-glk: [INCOMPLETE][57] ([i915#58] / [k.org#198133]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-glk8/igt@gen9_exec_parse@allowed-all.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-glk4/igt@gen9_exec_parse@allowed-all.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][59] ([i915#79]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [SKIP][61] ([fdo#109441]) -> [PASS][62] +5 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html * igt@perf@disabled-read-error: - shard-iclb: [DMESG-WARN][63] ([i915#645]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb2/igt@perf@disabled-read-error.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb3/igt@perf@disabled-read-error.html * igt@perf_pmu@busy-no-semaphores-vcs1: - shard-iclb: [SKIP][65] ([fdo#112080]) -> [PASS][66] +15 similar issues [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-iclb7/igt@perf_pmu@busy-no-semaphores-vcs1.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html * igt@prime_mmap_coherency@read: - shard-hsw: [FAIL][67] ([i915#914]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-hsw1/igt@prime_mmap_coherency@read.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-hsw7/igt@prime_mmap_coherency@read.html #### Warnings #### * igt@gem_eio@in-flight-10ms: - shard-apl: [INCOMPLETE][69] ([CI#80] / [fdo#103927]) -> [TIMEOUT][70] ([fdo#112271]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-apl4/igt@gem_eio@in-flight-10ms.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-apl3/igt@gem_eio@in-flight-10ms.html * igt@gem_eio@kms: - shard-apl: [INCOMPLETE][71] ([CI#80] / [fdo#103927]) -> [INCOMPLETE][72] ([fdo#103927]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-apl1/igt@gem_eio@kms.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-apl8/igt@gem_eio@kms.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup: - shard-snb: [DMESG-WARN][73] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][74] ([fdo#111870] / [i915#478]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html * igt@perf@gen12-mi-rpc: - shard-tglb: [TIMEOUT][75] ([fdo#112271] / [i915#472]) -> [TIMEOUT][76] ([fdo#112271] / [i915#1085] / [i915#472]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-tglb2/igt@perf@gen12-mi-rpc.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-tglb3/igt@perf@gen12-mi-rpc.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1074]: https://gitlab.freedesktop.org/drm/intel/issues/1074 [i915#1085]: https://gitlab.freedesktop.org/drm/intel/issues/1085 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34 [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472 [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58 [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61 [i915#616]: https://gitlab.freedesktop.org/drm/intel/issues/616 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#645]: https://gitlab.freedesktop.org/drm/intel/issues/645 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#914]: https://gitlab.freedesktop.org/drm/intel/issues/914 [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 Participating hosts (8 -> 8) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5396 -> IGTPW_4023 CI-20190529: 20190529 CI_DRM_7833: 8210f0f999e2d396a8611e0cabc2f6c6a52468de @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4023: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html IGT_5396: b85f96d6aa71795684b14d3b3d4c752dd61ff62e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) 2020-01-31 2:50 ` [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork @ 2020-01-31 10:15 ` Tvrtko Ursulin 0 siblings, 0 replies; 6+ messages in thread From: Tvrtko Ursulin @ 2020-01-31 10:15 UTC (permalink / raw) To: igt-dev, Patchwork, Arjun Melkaveri On 31/01/2020 02:50, Patchwork wrote: > == Series Details == > > Series: i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) > URL : https://patchwork.freedesktop.org/series/72334/ > State : failure > > == Summary == > > CI Bug Log - changes from IGT_5396_full -> IGTPW_4023_full > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with IGTPW_4023_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in IGTPW_4023_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/index.html > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in IGTPW_4023_full: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@gem_partial_pwrite_pread@writes-after-reads: > - shard-hsw: [PASS][1] -> [FAIL][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5396/shard-hsw6/igt@gem_partial_pwrite_pread@writes-after-reads.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4023/shard-hsw2/igt@gem_partial_pwrite_pread@writes-after-reads.html Unrelated so pushed. Regards, Tvrtko _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-01-31 10:15 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-01-29 3:26 [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Arjun Melkaveri 2020-01-29 3:53 ` [igt-dev] ✗ GitLab.Pipeline: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork 2020-01-29 4:05 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork 2020-01-29 10:15 ` [igt-dev] [PATCH V8] i915/gem_exec_nop:Adjusted test to utilize all available engines Tvrtko Ursulin 2020-01-31 2:50 ` [igt-dev] ✗ Fi.CI.IGT: failure for i915/gem_exec_nop:Adjusted test to utilize all available engines (rev8) Patchwork 2020-01-31 10:15 ` Tvrtko Ursulin
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