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From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "igt-dev@lists.freedesktop.org" <igt-dev@lists.freedesktop.org>
Subject: Re: [igt-dev] [PATCH i-g-t 3/6] tools/intel_watermark: Decode wm blocks correctly
Date: Tue, 29 Jan 2019 20:45:38 +0000	[thread overview]
Message-ID: <0f21ace4b347e74fe5b480b3fb31c8e27fc66bc0.camel@intel.com> (raw)
In-Reply-To: <20190129132344.GX20097@intel.com>


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On Tue, 2019-01-29 at 15:23 +0200, Ville Syrjälä wrote:
> On Mon, Jan 28, 2019 at 10:30:18PM +0000, Souza, Jose wrote:
> > On Mon, 2019-01-28 at 22:01 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Bump up the width of the wm blocks to 11 bits, which it is on
> > > icl.
> > > On earlier platforms it was actually 10 bits but the code decoded
> > > it as 9 bits.
> > 
> > 11? Where did you get that? BSpec says ICL still uses 10 bits and
> > kernel is also using 10 bits for ICL.
> > BSpec: 7670
> 
> My bspec clearly says 11. Are you looking at the pre-icl field?

My bad, this is right.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> I guess I'll have to go fix the kernel too then.

Cc me or if you want I can send this patch.

> 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  tools/intel_watermark.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> > > index c98b8649cc9c..97b769250927 100644
> > > --- a/tools/intel_watermark.c
> > > +++ b/tools/intel_watermark.c
> > > @@ -319,7 +319,7 @@ static void skl_wm_dump(void)
> > >  		for (level = 0; level < num_levels; level++) {
> > >  			printf("%5d", level);
> > >  			for (plane = 0; plane < num_planes; plane++) {
> > > -				blocks =
> > > REG_DECODE1(wm[level][pipe][plane], 0, 9);
> > > +				blocks =
> > > REG_DECODE1(wm[level][pipe][plane], 0, 11);
> > >  				lines =
> > > REG_DECODE1(wm[level][pipe][plane], 14, 5);
> > >  				enable =
> > > REG_DECODE1(wm[level][pipe][plane], 31, 1);
> > >  
> > > @@ -334,7 +334,7 @@ static void skl_wm_dump(void)
> > >  
> > >  		printf("TRANS");
> > >  		for (plane = 0; plane < num_planes; plane++) {
> > > -			blocks = REG_DECODE1(wm_trans[pipe][plane], 0,
> > > 9);
> > > +			blocks = REG_DECODE1(wm_trans[pipe][plane], 0,
> > > 11);
> > >  			lines = REG_DECODE1(wm_trans[pipe][plane], 14,
> > > 5);
> > >  			enable = REG_DECODE1(wm_trans[pipe][plane], 31,
> > > 1);
> > >  
> 
> 

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  reply	other threads:[~2019-01-29 20:45 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-28 20:01 [igt-dev] [PATCH i-g-t 1/6] tools/intel_watermark: Bump number of planes to 8 for icl Ville Syrjala
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 2/6] tools/intel_watermark: More biths for PLANE_BUF_CFG Ville Syrjala
2019-01-28 22:19   ` Souza, Jose
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 3/6] tools/intel_watermark: Decode wm blocks correctly Ville Syrjala
2019-01-28 22:30   ` Souza, Jose
2019-01-29 13:23     ` Ville Syrjälä
2019-01-29 20:45       ` Souza, Jose [this message]
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 4/6] tools/intel_watermark: Show whether each plane is enabled Ville Syrjala
2019-01-28 22:53   ` Souza, Jose
2019-01-29 13:30     ` Ville Syrjälä
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 5/6] tools/intel_watermark: Dump NV12_BUF_CFG Ville Syrjala
2019-02-07  0:19   ` Souza, Jose
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 6/6] tools/intel_watermark: Clean up the platform checks in the ilk+ code Ville Syrjala
2019-01-28 22:16   ` Souza, Jose
2019-01-28 20:32 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] tools/intel_watermark: Bump number of planes to 8 for icl Patchwork
2019-01-28 22:16 ` [igt-dev] [PATCH i-g-t 1/6] " Souza, Jose
2019-01-29  3:25 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/6] " Patchwork

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