From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
"igt-dev@lists.freedesktop.org" <igt-dev@lists.freedesktop.org>
Subject: Re: [igt-dev] [PATCH i-g-t 6/6] tools/intel_watermark: Clean up the platform checks in the ilk+ code
Date: Mon, 28 Jan 2019 22:16:31 +0000 [thread overview]
Message-ID: <851ad1537ad97fc297badbff122e9f33682b24c0.camel@intel.com> (raw)
In-Reply-To: <20190128200126.1270-6-ville.syrjala@linux.intel.com>
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On Mon, 2019-01-28 at 22:01 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Replace the old hand rolled platform check funcs with somehting
> more standard.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_watermark.c | 42 ++++++++++++++++-----------------------
> --
> 1 file changed, 16 insertions(+), 26 deletions(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 6a47b33c438c..e71c3d9cff6d 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -125,16 +125,6 @@ static char endis_ast(bool enabled)
> return enabled ? '*' : ' ';
> }
>
> -static int is_gen7_plus(uint32_t d)
> -{
> - return !(IS_GEN5(d) || IS_GEN6(d));
> -}
> -
> -static int is_hsw_plus(uint32_t d)
> -{
> - return !(IS_GEN5(d) || IS_GEN6(d) || IS_IVYBRIDGE(d));
> -}
> -
> static int skl_num_planes(uint32_t d, int pipe)
> {
> if (IS_GEN11(d))
> @@ -476,14 +466,14 @@ static void ilk_wm_dump(void)
> uint32_t wm_lp[3];
> uint32_t wm_lp_spr[3];
> uint32_t arb_ctl, arb_ctl2, wm_misc = 0;
> - int num_pipes = is_gen7_plus(devid) ? 3 : 2;
> + int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
> struct ilk_wm wm = {};
>
> intel_register_access_init(intel_get_pci_device(), 0, -1);
>
> for (i = 0; i < num_pipes; i++) {
> dspcntr[i] = read_reg(0x70180 + i * 0x1000);
> - if (is_gen7_plus(devid))
> + if (intel_gen(devid) >= 7)
> spcntr[i] = read_reg(0x70280 + i * 0x1000);
> else
> spcntr[i] = read_reg(0x72180 + i * 0x1000);
> @@ -494,7 +484,7 @@ static void ilk_wm_dump(void)
> if (num_pipes == 3)
> wm_pipe[2] = read_reg(0x45200);
>
> - if (is_hsw_plus(devid)) {
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> wm_linetime[0] = read_reg(0x45270);
> wm_linetime[1] = read_reg(0x45274);
> wm_linetime[2] = read_reg(0x45278);
> @@ -505,21 +495,21 @@ static void ilk_wm_dump(void)
> wm_lp[2] = read_reg(0x45110);
>
> wm_lp_spr[0] = read_reg(0x45120);
> - if (is_gen7_plus(devid)) {
> + if (intel_gen(devid) >= 7) {
> wm_lp_spr[1] = read_reg(0x45124);
> wm_lp_spr[2] = read_reg(0x45128);
> }
>
> arb_ctl = read_reg(0x45000);
> arb_ctl2 = read_reg(0x45004);
> - if (is_hsw_plus(devid))
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid))
> wm_misc = read_reg(0x45260);
>
> intel_register_access_fini();
>
> for (i = 0; i < num_pipes; i++)
> printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i),
> wm_pipe[i]);
> - if (is_hsw_plus(devid)) {
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> for (i = 0; i < num_pipes; i++)
> printf("WM_LINETIME_%c = 0x%08x\n",
> pipe_name(i), wm_linetime[i]);
> }
> @@ -527,13 +517,13 @@ static void ilk_wm_dump(void)
> printf(" WM_LP2 = 0x%08x\n", wm_lp[1]);
> printf(" WM_LP3 = 0x%08x\n", wm_lp[2]);
> printf(" WM_LP1_SPR = 0x%08x\n", wm_lp_spr[0]);
> - if (is_gen7_plus(devid)) {
> + if (intel_gen(devid) >= 7) {
> printf(" WM_LP2_SPR = 0x%08x\n", wm_lp_spr[1]);
> printf(" WM_LP3_SPR = 0x%08x\n", wm_lp_spr[2]);
> }
> printf(" ARB_CTL = 0x%08x\n", arb_ctl);
> printf(" ARB_CTL2 = 0x%08x\n", arb_ctl2);
> - if (is_hsw_plus(devid))
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid))
> printf(" WM_MISC = 0x%08x\n", wm_misc);
>
> for (i = 0 ; i < num_pipes; i++) {
> @@ -541,7 +531,7 @@ static void ilk_wm_dump(void)
> wm.pipe[i].sprite = REG_DECODE1(wm_pipe[i], 8, 8);
> wm.pipe[i].cursor = REG_DECODE1(wm_pipe[i], 0, 6);
>
> - if (is_hsw_plus(devid)) {
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> wm.linetime[i].linetime =
> REG_DECODE1(wm_linetime[i], 0, 9);
> wm.linetime[i].ips =
> REG_DECODE1(wm_linetime[i], 16, 9);
> }
> @@ -556,15 +546,15 @@ static void ilk_wm_dump(void)
> for (i = 0; i < 3; i++) {
> wm.lp[i].enabled = REG_DECODE1(wm_lp[i], 31, 1);
> wm.lp[i].latency = REG_DECODE1(wm_lp[i], 24, 7);
> - if (IS_GEN8(devid))
> + if (IS_BROADWELL(devid))
> wm.lp[i].fbc = REG_DECODE1(wm_lp[i], 19, 5);
> else
> wm.lp[i].fbc = REG_DECODE1(wm_lp[i], 20, 4);
> wm.lp[i].primary = REG_DECODE1(wm_lp[i], 8, 11);
> wm.lp[i].cursor = REG_DECODE1(wm_lp[i], 0, 8);
>
> - if (i == 0 || is_gen7_plus(devid)) {
> - if (!is_gen7_plus(devid))
> + if (i == 0 || intel_gen(devid) >= 7) {
> + if (intel_gen(devid) < 7)
> wm.lp[i].sprite_enabled =
> REG_DECODE1(wm_lp_spr[i], 31, 1);
> wm.lp[i].sprite = REG_DECODE1(wm_lp_spr[i], 0,
> 11);
> }
> @@ -574,7 +564,7 @@ static void ilk_wm_dump(void)
> printf("WM_PIPE_%c: primary=%d, cursor=%d,
> sprite=%d\n",
> pipe_name(i), wm.pipe[i].primary,
> wm.pipe[i].cursor, wm.pipe[i].sprite);
> }
> - if (is_hsw_plus(devid)) {
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> for (i = 0; i < num_pipes; i++) {
> printf("WM_LINETIME_%c: line time=%d (%.3f
> usec), ips line time=%d (%.3f usec)\n",
> pipe_name(i),
> @@ -582,7 +572,7 @@ static void ilk_wm_dump(void)
> wm.linetime[i].ips, wm.linetime[i].ips *
> 0.125f);
> }
> }
> - if (is_gen7_plus(devid)) {
> + if (intel_gen(devid) >= 7) {
> for (i = 0; i < 3; i++) {
> printf("WM_LP%d: %s, latency=%d, fbc=%d,
> primary=%d, cursor=%d, sprite=%d\n",
> i + 1, endis(wm.lp[i].enabled),
> wm.lp[i].latency, wm.lp[i].fbc,
> @@ -607,10 +597,10 @@ static void ilk_wm_dump(void)
> printf("Sprite %c trickle feed = %s\n",
> pipe_name(i),
> endis(!wm.pipe[i].sprite_trickle_feed_dis));
> }
> - if (is_hsw_plus(devid)) {
> + if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> printf("DDB partitioning = %s\n",
> REG_DECODE1(wm_misc, 0, 1) ? "5/6" : "1/2");
> - } else if (is_gen7_plus(devid)) {
> + } else if (intel_gen(devid) >= 7) {
> printf("DDB partitioning = %s\n",
> REG_DECODE1(arb_ctl2, 6, 1) ? "5/6" : "1/2");
> }
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next prev parent reply other threads:[~2019-01-28 22:16 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 20:01 [igt-dev] [PATCH i-g-t 1/6] tools/intel_watermark: Bump number of planes to 8 for icl Ville Syrjala
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 2/6] tools/intel_watermark: More biths for PLANE_BUF_CFG Ville Syrjala
2019-01-28 22:19 ` Souza, Jose
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 3/6] tools/intel_watermark: Decode wm blocks correctly Ville Syrjala
2019-01-28 22:30 ` Souza, Jose
2019-01-29 13:23 ` Ville Syrjälä
2019-01-29 20:45 ` Souza, Jose
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 4/6] tools/intel_watermark: Show whether each plane is enabled Ville Syrjala
2019-01-28 22:53 ` Souza, Jose
2019-01-29 13:30 ` Ville Syrjälä
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 5/6] tools/intel_watermark: Dump NV12_BUF_CFG Ville Syrjala
2019-02-07 0:19 ` Souza, Jose
2019-01-28 20:01 ` [igt-dev] [PATCH i-g-t 6/6] tools/intel_watermark: Clean up the platform checks in the ilk+ code Ville Syrjala
2019-01-28 22:16 ` Souza, Jose [this message]
2019-01-28 20:32 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] tools/intel_watermark: Bump number of planes to 8 for icl Patchwork
2019-01-28 22:16 ` [igt-dev] [PATCH i-g-t 1/6] " Souza, Jose
2019-01-29 3:25 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/6] " Patchwork
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