Re: [igt-dev] [PATCH i-g-t 7/8] tests/kms_render: Copy all planes when copying fb

[Mika Kahola <mika.kahola@intel.com>]

On Tue, 2018-01-23 at 13:56 +0100, Maarten Lankhorst wrote:
> This is required to make the test pass when we start enabling
> planar formats in the future.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  lib/intel_batchbuffer.c     | 14 ++++++++------
>  lib/intel_batchbuffer.h     |  4 ++--
>  tests/gem_concurrent_all.c  |  4 ++--
>  tests/gem_read_read_speed.c |  4 ++--
>  tests/kms_render.c          | 15 +++++++++------
>  5 files changed, 23 insertions(+), 18 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 3c1689cd302c..9f162f09658a 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -310,10 +310,12 @@ intel_batchbuffer_data(struct intel_batchbuffer
> *batch,
>   * intel_blt_copy:
>   * @batch: batchbuffer object
>   * @src_bo: source libdrm buffer object
> + * @src_delta: offset into the source bo, in bytes
>   * @src_x1: source pixel x-coordination
>   * @src_y1: source pixel y-coordination
>   * @src_pitch: @src_bo's pitch in bytes
>   * @dst_bo: destination libdrm buffer object
> + * @sdst_delta: offset into the source bo, in bytes
>   * @dst_x1: destination pixel x-coordination
>   * @dst_y1: destination pixel y-coordination
>   * @dst_pitch: @dst_bo's pitch in bytes
> @@ -326,8 +328,8 @@ intel_batchbuffer_data(struct intel_batchbuffer
> *batch,
>   */
>  void
>  intel_blt_copy(struct intel_batchbuffer *batch,
> -	       drm_intel_bo *src_bo, int src_x1, int src_y1, int
> src_pitch,
> -	       drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int
> dst_pitch,
> +	       drm_intel_bo *src_bo, uint32_t src_delta, int src_x1,
> int src_y1, int src_pitch,
> +	       drm_intel_bo *dst_bo, uint32_t dst_delta, int dst_x1,
> int dst_y1, int dst_pitch,
>  	       int width, int height, int bpp)
>  {
>  	const int gen = batch->gen;
> @@ -387,10 +389,10 @@ intel_blt_copy(struct intel_batchbuffer *batch,
>  		  dst_pitch);
>  	OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
>  	OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /*
> dst x2,y2 */
> -	OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER,
> I915_GEM_DOMAIN_RENDER, 0);
> +	OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER,
> I915_GEM_DOMAIN_RENDER, dst_delta);
>  	OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
>  	OUT_BATCH(src_pitch);
> -	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
> +	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0,
> src_delta);
>  	ADVANCE_BATCH();
>  
>  #define CMD_POLY_STIPPLE_OFFSET       0x7906
> @@ -431,8 +433,8 @@ intel_copy_bo(struct intel_batchbuffer *batch,
>  	igt_assert(size % 4096 == 0);
>  
>  	intel_blt_copy(batch,
> -		       src_bo, 0, 0, 4096,
> -		       dst_bo, 0, 0, 4096,
> +		       src_bo, 0, 0, 0, 4096,
> +		       dst_bo, 0, 0, 0, 4096,
>  		       4096/4, size/4096, 32);
>  }
>  
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index 2c262d7d7e79..8c8c7ee543dd 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -181,8 +181,8 @@ intel_batchbuffer_require_space(struct
> intel_batchbuffer *batch,
>  
>  void
>  intel_blt_copy(struct intel_batchbuffer *batch,
> -	      drm_intel_bo *src_bo, int src_x1, int src_y1, int
> src_pitch,
> -	      drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int
> dst_pitch,
> +	      drm_intel_bo *src_bo, uint32_t src_delta, int src_x1,
> int src_y1, int src_pitch,
> +	      drm_intel_bo *dst_bo, uint32_t dst_delta, int dst_x1,
> int dst_y1, int dst_pitch,
>  	      int width, int height, int bpp);
>  void intel_copy_bo(struct intel_batchbuffer *batch,
>  		   drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
> diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
> index 201b491bc245..620f8c21083a 100644
> --- a/tests/gem_concurrent_all.c
> +++ b/tests/gem_concurrent_all.c
> @@ -874,8 +874,8 @@ static void render_copy_bo(struct buffers *b,
> drm_intel_bo *dst, drm_intel_bo *s
>  static void blt_copy_bo(struct buffers *b, drm_intel_bo *dst,
> drm_intel_bo *src)
>  {
>  	intel_blt_copy(b->batch,
> -		       src, 0, 0, 4*b->width,
> -		       dst, 0, 0, 4*b->width,
> +		       src, 0, 0, 0, 4*b->width,
> +		       dst, 0, 0, 0, 4*b->width,
>  		       b->width, b->height, 32);
>  }
>  
> diff --git a/tests/gem_read_read_speed.c
> b/tests/gem_read_read_speed.c
> index 3dcf440c7f81..d879f1225440 100644
> --- a/tests/gem_read_read_speed.c
> +++ b/tests/gem_read_read_speed.c
> @@ -83,8 +83,8 @@ static drm_intel_bo *bcs_copy_bo(drm_intel_bo *dst,
> drm_intel_bo *src)
>  	drm_intel_bo_reference(bo);
>  
>  	intel_blt_copy(batch,
> -		       src, 0, 0, 4*width,
> -		       dst, 0, 0, 4*width,
> +		       src, 0, 0, 0, 4*width,
> +		       dst, 0, 0, 0, 4*width,
>  		       width, height, 32);
>  
>  	return bo;
> diff --git a/tests/kms_render.c b/tests/kms_render.c
> index 25a0c05b547c..255cf3de39cf 100644
> --- a/tests/kms_render.c
> +++ b/tests/kms_render.c
> @@ -64,7 +64,7 @@ static void gpu_blit(struct igt_fb *dst_fb, struct
> igt_fb *src_fb)
>  {
>  	drm_intel_bo *dst_bo;
>  	drm_intel_bo *src_bo;
> -	int bpp;
> +	int i;
>  	static drm_intel_bufmgr *bufmgr;
>  	struct intel_batchbuffer *batch;
>  	uint32_t devid;
> @@ -79,7 +79,7 @@ static void gpu_blit(struct igt_fb *dst_fb, struct
> igt_fb *src_fb)
>  	igt_assert(dst_fb->drm_format == src_fb->drm_format);
>  	igt_assert(src_fb->drm_format == DRM_FORMAT_RGB565 ||
>  	       igt_drm_format_to_bpp(src_fb->drm_format) != 16);
> -	bpp = igt_drm_format_to_bpp(src_fb->drm_format);
> +
>  	dst_bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd,
> "destination",
>  					 dst_fb->gem_handle);
>  	igt_assert(dst_bo);
> @@ -87,10 +87,13 @@ static void gpu_blit(struct igt_fb *dst_fb,
> struct igt_fb *src_fb)
>  					 src_fb->gem_handle);
>  	igt_assert(src_bo);
>  
> -	intel_blt_copy(batch,
> -		       src_bo, 0, 0, src_fb->width * bpp / 8,
> -		       dst_bo, 0, 0, dst_fb->width * bpp / 8,
> -		       src_fb->width, src_fb->height, bpp);
> +	for (i = 0; i < src_fb->num_planes; i++) {
> +		intel_blt_copy(batch,
> +			      src_bo, src_fb->offsets[i], 0, 0,
> src_fb->stride,
> +			      dst_bo, dst_fb->offsets[i], 0, 0,
> dst_fb->stride,
> +			      src_fb->plane_width[i], src_fb-
> >plane_height[i],
> +			      src_fb->plane_bpp[i]);
> +	}
>  	intel_batchbuffer_flush(batch);
>  	gem_quiescent_gpu(drm_fd);
>  
-- 
Mika Kahola - Intel OTC

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