* [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets
@ 2018-07-04 16:16 Ville Syrjala
2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf Ville Syrjala
` (10 more replies)
0 siblings, 11 replies; 28+ messages in thread
From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Remove the hardcoded dword offsets for the relocs and instead rely
fully on intel_batchbuffer_subdata_offset().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
lib/rendercopy_gen6.c | 2 +-
lib/rendercopy_gen7.c | 2 +-
lib/rendercopy_gen8.c | 2 +-
lib/rendercopy_gen9.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
index 031d864b6357..3cbe3d0259f2 100644
--- a/lib/rendercopy_gen6.c
+++ b/lib/rendercopy_gen6.c
@@ -95,7 +95,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf,
ss->ss1.base_addr = buf->bo->offset;
ret = drm_intel_bo_emit_reloc(batch->bo,
- intel_batchbuffer_subdata_offset(batch, ss) + 4,
+ intel_batchbuffer_subdata_offset(batch, &ss->ss1),
buf->bo, 0,
read_domain, write_domain);
igt_assert(ret == 0);
diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
index bdcf3c7b46d5..706d62760859 100644
--- a/lib/rendercopy_gen7.c
+++ b/lib/rendercopy_gen7.c
@@ -90,7 +90,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
ss[7] |= HSW_SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA);
ret = drm_intel_bo_emit_reloc(batch->bo,
- intel_batchbuffer_subdata_offset(batch, ss) + 4,
+ intel_batchbuffer_subdata_offset(batch, &ss[1]),
buf->bo, 0,
read_domain, write_domain);
igt_assert(ret == 0);
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 7dd7cc47043d..90b2730b7d46 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -175,7 +175,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
ss->ss8.base_addr = buf->bo->offset;
ret = drm_intel_bo_emit_reloc(batch->bo,
- intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
+ intel_batchbuffer_subdata_offset(batch, &ss->ss8),
buf->bo, 0,
read_domain, write_domain);
igt_assert(ret == 0);
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 331cf056e95f..6707ef8e6aef 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -174,7 +174,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf,
ss->ss8.base_addr = buf->bo->offset;
ret = drm_intel_bo_emit_reloc(batch->bo,
- intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
+ intel_batchbuffer_subdata_offset(batch, &ss->ss8),
buf->bo, 0,
read_domain, write_domain);
assert(ret == 0);
--
2.16.4
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^ permalink raw reply related [flat|nested] 28+ messages in thread* [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala @ 2018-07-04 16:16 ` Ville Syrjala 2018-07-04 16:47 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ Ville Syrjala ` (9 subsequent siblings) 10 siblings, 1 reply; 28+ messages in thread From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> No one generally needs to modify the igt_bufs we pass around, so make them const. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- lib/gpgpu_fill.c | 8 ++++---- lib/gpgpu_fill.h | 6 +++--- lib/gpu_cmds.c | 12 +++++++----- lib/gpu_cmds.h | 12 +++++++----- lib/intel_batchbuffer.c | 8 ++++---- lib/intel_batchbuffer.h | 16 ++++++++-------- lib/media_fill.c | 8 ++++---- lib/media_fill.h | 6 +++--- lib/media_spin.c | 4 ++-- lib/media_spin.h | 4 ++-- lib/rendercopy.h | 24 ++++++++++++------------ lib/rendercopy_gen6.c | 12 ++++++------ lib/rendercopy_gen7.c | 16 ++++++++-------- lib/rendercopy_gen8.c | 14 +++++++------- lib/rendercopy_gen9.c | 14 +++++++------- lib/rendercopy_i830.c | 8 ++++---- lib/rendercopy_i915.c | 4 ++-- 17 files changed, 90 insertions(+), 86 deletions(-) diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c index 26212842491d..a276e9d0ccd6 100644 --- a/lib/gpgpu_fill.c +++ b/lib/gpgpu_fill.c @@ -105,7 +105,7 @@ static const uint32_t gen9_gpgpu_kernel[][4] = { void gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color) @@ -154,7 +154,7 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch, void gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color) @@ -202,7 +202,7 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch, static void __gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color, const uint32_t kernel[][4], @@ -251,7 +251,7 @@ __gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch, } void gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color) diff --git a/lib/gpgpu_fill.h b/lib/gpgpu_fill.h index 0190bfc1cab1..40246d1a79f6 100644 --- a/lib/gpgpu_fill.h +++ b/lib/gpgpu_fill.h @@ -31,21 +31,21 @@ void gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color); void gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color); void gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color); diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c index 323b03f643e3..556a94c6f0b6 100644 --- a/lib/gpu_cmds.c +++ b/lib/gpu_cmds.c @@ -54,7 +54,7 @@ gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint32_t gen7_fill_surface_state(struct intel_batchbuffer *batch, - struct igt_buf *buf, + const struct igt_buf *buf, uint32_t format, int is_dst) { @@ -103,7 +103,7 @@ gen7_fill_surface_state(struct intel_batchbuffer *batch, uint32_t gen7_fill_binding_table(struct intel_batchbuffer *batch, - struct igt_buf *dst) + const struct igt_buf *dst) { uint32_t *binding_table, offset; @@ -133,7 +133,8 @@ gen7_fill_kernel(struct intel_batchbuffer *batch, uint32_t gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, - struct igt_buf *dst, const uint32_t kernel[][4], + const struct igt_buf *dst, + const uint32_t kernel[][4], size_t size) { struct gen7_interface_descriptor_data *idd; @@ -335,7 +336,7 @@ gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch, uint32_t gen8_fill_surface_state(struct intel_batchbuffer *batch, - struct igt_buf *buf, + const struct igt_buf *buf, uint32_t format, int is_dst) { @@ -385,7 +386,8 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch, uint32_t gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, - struct igt_buf *dst, const uint32_t kernel[][4], + const struct igt_buf *dst, + const uint32_t kernel[][4], size_t size) { struct gen8_interface_descriptor_data *idd; diff --git a/lib/gpu_cmds.h b/lib/gpu_cmds.h index 3d71494e1c7c..79bc4d6473ba 100644 --- a/lib/gpu_cmds.h +++ b/lib/gpu_cmds.h @@ -46,13 +46,13 @@ gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch, uint32_t gen7_fill_surface_state(struct intel_batchbuffer *batch, - struct igt_buf *buf, + const struct igt_buf *buf, uint32_t format, int is_dst); uint32_t gen7_fill_binding_table(struct intel_batchbuffer *batch, - struct igt_buf *dst); + const struct igt_buf *dst); uint32_t gen7_fill_kernel(struct intel_batchbuffer *batch, @@ -61,7 +61,8 @@ gen7_fill_kernel(struct intel_batchbuffer *batch, uint32_t gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, - struct igt_buf *dst, const uint32_t kernel[][4], + const struct igt_buf *dst, + const uint32_t kernel[][4], size_t size); void @@ -95,13 +96,14 @@ gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch, uint32_t gen8_fill_surface_state(struct intel_batchbuffer *batch, - struct igt_buf *buf, + const struct igt_buf *buf, uint32_t format, int is_dst); uint32_t gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, - struct igt_buf *dst, const uint32_t kernel[][4], + const struct igt_buf *dst, + const uint32_t kernel[][4], size_t size); void diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index a85c760c6242..dfc2ce96207a 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -509,7 +509,7 @@ intel_copy_bo(struct intel_batchbuffer *batch, * Returns: * The width of the buffer. */ -unsigned igt_buf_width(struct igt_buf *buf) +unsigned igt_buf_width(const struct igt_buf *buf) { return buf->stride/sizeof(uint32_t); } @@ -523,7 +523,7 @@ unsigned igt_buf_width(struct igt_buf *buf) * Returns: * The height of the buffer. */ -unsigned igt_buf_height(struct igt_buf *buf) +unsigned igt_buf_height(const struct igt_buf *buf) { return buf->size/buf->stride; } @@ -775,11 +775,11 @@ void igt_blitter_fast_copy__raw(int fd, * The source and destination surfaces cannot overlap. */ void igt_blitter_fast_copy(struct intel_batchbuffer *batch, - struct igt_buf *src, unsigned src_delta, + const struct igt_buf *src, unsigned src_delta, unsigned src_x, unsigned src_y, unsigned width, unsigned height, int bpp, - struct igt_buf *dst, unsigned dst_delta, + const struct igt_buf *dst, unsigned dst_delta, unsigned dst_x, unsigned dst_y) { uint32_t src_pitch, dst_pitch; diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 1b8e831dac86..8acfdbbfc875 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -232,15 +232,15 @@ struct igt_buf { unsigned num_tiles; }; -unsigned igt_buf_width(struct igt_buf *buf); -unsigned igt_buf_height(struct igt_buf *buf); +unsigned igt_buf_width(const struct igt_buf *buf); +unsigned igt_buf_height(const struct igt_buf *buf); void igt_blitter_fast_copy(struct intel_batchbuffer *batch, - struct igt_buf *src, unsigned src_delta, + const struct igt_buf *src, unsigned src_delta, unsigned src_x, unsigned src_y, unsigned width, unsigned height, int bpp, - struct igt_buf *dst, unsigned dst_delta, + const struct igt_buf *dst, unsigned dst_delta, unsigned dst_x, unsigned dst_y); void igt_blitter_fast_copy__raw(int fd, @@ -287,9 +287,9 @@ void igt_blitter_fast_copy__raw(int fd, */ typedef void (*igt_render_copyfunc_t)(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); igt_render_copyfunc_t igt_get_render_copyfunc(int devid); @@ -311,7 +311,7 @@ igt_render_copyfunc_t igt_get_render_copyfunc(int devid); * the specified blit fill operation using the media/gpgpu engine. */ typedef void (*igt_fillfunc_t)(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned x, unsigned y, unsigned width, unsigned height, uint8_t color); @@ -337,7 +337,7 @@ igt_fillfunc_t igt_get_gpgpu_fillfunc(int devid); * to keep the render engine busy for a set time for various tests. */ typedef void (*igt_media_spinfunc_t)(struct intel_batchbuffer *batch, - struct igt_buf *dst, uint32_t spins); + const struct igt_buf *dst, uint32_t spins); igt_media_spinfunc_t igt_get_media_spinfunc(int devid); diff --git a/lib/media_fill.c b/lib/media_fill.c index 0223c0bb7d17..4942229505ff 100644 --- a/lib/media_fill.c +++ b/lib/media_fill.c @@ -91,7 +91,7 @@ static const uint32_t gen8_media_kernel[][4] = { void gen7_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color) @@ -135,7 +135,7 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch, void gen8_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color) @@ -179,7 +179,7 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch, static void __gen9_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color, const uint32_t kernel[][4], @@ -235,7 +235,7 @@ __gen9_media_fillfunc(struct intel_batchbuffer *batch, void gen9_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color) diff --git a/lib/media_fill.h b/lib/media_fill.h index 7863ae843fe0..e365da9e47d2 100644 --- a/lib/media_fill.h +++ b/lib/media_fill.h @@ -30,21 +30,21 @@ void gen8_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color); void gen7_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color); void gen9_media_fillfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, + const struct igt_buf *dst, unsigned int x, unsigned int y, unsigned int width, unsigned int height, uint8_t color); diff --git a/lib/media_spin.c b/lib/media_spin.c index f3e68ef74c39..009c7806ee82 100644 --- a/lib/media_spin.c +++ b/lib/media_spin.c @@ -81,7 +81,7 @@ static const uint32_t spin_kernel[][4] = { void gen8_media_spinfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, uint32_t spins) + const struct igt_buf *dst, uint32_t spins) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; @@ -121,7 +121,7 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch, void gen9_media_spinfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, uint32_t spins) + const struct igt_buf *dst, uint32_t spins) { uint32_t curbe_buffer, interface_descriptor; uint32_t batch_end; diff --git a/lib/media_spin.h b/lib/media_spin.h index 57d8c2e231b0..768eccc06aae 100644 --- a/lib/media_spin.h +++ b/lib/media_spin.h @@ -28,9 +28,9 @@ #define MEDIA_SPIN_H void gen8_media_spinfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, uint32_t spins); + const struct igt_buf *dst, uint32_t spins); void gen9_media_spinfunc(struct intel_batchbuffer *batch, - struct igt_buf *dst, uint32_t spins); + const struct igt_buf *dst, uint32_t spins); #endif /* MEDIA_SPIN_H */ diff --git a/lib/rendercopy.h b/lib/rendercopy.h index fdc3cabb20d7..f1c501977304 100644 --- a/lib/rendercopy.h +++ b/lib/rendercopy.h @@ -25,31 +25,31 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch, void gen9_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen8_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen7_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen6_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen3_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); void gen2_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y); diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c index 3cbe3d0259f2..eebc9bf25877 100644 --- a/lib/rendercopy_gen6.c +++ b/lib/rendercopy_gen6.c @@ -72,7 +72,7 @@ gen6_render_flush(struct intel_batchbuffer *batch, } static uint32_t -gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, +gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, uint32_t format, int is_dst) { struct gen6_surface_state *ss; @@ -111,8 +111,8 @@ gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, static uint32_t gen6_bind_surfaces(struct intel_batchbuffer *batch, - struct igt_buf *src, - struct igt_buf *dst) + const struct igt_buf *src, + const struct igt_buf *dst) { uint32_t *binding_table; @@ -341,7 +341,7 @@ gen6_emit_binding_table(struct intel_batchbuffer *batch, uint32_t wm_table) } static void -gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) +gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, const struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); @@ -512,9 +512,9 @@ static uint32_t gen6_emit_primitive(struct intel_batchbuffer *batch) void gen6_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y) + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t wm_state, wm_kernel, wm_table; uint32_t cc_vp, cc_blend, offset; diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c index 706d62760859..caaa05ca8dc0 100644 --- a/lib/rendercopy_gen7.c +++ b/lib/rendercopy_gen7.c @@ -58,7 +58,7 @@ gen7_tiling_bits(uint32_t tiling) static uint32_t gen7_bind_buf(struct intel_batchbuffer *batch, - struct igt_buf *buf, + const struct igt_buf *buf, uint32_t format, int is_dst) { @@ -179,8 +179,8 @@ static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch, static uint32_t gen7_bind_surfaces(struct intel_batchbuffer *batch, - struct igt_buf *src, - struct igt_buf *dst) + const struct igt_buf *src, + const struct igt_buf *dst) { uint32_t *binding_table; @@ -196,8 +196,8 @@ gen7_bind_surfaces(struct intel_batchbuffer *batch, static void gen7_emit_binding_table(struct intel_batchbuffer *batch, - struct igt_buf *src, - struct igt_buf *dst, + const struct igt_buf *src, + const struct igt_buf *dst, uint32_t bind_surf_off) { OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); @@ -205,7 +205,7 @@ gen7_emit_binding_table(struct intel_batchbuffer *batch, } static void -gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) +gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch, const struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); @@ -492,9 +492,9 @@ gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) #define BATCH_STATE_SPLIT 2048 void gen7_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y) + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t ps_binding_table, ps_sampler_off, ps_kernel_off; uint32_t blend_state, cc_viewport; diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c index 90b2730b7d46..4406a0a0e6eb 100644 --- a/lib/rendercopy_gen8.c +++ b/lib/rendercopy_gen8.c @@ -144,7 +144,7 @@ gen6_render_flush(struct intel_batchbuffer *batch, static uint32_t gen8_bind_buf(struct intel_batchbuffer *batch, struct annotations_context *aub, - struct igt_buf *buf, + const struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; @@ -195,8 +195,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, static uint32_t gen8_bind_surfaces(struct intel_batchbuffer *batch, struct annotations_context *aub, - struct igt_buf *src, - struct igt_buf *dst) + const struct igt_buf *src, + const struct igt_buf *dst) { uint32_t *binding_table, offset; @@ -267,7 +267,7 @@ gen8_fill_ps(struct intel_batchbuffer *batch, static uint32_t gen7_fill_vertex_buffer_data(struct intel_batchbuffer *batch, struct annotations_context *aub, - struct igt_buf *src, + const struct igt_buf *src, uint32_t src_x, uint32_t src_y, uint32_t dst_x, uint32_t dst_y, uint32_t width, uint32_t height) @@ -823,7 +823,7 @@ gen7_emit_clear(struct intel_batchbuffer *batch) { } static void -gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) +gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, const struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); @@ -887,9 +887,9 @@ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset void gen8_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y) + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { struct annotations_context aub_annotations; uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table; diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index 6707ef8e6aef..fc5c09374c77 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -143,7 +143,7 @@ gen6_render_flush(struct intel_batchbuffer *batch, /* Mostly copy+paste from gen6, except height, width, pitch moved */ static uint32_t -gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, +gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, uint32_t format, int is_dst) { struct gen8_surface_state *ss; uint32_t write_domain, read_domain, offset; @@ -193,8 +193,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, static uint32_t gen8_bind_surfaces(struct intel_batchbuffer *batch, - struct igt_buf *src, - struct igt_buf *dst) + const struct igt_buf *src, + const struct igt_buf *dst) { uint32_t *binding_table, offset; @@ -261,7 +261,7 @@ gen8_fill_ps(struct intel_batchbuffer *batch, */ static uint32_t gen7_fill_vertex_buffer_data(struct intel_batchbuffer *batch, - struct igt_buf *src, + const struct igt_buf *src, uint32_t src_x, uint32_t src_y, uint32_t dst_x, uint32_t dst_y, uint32_t width, uint32_t height) @@ -827,7 +827,7 @@ gen7_emit_clear(struct intel_batchbuffer *batch) { } static void -gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) +gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, const struct igt_buf *dst) { OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); @@ -894,9 +894,9 @@ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset void gen9_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y) + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table; uint32_t scissor_state; diff --git a/lib/rendercopy_i830.c b/lib/rendercopy_i830.c index 04215b1b0bb2..2b07ad5d750a 100644 --- a/lib/rendercopy_i830.c +++ b/lib/rendercopy_i830.c @@ -133,7 +133,7 @@ static void gen2_emit_invariant(struct intel_batchbuffer *batch) } static void gen2_emit_target(struct intel_batchbuffer *batch, - struct igt_buf *dst) + const struct igt_buf *dst) { uint32_t tiling; @@ -161,7 +161,7 @@ static void gen2_emit_target(struct intel_batchbuffer *batch, } static void gen2_emit_texture(struct intel_batchbuffer *batch, - struct igt_buf *src, + const struct igt_buf *src, int unit) { uint32_t tiling; @@ -209,9 +209,9 @@ static void gen2_emit_copy_pipeline(struct intel_batchbuffer *batch) void gen2_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y) + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { gen2_emit_invariant(batch); gen2_emit_copy_pipeline(batch); diff --git a/lib/rendercopy_i915.c b/lib/rendercopy_i915.c index fc9583cfdab1..f68e7c1f2806 100644 --- a/lib/rendercopy_i915.c +++ b/lib/rendercopy_i915.c @@ -21,9 +21,9 @@ void gen3_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, - struct igt_buf *src, unsigned src_x, unsigned src_y, + const struct igt_buf *src, unsigned src_x, unsigned src_y, unsigned width, unsigned height, - struct igt_buf *dst, unsigned dst_x, unsigned dst_y) + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y) { /* invariant state */ { -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf Ville Syrjala @ 2018-07-04 16:47 ` Chris Wilson 0 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-04 16:47 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:41) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > No one generally needs to modify the igt_bufs we pass around, > so make them const. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf Ville Syrjala @ 2018-07-04 16:16 ` Ville Syrjala 2018-07-04 16:37 ` Chris Wilson ` (2 more replies) 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 4/7] lib: Add aux surface state to igt_buf Ville Syrjala ` (8 subsequent siblings) 10 siblings, 3 replies; 28+ messages in thread From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> gen8 introduces 48 bit virtual addresses. Set both dwords correctly as otherwise the presumed_offset will not match what we actually have stored in the surface state if the buffer is located somewhere above 4GiB. I guess we're not currently using 48bit addresses with rendercopy? Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- lib/gen8_render.h | 3 +-- lib/rendercopy_gen8.c | 3 ++- lib/rendercopy_gen9.c | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/gen8_render.h b/lib/gen8_render.h index 79f2f38855b9..048e667c8c95 100644 --- a/lib/gen8_render.h +++ b/lib/gen8_render.h @@ -155,8 +155,7 @@ struct gen8_surface_state } ss8; struct { - uint32_t base_addr_hi:16; - uint32_t pad0:16; + uint32_t base_addr_hi; } ss9; struct { diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c index 4406a0a0e6eb..5a9bf32e6b9b 100644 --- a/lib/rendercopy_gen8.c +++ b/lib/rendercopy_gen8.c @@ -172,7 +172,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; - ss->ss8.base_addr = buf->bo->offset; + ss->ss8.base_addr = buf->bo->offset64; + ss->ss9.base_addr_hi = buf->bo->offset64 >> 32; ret = drm_intel_bo_emit_reloc(batch->bo, intel_batchbuffer_subdata_offset(batch, &ss->ss8), diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index fc5c09374c77..db59c9f4d776 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -171,7 +171,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, else if (buf->tiling == I915_TILING_Y) ss->ss0.tiled_mode = 3; - ss->ss8.base_addr = buf->bo->offset; + ss->ss8.base_addr = buf->bo->offset64; + ss->ss9.base_addr_hi = buf->bo->offset64 >> 32; ret = drm_intel_bo_emit_reloc(batch->bo, intel_batchbuffer_subdata_offset(batch, &ss->ss8), -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ Ville Syrjala @ 2018-07-04 16:37 ` Chris Wilson 2018-07-04 16:41 ` Chris Wilson 2018-07-05 18:44 ` Chris Wilson 2 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-04 16:37 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:42) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > gen8 introduces 48 bit virtual addresses. Set both dwords correctly > as otherwise the presumed_offset will not match what we actually > have stored in the surface state if the buffer is located somewhere > above 4GiB. > > I guess we're not currently using 48bit addresses with rendercopy? If you don't ask for 48b, you don't get 48b. -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ Ville Syrjala 2018-07-04 16:37 ` Chris Wilson @ 2018-07-04 16:41 ` Chris Wilson 2018-07-04 18:47 ` Ville Syrjälä 2018-07-05 18:44 ` Chris Wilson 2 siblings, 1 reply; 28+ messages in thread From: Chris Wilson @ 2018-07-04 16:41 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:42) > diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c > index 4406a0a0e6eb..5a9bf32e6b9b 100644 > --- a/lib/rendercopy_gen8.c > +++ b/lib/rendercopy_gen8.c > @@ -172,7 +172,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, > else if (buf->tiling == I915_TILING_Y) > ss->ss0.tiled_mode = 3; > > - ss->ss8.base_addr = buf->bo->offset; > + ss->ss8.base_addr = buf->bo->offset64; > + ss->ss9.base_addr_hi = buf->bo->offset64 >> 32; To be pedantic, we might want to use gen8_canonical_addr(x) { return (int64_t)((uint64_t)x << (63-47)) >> (63-47); } -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ 2018-07-04 16:41 ` Chris Wilson @ 2018-07-04 18:47 ` Ville Syrjälä 2018-07-04 18:51 ` Chris Wilson 0 siblings, 1 reply; 28+ messages in thread From: Ville Syrjälä @ 2018-07-04 18:47 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev On Wed, Jul 04, 2018 at 05:41:37PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2018-07-04 17:16:42) > > diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c > > index 4406a0a0e6eb..5a9bf32e6b9b 100644 > > --- a/lib/rendercopy_gen8.c > > +++ b/lib/rendercopy_gen8.c > > @@ -172,7 +172,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, > > else if (buf->tiling == I915_TILING_Y) > > ss->ss0.tiled_mode = 3; > > > > - ss->ss8.base_addr = buf->bo->offset; > > + ss->ss8.base_addr = buf->bo->offset64; > > + ss->ss9.base_addr_hi = buf->bo->offset64 >> 32; > > To be pedantic, we might want to use gen8_canonical_addr(x) > { return (int64_t)((uint64_t)x << (63-47)) >> (63-47); } Looks to me like bo->offset64 should already be a canonical address as that's what the kernel hands back out after relocating. Or am I missing something? -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ 2018-07-04 18:47 ` Ville Syrjälä @ 2018-07-04 18:51 ` Chris Wilson 0 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-04 18:51 UTC (permalink / raw) To: Ville Syrjälä; +Cc: igt-dev Quoting Ville Syrjälä (2018-07-04 19:47:05) > On Wed, Jul 04, 2018 at 05:41:37PM +0100, Chris Wilson wrote: > > Quoting Ville Syrjala (2018-07-04 17:16:42) > > > diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c > > > index 4406a0a0e6eb..5a9bf32e6b9b 100644 > > > --- a/lib/rendercopy_gen8.c > > > +++ b/lib/rendercopy_gen8.c > > > @@ -172,7 +172,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, > > > else if (buf->tiling == I915_TILING_Y) > > > ss->ss0.tiled_mode = 3; > > > > > > - ss->ss8.base_addr = buf->bo->offset; > > > + ss->ss8.base_addr = buf->bo->offset64; > > > + ss->ss9.base_addr_hi = buf->bo->offset64 >> 32; > > > > To be pedantic, we might want to use gen8_canonical_addr(x) > > { return (int64_t)((uint64_t)x << (63-47)) >> (63-47); } > > Looks to me like bo->offset64 should already be a canonical > address as that's what the kernel hands back out after relocating. > Or am I missing something? I'm expecting a + delta, which apparently is 0 in all cases. -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ Ville Syrjala 2018-07-04 16:37 ` Chris Wilson 2018-07-04 16:41 ` Chris Wilson @ 2018-07-05 18:44 ` Chris Wilson 2 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-05 18:44 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:42) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > gen8 introduces 48 bit virtual addresses. Set both dwords correctly > as otherwise the presumed_offset will not match what we actually > have stored in the surface state if the buffer is located somewhere > above 4GiB. > > I guess we're not currently using 48bit addresses with rendercopy? > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t 4/7] lib: Add aux surface state to igt_buf 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf Ville Syrjala 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ Ville Syrjala @ 2018-07-04 16:16 ` Ville Syrjala 2018-07-05 18:45 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 5/7] lib/rendercopy: Add enough surface state for AUX_CCS_E Ville Syrjala ` (7 subsequent siblings) 10 siblings, 1 reply; 28+ messages in thread From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> Store a bit of aux surface state in igt_buf. This will be needed for rendercopy AUX_CCS_E color compression. We also have to sprinkle memset()s and whatnot all over to make sure the current igt_buf users don't leave the aux stuff full of stack garbage. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- lib/intel_batchbuffer.h | 18 +++++++++++------- tests/gem_gpgpu_fill.c | 2 ++ tests/gem_media_fill.c | 2 ++ tests/gem_ppgtt.c | 4 +++- tests/gem_render_copy.c | 2 ++ tests/gem_render_copy_redux.c | 2 ++ tests/gem_render_linear_blits.c | 6 +++--- tests/gem_render_tiled_blits.c | 2 +- tests/gem_ring_sync_copy.c | 2 ++ tests/gem_stress.c | 2 ++ tests/kms_psr_sink_crc.c | 2 ++ tests/perf.c | 2 ++ tests/pm_sseu.c | 2 +- 13 files changed, 35 insertions(+), 13 deletions(-) diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 8acfdbbfc875..2dcb09ce8f08 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -223,13 +223,17 @@ void intel_copy_bo(struct intel_batchbuffer *batch, * fill functions. */ struct igt_buf { - drm_intel_bo *bo; - uint32_t stride; - uint32_t tiling; - uint32_t *data; - uint32_t size; - /*< private >*/ - unsigned num_tiles; + drm_intel_bo *bo; + uint32_t stride; + uint32_t tiling; + uint32_t *data; + uint32_t size; + struct { + uint32_t offset; + uint32_t stride; + } aux; + /*< private >*/ + unsigned num_tiles; }; unsigned igt_buf_width(const struct igt_buf *buf); diff --git a/tests/gem_gpgpu_fill.c b/tests/gem_gpgpu_fill.c index df9e86f6c912..8ef05a3f0727 100644 --- a/tests/gem_gpgpu_fill.c +++ b/tests/gem_gpgpu_fill.c @@ -72,6 +72,8 @@ static void scratch_buf_init(data_t *data, struct igt_buf *buf, gem_write(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; diff --git a/tests/gem_media_fill.c b/tests/gem_media_fill.c index e3564e8b5d0e..109af12933f6 100644 --- a/tests/gem_media_fill.c +++ b/tests/gem_media_fill.c @@ -75,6 +75,8 @@ static void scratch_buf_init(data_t *data, struct igt_buf *buf, gem_write(data->drm_fd, bo->handle, 0, data->linear, sizeof(data->linear)); + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; diff --git a/tests/gem_ppgtt.c b/tests/gem_ppgtt.c index 575b0e9d3168..af5e3e073de7 100644 --- a/tests/gem_ppgtt.c +++ b/tests/gem_ppgtt.c @@ -66,6 +66,8 @@ static void scratch_buf_init(struct igt_buf *buf, drm_intel_bufmgr *bufmgr, uint32_t pixel) { + memset(buf, 0, sizeof(*buf)); + buf->bo = create_bo(bufmgr, pixel); buf->stride = STRIDE; buf->tiling = I915_TILING_NONE; @@ -109,7 +111,7 @@ static void fork_rcs_copy(int target, drm_intel_bo **dst, int count, unsigned fl igt_fork(child, count) { struct intel_batchbuffer *batch; - struct igt_buf buf; + struct igt_buf buf = {}; batch = intel_batchbuffer_alloc(dst[child]->bufmgr, devid); diff --git a/tests/gem_render_copy.c b/tests/gem_render_copy.c index 2efec0783585..956f83f4b3a5 100644 --- a/tests/gem_render_copy.c +++ b/tests/gem_render_copy.c @@ -206,6 +206,8 @@ static void scratch_buf_init(data_t *data, struct igt_buf *buf, bo = drm_intel_bo_alloc(data->bufmgr, "", size, 4096); + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; diff --git a/tests/gem_render_copy_redux.c b/tests/gem_render_copy_redux.c index 95d1f975763e..27098ea6dcc7 100644 --- a/tests/gem_render_copy_redux.c +++ b/tests/gem_render_copy_redux.c @@ -103,6 +103,8 @@ static void scratch_buf_init(data_t *data, struct igt_buf *buf, gem_write(data->fd, bo->handle, 0, data->linear, sizeof(data->linear)); + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; diff --git a/tests/gem_render_linear_blits.c b/tests/gem_render_linear_blits.c index db34d427385a..a1a7e0338235 100644 --- a/tests/gem_render_linear_blits.c +++ b/tests/gem_render_linear_blits.c @@ -105,7 +105,7 @@ static void run_test (int fd, int count) igt_info("Cyclic blits, forward...\n"); for (i = 0; i < count * 4; i++) { - struct igt_buf src, dst; + struct igt_buf src = {}, dst = {}; src.bo = bo[i % count]; src.stride = STRIDE; @@ -128,7 +128,7 @@ static void run_test (int fd, int count) igt_info("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { - struct igt_buf src, dst; + struct igt_buf src = {}, dst = {}; src.bo = bo[(i + 1) % count]; src.stride = STRIDE; @@ -148,7 +148,7 @@ static void run_test (int fd, int count) igt_info("Random blits...\n"); for (i = 0; i < count * 4; i++) { - struct igt_buf src, dst; + struct igt_buf src = {}, dst = {}; int s = random() % count; int d = random() % count; diff --git a/tests/gem_render_tiled_blits.c b/tests/gem_render_tiled_blits.c index b2cc7a0c8ea5..3484d561a4b1 100644 --- a/tests/gem_render_tiled_blits.c +++ b/tests/gem_render_tiled_blits.c @@ -61,7 +61,7 @@ static int snoop; static void check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val) { - struct igt_buf tmp; + struct igt_buf tmp = {}; uint32_t *ptr; int i; diff --git a/tests/gem_ring_sync_copy.c b/tests/gem_ring_sync_copy.c index a949753decff..8d3723559f76 100644 --- a/tests/gem_ring_sync_copy.c +++ b/tests/gem_ring_sync_copy.c @@ -131,6 +131,8 @@ static void bo_check(data_t *data, drm_intel_bo *bo, uint32_t val) static void scratch_buf_init_from_bo(struct igt_buf *buf, drm_intel_bo *bo) { + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = 4 * WIDTH; buf->tiling = I915_TILING_NONE; diff --git a/tests/gem_stress.c b/tests/gem_stress.c index 4d0de5c4eee4..225f283e4256 100644 --- a/tests/gem_stress.c +++ b/tests/gem_stress.c @@ -478,6 +478,8 @@ static void sanitize_stride(struct igt_buf *buf) static void init_buffer(struct igt_buf *buf, unsigned size) { + memset(buf, 0, sizeof(*buf)); + buf->bo = drm_intel_bo_alloc(bufmgr, "tiled bo", size, 4096); buf->size = size; igt_assert(buf->bo); diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c index 28818e25f202..3115a5de68f0 100644 --- a/tests/kms_psr_sink_crc.c +++ b/tests/kms_psr_sink_crc.c @@ -150,6 +150,8 @@ static void fill_blt(data_t *data, uint32_t handle, unsigned char color) static void scratch_buf_init(struct igt_buf *buf, drm_intel_bo *bo, int size, int stride) { + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_X; diff --git a/tests/perf.c b/tests/perf.c index 95048bfa5e31..f2bfb507ea63 100644 --- a/tests/perf.c +++ b/tests/perf.c @@ -495,6 +495,8 @@ scratch_buf_init(drm_intel_bufmgr *bufmgr, scratch_buf_memset(bo, width, height, color); + memset(buf, 0, sizeof(*buf)); + buf->bo = bo; buf->stride = stride; buf->tiling = I915_TILING_NONE; diff --git a/tests/pm_sseu.c b/tests/pm_sseu.c index 9a7daa5636f2..1274e1fa6856 100644 --- a/tests/pm_sseu.c +++ b/tests/pm_sseu.c @@ -35,7 +35,7 @@ IGT_TEST_DESCRIPTION("Tests slice/subslice/EU power gating functionality.\n"); -struct { +static struct { int init; int drm_fd; int devid; -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 4/7] lib: Add aux surface state to igt_buf 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 4/7] lib: Add aux surface state to igt_buf Ville Syrjala @ 2018-07-05 18:45 ` Chris Wilson 0 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-05 18:45 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:43) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Store a bit of aux surface state in igt_buf. This will be needed > for rendercopy AUX_CCS_E color compression. > > We also have to sprinkle memset()s and whatnot all over to make > sure the current igt_buf users don't leave the aux stuff full > of stack garbage. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Quite safe to do as nothing uses the extra bits yet, so I don't have to worry about missing memset ;) -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t 5/7] lib/rendercopy: Add enough surface state for AUX_CCS_E 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (2 preceding siblings ...) 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 4/7] lib: Add aux surface state to igt_buf Ville Syrjala @ 2018-07-04 16:16 ` Ville Syrjala 2018-07-05 18:50 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes Ville Syrjala ` (6 subsequent siblings) 10 siblings, 1 reply; 28+ messages in thread From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> Populate the gen8+ SURFACE_STATE aux bits correctly. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- lib/gen8_render.h | 12 +++++++----- lib/rendercopy_gen9.c | 14 ++++++++++++++ 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/lib/gen8_render.h b/lib/gen8_render.h index 048e667c8c95..470dca0fdfe7 100644 --- a/lib/gen8_render.h +++ b/lib/gen8_render.h @@ -131,7 +131,11 @@ struct gen8_surface_state } ss5; struct { - uint32_t pad; /* Multisample Control Surface stuff */ + uint32_t aux_mode:3; + uint32_t aux_pitch:9; + uint32_t pad0:4; + uint32_t aux_qpitch:15; + uint32_t pad1:1; } ss6; struct { @@ -159,13 +163,11 @@ struct gen8_surface_state } ss9; struct { - uint32_t pad0:12; - uint32_t aux_base_addr:20; + uint32_t aux_base_addr; } ss10; struct { - uint32_t aux_base_addr_hi:16; - uint32_t pad:16; + uint32_t aux_base_addr_hi; } ss11; struct { diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index db59c9f4d776..d9e7eaf9e0d3 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -189,6 +189,20 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, ss->ss7.shader_chanel_select_b = 6; ss->ss7.shader_chanel_select_a = 7; + if (buf->aux.stride) { + ss->ss6.aux_mode = 0x5; /* AUX_CCS_E */ + ss->ss6.aux_pitch = (buf->aux.stride / 128) - 1; + + ss->ss10.aux_base_addr = buf->bo->offset64 + buf->aux.offset; + ss->ss11.aux_base_addr_hi = (buf->bo->offset64 + buf->aux.offset) >> 32; + + ret = drm_intel_bo_emit_reloc(batch->bo, + intel_batchbuffer_subdata_offset(batch, &ss->ss10), + buf->bo, buf->aux.offset, + read_domain, write_domain); + assert(ret == 0); + } + return offset; } -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 5/7] lib/rendercopy: Add enough surface state for AUX_CCS_E 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 5/7] lib/rendercopy: Add enough surface state for AUX_CCS_E Ville Syrjala @ 2018-07-05 18:50 ` Chris Wilson 0 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-05 18:50 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:44) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Populate the gen8+ SURFACE_STATE aux bits correctly. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > lib/gen8_render.h | 12 +++++++----- > lib/rendercopy_gen9.c | 14 ++++++++++++++ > 2 files changed, 21 insertions(+), 5 deletions(-) > > diff --git a/lib/gen8_render.h b/lib/gen8_render.h > index 048e667c8c95..470dca0fdfe7 100644 > --- a/lib/gen8_render.h > +++ b/lib/gen8_render.h > @@ -131,7 +131,11 @@ struct gen8_surface_state > } ss5; > > struct { > - uint32_t pad; /* Multisample Control Surface stuff */ > + uint32_t aux_mode:3; > + uint32_t aux_pitch:9; > + uint32_t pad0:4; > + uint32_t aux_qpitch:15; > + uint32_t pad1:1; Using gen8.xml aux_mode = 192-194 aux_pitch = 195-203 aux_qpitch = 208-222 Ok. > } ss6; > > struct { > @@ -159,13 +163,11 @@ struct gen8_surface_state > } ss9; > > struct { > - uint32_t pad0:12; > - uint32_t aux_base_addr:20; > + uint32_t aux_base_addr; aux_base = 332-383 i.e whole of ss10, ss11. > } ss10; > > struct { > - uint32_t aux_base_addr_hi:16; > - uint32_t pad:16; > + uint32_t aux_base_addr_hi; > } ss11; Ok. > struct { > diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c > index db59c9f4d776..d9e7eaf9e0d3 100644 > --- a/lib/rendercopy_gen9.c > +++ b/lib/rendercopy_gen9.c > @@ -189,6 +189,20 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, > ss->ss7.shader_chanel_select_b = 6; > ss->ss7.shader_chanel_select_a = 7; > > + if (buf->aux.stride) { > + ss->ss6.aux_mode = 0x5; /* AUX_CCS_E */ > + ss->ss6.aux_pitch = (buf->aux.stride / 128) - 1; Ok (now gen9.xml!) > + > + ss->ss10.aux_base_addr = buf->bo->offset64 + buf->aux.offset; > + ss->ss11.aux_base_addr_hi = (buf->bo->offset64 + buf->aux.offset) >> 32; > + > + ret = drm_intel_bo_emit_reloc(batch->bo, > + intel_batchbuffer_subdata_offset(batch, &ss->ss10), > + buf->bo, buf->aux.offset, > + read_domain, write_domain); > + assert(ret == 0); > + } Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (3 preceding siblings ...) 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 5/7] lib/rendercopy: Add enough surface state for AUX_CCS_E Ville Syrjala @ 2018-07-04 16:16 ` Ville Syrjala 2018-07-04 16:36 ` Chris Wilson ` (2 more replies) 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E Ville Syrjala ` (5 subsequent siblings) 10 siblings, 3 replies; 28+ messages in thread From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> Make sure our rendercopy implementations do the right thing with tiled buffers. For now we'll just do linear->linear, x-tiled->x-tiled, and y-tiled->y-tiled. Not sure there's much point in adding tests for different src vs. dst tiling modes? Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_render_copy.c | 175 +++++++++++++++++++++++++++++------------------- 1 file changed, 105 insertions(+), 70 deletions(-) diff --git a/tests/gem_render_copy.c b/tests/gem_render_copy.c index 956f83f4b3a5..13198dfcb3fd 100644 --- a/tests/gem_render_copy.c +++ b/tests/gem_render_copy.c @@ -58,25 +58,19 @@ typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; + struct intel_batchbuffer *batch; + igt_render_copyfunc_t render_copy; } data_t; static int opt_dump_png = false; static int check_all_pixels = false; -static void scratch_buf_write_to_png(struct igt_buf *buf, const char *filename) +static const char *make_filename(const char *filename) { - cairo_surface_t *surface; - cairo_status_t ret; + static char buf[64]; - drm_intel_bo_map(buf->bo, 0); - surface = cairo_image_surface_create_for_data(buf->bo->virtual, - CAIRO_FORMAT_RGB24, - igt_buf_width(buf), - igt_buf_height(buf), - buf->stride); - ret = cairo_surface_write_to_png(surface, filename); - igt_assert(ret == CAIRO_STATUS_SUCCESS); - cairo_surface_destroy(surface); - drm_intel_bo_unmap(buf->bo); + snprintf(buf, sizeof(buf), "%s_%s", igt_subtest_name(), filename); + + return buf; } static void *linear_copy(data_t *data, struct igt_buf *buf) @@ -98,6 +92,27 @@ static void *linear_copy(data_t *data, struct igt_buf *buf) return linear; } +static void scratch_buf_write_to_png(data_t *data, struct igt_buf *buf, + const char *filename) +{ + cairo_surface_t *surface; + cairo_status_t ret; + void *linear; + + linear = linear_copy(data, buf); + + surface = cairo_image_surface_create_for_data(linear, + CAIRO_FORMAT_RGB24, + igt_buf_width(buf), + igt_buf_height(buf), + buf->stride); + ret = cairo_surface_write_to_png(surface, make_filename(filename)); + igt_assert(ret == CAIRO_STATUS_SUCCESS); + cairo_surface_destroy(surface); + + free(linear); +} + static void scratch_buf_draw_pattern(data_t *data, struct igt_buf *buf, int x, int y, int w, int h, int cx, int cy, int cw, int ch, @@ -199,7 +214,8 @@ scratch_buf_copy(data_t *data, } static void scratch_buf_init(data_t *data, struct igt_buf *buf, - int width, int height, int stride) + int width, int height, int stride, + uint32_t tiling) { drm_intel_bo *bo; int size = height * stride; @@ -210,9 +226,12 @@ static void scratch_buf_init(data_t *data, struct igt_buf *buf, buf->bo = bo; buf->stride = stride; - buf->tiling = I915_TILING_NONE; + buf->tiling = tiling; buf->size = size; + drm_intel_bo_set_tiling(buf->bo, &tiling, buf->stride); + igt_assert_eq(tiling, buf->tiling); + igt_assert(igt_buf_width(buf) == width); igt_assert(igt_buf_height(buf) == height); } @@ -275,73 +294,39 @@ scratch_buf_check_all(data_t *data, free(linear_buf); } -static int opt_handler(int opt, int opt_index, void *data) -{ - if (opt == 'd') { - opt_dump_png = true; - } - - if (opt == 'a') { - check_all_pixels = true; - } - - return 0; -} - -int main(int argc, char **argv) +static void test_basic(data_t *data, uint32_t tiling) { - data_t data = {0, }; - struct intel_batchbuffer *batch = NULL; struct igt_buf src, dst, ref; - igt_render_copyfunc_t render_copy = NULL; int opt_dump_aub = igt_aub_dump_enabled(); - igt_simple_init_parse_opts(&argc, argv, "da", NULL, NULL, - opt_handler, NULL); - - igt_fixture { - data.drm_fd = drm_open_driver_render(DRIVER_INTEL); - data.devid = intel_get_drm_devid(data.drm_fd); - - data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); - igt_assert(data.bufmgr); - - render_copy = igt_get_render_copyfunc(data.devid); - igt_require_f(render_copy, - "no render-copy function\n"); - - batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); - igt_assert(batch); - } - - scratch_buf_init(&data, &src, WIDTH, HEIGHT, STRIDE); - scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE); - scratch_buf_init(&data, &ref, WIDTH, HEIGHT, STRIDE); + scratch_buf_init(data, &src, WIDTH, HEIGHT, STRIDE, tiling); + scratch_buf_init(data, &dst, WIDTH, HEIGHT, STRIDE, tiling); + scratch_buf_init(data, &ref, WIDTH, HEIGHT, STRIDE, I915_TILING_NONE); - scratch_buf_draw_pattern(&data, &src, + scratch_buf_draw_pattern(data, &src, 0, 0, WIDTH, HEIGHT, 0, 0, WIDTH, HEIGHT, true); - scratch_buf_draw_pattern(&data, &dst, + scratch_buf_draw_pattern(data, &dst, 0, 0, WIDTH, HEIGHT, 0, 0, WIDTH, HEIGHT, false); - scratch_buf_copy(&data, + scratch_buf_copy(data, &dst, 0, 0, WIDTH, HEIGHT, &ref, 0, 0); - scratch_buf_copy(&data, + scratch_buf_copy(data, &src, WIDTH/4, WIDTH/4, WIDTH/2, HEIGHT/2, &ref, WIDTH/2-1, WIDTH/2-1); if (opt_dump_png) { - scratch_buf_write_to_png(&src, "source.png"); - scratch_buf_write_to_png(&dst, "destination.png"); - scratch_buf_write_to_png(&ref, "reference.png"); + scratch_buf_write_to_png(data, &src, "source.png"); + scratch_buf_write_to_png(data, &dst, "destination.png"); + scratch_buf_write_to_png(data, &ref, "reference.png"); } if (opt_dump_aub) { - drm_intel_bufmgr_gem_set_aub_filename(data.bufmgr, + drm_intel_bufmgr_gem_set_aub_filename(data->bufmgr, "rendercopy.aub"); - drm_intel_bufmgr_gem_set_aub_dump(data.bufmgr, true); + drm_intel_bufmgr_gem_set_aub_dump(data->bufmgr, true); } /* This will copy the src to the mid point of the dst buffer. Presumably @@ -352,24 +337,74 @@ int main(int argc, char **argv) * |dst|src| * ------- */ - render_copy(batch, NULL, - &src, WIDTH/4, HEIGHT/4, WIDTH/2, HEIGHT/2, - &dst, WIDTH/2-1, HEIGHT/2-1); + data->render_copy(data->batch, NULL, + &src, WIDTH/4, HEIGHT/4, WIDTH/2, HEIGHT/2, + &dst, WIDTH/2-1, HEIGHT/2-1); if (opt_dump_png) - scratch_buf_write_to_png(&dst, "result.png"); + scratch_buf_write_to_png(data, &dst, "result.png"); if (opt_dump_aub) { drm_intel_gem_bo_aub_dump_bmp(dst.bo, 0, 0, WIDTH, HEIGHT, AUB_DUMP_BMP_FORMAT_ARGB_8888, STRIDE, 0); - drm_intel_bufmgr_gem_set_aub_dump(data.bufmgr, false); + drm_intel_bufmgr_gem_set_aub_dump(data->bufmgr, false); } else if (check_all_pixels) { - scratch_buf_check_all(&data, &dst, &ref); + scratch_buf_check_all(data, &dst, &ref); } else { - scratch_buf_check(&data, &dst, &ref, 10, 10); - scratch_buf_check(&data, &dst, &ref, WIDTH - 10, HEIGHT - 10); + scratch_buf_check(data, &dst, &ref, 10, 10); + scratch_buf_check(data, &dst, &ref, WIDTH - 10, HEIGHT - 10); + } +} + +static int opt_handler(int opt, int opt_index, void *data) +{ + if (opt == 'd') { + opt_dump_png = true; + } + + if (opt == 'a') { + check_all_pixels = true; + } + + return 0; +} + +int main(int argc, char **argv) +{ + data_t data = {0, }; + + igt_subtest_init_parse_opts(&argc, argv, "da", NULL, NULL, + opt_handler, NULL); + + igt_fixture { + data.drm_fd = drm_open_driver_render(DRIVER_INTEL); + data.devid = intel_get_drm_devid(data.drm_fd); + + data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); + igt_assert(data.bufmgr); + + data.render_copy = igt_get_render_copyfunc(data.devid); + igt_require_f(data.render_copy, + "no render-copy function\n"); + + data.batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); + igt_assert(data.batch); + } + + igt_subtest("linear") + test_basic(&data, I915_TILING_NONE); + + igt_subtest("x-tiled") + test_basic(&data, I915_TILING_X); + + igt_subtest("y-tiled") + test_basic(&data, I915_TILING_Y); + + igt_fixture { + intel_batchbuffer_free(data.batch); + drm_intel_bufmgr_destroy(data.bufmgr); } igt_exit(); -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes Ville Syrjala @ 2018-07-04 16:36 ` Chris Wilson 2018-07-04 16:45 ` Chris Wilson 2018-07-05 18:27 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala 2 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-04 16:36 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:45) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Make sure our rendercopy implementations do the right thing with > tiled buffers. > > For now we'll just do linear->linear, x-tiled->x-tiled, and > y-tiled->y-tiled. Not sure there's much point in adding tests > for different src vs. dst tiling modes? I value inter-tiling tests more than src_tiling == dst_tiling. It would be quite easy for two mistakes to cancel themselves out if the tiling op was reversible. If you want to save a bit of time, keep the destination the same and use 3 sources in each pass (tr, bl, br?). -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes Ville Syrjala 2018-07-04 16:36 ` Chris Wilson @ 2018-07-04 16:45 ` Chris Wilson 2018-07-05 18:27 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala 2 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-04 16:45 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:45) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Make sure our rendercopy implementations do the right thing with > tiled buffers. > > For now we'll just do linear->linear, x-tiled->x-tiled, and > y-tiled->y-tiled. Not sure there's much point in adding tests > for different src vs. dst tiling modes? > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > static void scratch_buf_init(data_t *data, struct igt_buf *buf, > - int width, int height, int stride) > + int width, int height, int stride, > + uint32_t tiling) > { > drm_intel_bo *bo; > int size = height * stride; > @@ -210,9 +226,12 @@ static void scratch_buf_init(data_t *data, struct igt_buf *buf, > > buf->bo = bo; > buf->stride = stride; > - buf->tiling = I915_TILING_NONE; > + buf->tiling = tiling; > buf->size = size; > > + drm_intel_bo_set_tiling(buf->bo, &tiling, buf->stride); > + igt_assert_eq(tiling, buf->tiling); I'd feel more confident with drm_intel_bo *bo; - int size = height * stride; + uint32_t tiling = req_tiling; + unsigned long pitch; - bo = drm_intel_bo_alloc(data->bufmgr, "", size, 4096); + bo = drm_intel_bo_alloc_tiled(data->bufmgr, "", + width, height, 4, + &tiling, &pitch, 0); + igt_assert(tiling === req_tiling); buf->bo = bo; - buf->stride = stride; - buf->tiling = I915_TILING_NONE; - buf->size = size; + buf->stride = pitch; + buf->tiling = tiling; + buf->size = pitch * height; It just so happens that STRIDE is a tile width, but testing odd drawables might be useful (considering recent bugs ;) -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t v2 6/7] tests/gem_render_copy: Add subtests for different tiling modes 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes Ville Syrjala 2018-07-04 16:36 ` Chris Wilson 2018-07-04 16:45 ` Chris Wilson @ 2018-07-05 18:27 ` Ville Syrjala 2018-07-05 18:43 ` Chris Wilson 2 siblings, 1 reply; 28+ messages in thread From: Ville Syrjala @ 2018-07-05 18:27 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> Make sure our rendercopy implementations do the right thing with tiled buffers. For now we'll just do linear->linear, x-tiled->x-tiled, and y-tiled->y-tiled. Not sure there's much point in adding tests for different src vs. dst tiling modes? v2: Test all tiling combos (Chris) Allocate with drm_intel_bo_alloc_tiled() (Chris) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_render_copy.c | 230 ++++++++++++++++++++++++++++++------------------ 1 file changed, 145 insertions(+), 85 deletions(-) diff --git a/tests/gem_render_copy.c b/tests/gem_render_copy.c index 956f83f4b3a5..0798fdf7cdcc 100644 --- a/tests/gem_render_copy.c +++ b/tests/gem_render_copy.c @@ -51,32 +51,25 @@ IGT_TEST_DESCRIPTION("Basic test for the render_copy() function."); #define WIDTH 512 -#define STRIDE (WIDTH*4) #define HEIGHT 512 typedef struct { int drm_fd; uint32_t devid; drm_intel_bufmgr *bufmgr; + struct intel_batchbuffer *batch; + igt_render_copyfunc_t render_copy; } data_t; static int opt_dump_png = false; static int check_all_pixels = false; -static void scratch_buf_write_to_png(struct igt_buf *buf, const char *filename) +static const char *make_filename(const char *filename) { - cairo_surface_t *surface; - cairo_status_t ret; + static char buf[64]; - drm_intel_bo_map(buf->bo, 0); - surface = cairo_image_surface_create_for_data(buf->bo->virtual, - CAIRO_FORMAT_RGB24, - igt_buf_width(buf), - igt_buf_height(buf), - buf->stride); - ret = cairo_surface_write_to_png(surface, filename); - igt_assert(ret == CAIRO_STATUS_SUCCESS); - cairo_surface_destroy(surface); - drm_intel_bo_unmap(buf->bo); + snprintf(buf, sizeof(buf), "%s_%s", igt_subtest_name(), filename); + + return buf; } static void *linear_copy(data_t *data, struct igt_buf *buf) @@ -98,6 +91,27 @@ static void *linear_copy(data_t *data, struct igt_buf *buf) return linear; } +static void scratch_buf_write_to_png(data_t *data, struct igt_buf *buf, + const char *filename) +{ + cairo_surface_t *surface; + cairo_status_t ret; + void *linear; + + linear = linear_copy(data, buf); + + surface = cairo_image_surface_create_for_data(linear, + CAIRO_FORMAT_RGB24, + igt_buf_width(buf), + igt_buf_height(buf), + buf->stride); + ret = cairo_surface_write_to_png(surface, make_filename(filename)); + igt_assert(ret == CAIRO_STATUS_SUCCESS); + cairo_surface_destroy(surface); + + free(linear); +} + static void scratch_buf_draw_pattern(data_t *data, struct igt_buf *buf, int x, int y, int w, int h, int cx, int cy, int cw, int ch, @@ -199,19 +213,22 @@ scratch_buf_copy(data_t *data, } static void scratch_buf_init(data_t *data, struct igt_buf *buf, - int width, int height, int stride) + int width, int height, + uint32_t req_tiling) { - drm_intel_bo *bo; - int size = height * stride; - - bo = drm_intel_bo_alloc(data->bufmgr, "", size, 4096); + uint32_t tiling = req_tiling; + unsigned long pitch; memset(buf, 0, sizeof(*buf)); - buf->bo = bo; - buf->stride = stride; - buf->tiling = I915_TILING_NONE; - buf->size = size; + buf->bo = drm_intel_bo_alloc_tiled(data->bufmgr, "", + width, height, 4, + &tiling, &pitch, 0); + igt_assert_eq(tiling, req_tiling); + + buf->stride = pitch; + buf->tiling = tiling; + buf->size = pitch * height; igt_assert(igt_buf_width(buf) == width); igt_assert(igt_buf_height(buf) == height); @@ -275,73 +292,66 @@ scratch_buf_check_all(data_t *data, free(linear_buf); } -static int opt_handler(int opt, int opt_index, void *data) +static void test(data_t *data, uint32_t tiling) { - if (opt == 'd') { - opt_dump_png = true; - } - - if (opt == 'a') { - check_all_pixels = true; - } - - return 0; -} + struct igt_buf dst, ref; + struct { + struct igt_buf buf; + const char *filename; + uint32_t tiling; + int x, y; + } src[3] = { + { + .filename = "source-linear.png", + .tiling = I915_TILING_NONE, + .x = 1, .y = HEIGHT/2+1, + }, + { + .filename = "source-x-tiled.png", + .tiling = I915_TILING_X, + .x = WIDTH/2+1, .y = HEIGHT/2+1, + }, + { + .filename = "source-y-tiled.png", + .tiling = I915_TILING_Y, + .x = WIDTH/2+1, .y = 1, + }, + }; -int main(int argc, char **argv) -{ - data_t data = {0, }; - struct intel_batchbuffer *batch = NULL; - struct igt_buf src, dst, ref; - igt_render_copyfunc_t render_copy = NULL; int opt_dump_aub = igt_aub_dump_enabled(); - igt_simple_init_parse_opts(&argc, argv, "da", NULL, NULL, - opt_handler, NULL); + for (int i = 0; i < ARRAY_SIZE(src); i++) + scratch_buf_init(data, &src[i].buf, WIDTH, HEIGHT, src[i].tiling); + scratch_buf_init(data, &dst, WIDTH, HEIGHT, tiling); + scratch_buf_init(data, &ref, WIDTH, HEIGHT, I915_TILING_NONE); - igt_fixture { - data.drm_fd = drm_open_driver_render(DRIVER_INTEL); - data.devid = intel_get_drm_devid(data.drm_fd); - - data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); - igt_assert(data.bufmgr); - - render_copy = igt_get_render_copyfunc(data.devid); - igt_require_f(render_copy, - "no render-copy function\n"); - - batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); - igt_assert(batch); - } - - scratch_buf_init(&data, &src, WIDTH, HEIGHT, STRIDE); - scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE); - scratch_buf_init(&data, &ref, WIDTH, HEIGHT, STRIDE); - - scratch_buf_draw_pattern(&data, &src, - 0, 0, WIDTH, HEIGHT, - 0, 0, WIDTH, HEIGHT, true); - scratch_buf_draw_pattern(&data, &dst, + for (int i = 0; i < ARRAY_SIZE(src); i++) + scratch_buf_draw_pattern(data, &src[i].buf, + 0, 0, WIDTH, HEIGHT, + 0, 0, WIDTH, HEIGHT, true); + scratch_buf_draw_pattern(data, &dst, 0, 0, WIDTH, HEIGHT, 0, 0, WIDTH, HEIGHT, false); - scratch_buf_copy(&data, + scratch_buf_copy(data, &dst, 0, 0, WIDTH, HEIGHT, &ref, 0, 0); - scratch_buf_copy(&data, - &src, WIDTH/4, WIDTH/4, WIDTH/2, HEIGHT/2, - &ref, WIDTH/2-1, WIDTH/2-1); + for (int i = 0; i < ARRAY_SIZE(src); i++) + scratch_buf_copy(data, + &src[i].buf, WIDTH/4, HEIGHT/4, WIDTH/2-2, HEIGHT/2-2, + &ref, src[i].x, src[i].y); if (opt_dump_png) { - scratch_buf_write_to_png(&src, "source.png"); - scratch_buf_write_to_png(&dst, "destination.png"); - scratch_buf_write_to_png(&ref, "reference.png"); + for (int i = 0; i < ARRAY_SIZE(src); i++) + scratch_buf_write_to_png(data, &src[i].buf, src[i].filename); + scratch_buf_write_to_png(data, &dst, "destination.png"); + scratch_buf_write_to_png(data, &ref, "reference.png"); } if (opt_dump_aub) { - drm_intel_bufmgr_gem_set_aub_filename(data.bufmgr, + drm_intel_bufmgr_gem_set_aub_filename(data->bufmgr, "rendercopy.aub"); - drm_intel_bufmgr_gem_set_aub_dump(data.bufmgr, true); + drm_intel_bufmgr_gem_set_aub_dump(data->bufmgr, true); } /* This will copy the src to the mid point of the dst buffer. Presumably @@ -352,24 +362,74 @@ int main(int argc, char **argv) * |dst|src| * ------- */ - render_copy(batch, NULL, - &src, WIDTH/4, HEIGHT/4, WIDTH/2, HEIGHT/2, - &dst, WIDTH/2-1, HEIGHT/2-1); + for (int i = 0; i < ARRAY_SIZE(src); i++) + data->render_copy(data->batch, NULL, + &src[i].buf, WIDTH/4, HEIGHT/4, WIDTH/2-2, HEIGHT/2-2, + &dst, src[i].x, src[i].y); if (opt_dump_png) - scratch_buf_write_to_png(&dst, "result.png"); + scratch_buf_write_to_png(data, &dst, "result.png"); if (opt_dump_aub) { drm_intel_gem_bo_aub_dump_bmp(dst.bo, - 0, 0, WIDTH, HEIGHT, - AUB_DUMP_BMP_FORMAT_ARGB_8888, - STRIDE, 0); - drm_intel_bufmgr_gem_set_aub_dump(data.bufmgr, false); + 0, 0, igt_buf_width(&dst), + igt_buf_height(&dst), + AUB_DUMP_BMP_FORMAT_ARGB_8888, + dst.stride, 0); + drm_intel_bufmgr_gem_set_aub_dump(data->bufmgr, false); } else if (check_all_pixels) { - scratch_buf_check_all(&data, &dst, &ref); + scratch_buf_check_all(data, &dst, &ref); } else { - scratch_buf_check(&data, &dst, &ref, 10, 10); - scratch_buf_check(&data, &dst, &ref, WIDTH - 10, HEIGHT - 10); + scratch_buf_check(data, &dst, &ref, 10, 10); + scratch_buf_check(data, &dst, &ref, WIDTH - 10, HEIGHT - 10); + } +} + +static int opt_handler(int opt, int opt_index, void *data) +{ + if (opt == 'd') { + opt_dump_png = true; + } + + if (opt == 'a') { + check_all_pixels = true; + } + + return 0; +} + +int main(int argc, char **argv) +{ + data_t data = {0, }; + + igt_subtest_init_parse_opts(&argc, argv, "da", NULL, NULL, + opt_handler, NULL); + + igt_fixture { + data.drm_fd = drm_open_driver_render(DRIVER_INTEL); + data.devid = intel_get_drm_devid(data.drm_fd); + + data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096); + igt_assert(data.bufmgr); + + data.render_copy = igt_get_render_copyfunc(data.devid); + igt_require_f(data.render_copy, + "no render-copy function\n"); + + data.batch = intel_batchbuffer_alloc(data.bufmgr, data.devid); + igt_assert(data.batch); + } + + igt_subtest("linear") + test(&data, I915_TILING_NONE); + igt_subtest("x-tiled") + test(&data, I915_TILING_X); + igt_subtest("y-tiled") + test(&data, I915_TILING_Y); + + igt_fixture { + intel_batchbuffer_free(data.batch); + drm_intel_bufmgr_destroy(data.bufmgr); } igt_exit(); -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v2 6/7] tests/gem_render_copy: Add subtests for different tiling modes 2018-07-05 18:27 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala @ 2018-07-05 18:43 ` Chris Wilson 0 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-05 18:43 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-05 19:27:41) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Make sure our rendercopy implementations do the right thing with > tiled buffers. > > For now we'll just do linear->linear, x-tiled->x-tiled, and > y-tiled->y-tiled. Not sure there's much point in adding tests > for different src vs. dst tiling modes? > > v2: Test all tiling combos (Chris) > Allocate with drm_intel_bo_alloc_tiled() (Chris) > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (4 preceding siblings ...) 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes Ville Syrjala @ 2018-07-04 16:16 ` Ville Syrjala 2018-07-05 18:28 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala 2018-07-04 16:46 ` [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Chris Wilson ` (4 subsequent siblings) 10 siblings, 1 reply; 28+ messages in thread From: Ville Syrjala @ 2018-07-04 16:16 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> Add a new subtest that does renders the test pattern into a compressed buffer. And we'll follow it up with another copy back to an uncompressed buffer so that we also test the capability to sampled from compressed buffers, and also so that we can actually compare the results against the reference image. We'll also do a quick check of the aux surface to check that it actually indicates that at least some parts of the buffer were in fact compressed. Further visual verification can be done via the dumped png. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_render_copy.c | 197 +++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 186 insertions(+), 11 deletions(-) diff --git a/tests/gem_render_copy.c b/tests/gem_render_copy.c index 13198dfcb3fd..a2e9d32bfed7 100644 --- a/tests/gem_render_copy.c +++ b/tests/gem_render_copy.c @@ -113,6 +113,61 @@ static void scratch_buf_write_to_png(data_t *data, struct igt_buf *buf, free(linear); } +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) + +static int scratch_buf_aux_width(const struct igt_buf *buf) +{ + return DIV_ROUND_UP(igt_buf_width(buf), 1024) * 128; +} + +static int scratch_buf_aux_height(const struct igt_buf *buf) +{ + return DIV_ROUND_UP(igt_buf_height(buf), 512) * 32; +} + +static void *linear_copy_aux(data_t *data, struct igt_buf *buf) +{ + void *map, *linear; + int aux_size = scratch_buf_aux_width(buf) * + scratch_buf_aux_height(buf); + + igt_assert_eq(posix_memalign(&linear, 16, aux_size), 0); + + gem_set_domain(data->drm_fd, buf->bo->handle, + I915_GEM_DOMAIN_GTT, 0); + + map = gem_mmap__gtt(data->drm_fd, buf->bo->handle, + buf->bo->size, PROT_READ); + + igt_memcpy_from_wc(linear, map + buf->aux.offset, aux_size); + + munmap(map, buf->bo->size); + + return linear; +} + +static void scratch_buf_aux_write_to_png(data_t *data, + struct igt_buf *buf, + const char *filename) +{ + cairo_surface_t *surface; + cairo_status_t ret; + void *linear; + + linear = linear_copy_aux(data, buf); + + surface = cairo_image_surface_create_for_data(linear, + CAIRO_FORMAT_A8, + scratch_buf_aux_width(buf), + scratch_buf_aux_height(buf), + buf->aux.stride); + ret = cairo_surface_write_to_png(surface, make_filename(filename)); + igt_assert(ret == CAIRO_STATUS_SUCCESS); + cairo_surface_destroy(surface); + + free(linear); +} + static void scratch_buf_draw_pattern(data_t *data, struct igt_buf *buf, int x, int y, int w, int h, int cx, int cy, int cw, int ch, @@ -215,19 +270,37 @@ scratch_buf_copy(data_t *data, static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, int stride, - uint32_t tiling) + uint32_t tiling, bool ccs) { - drm_intel_bo *bo; int size = height * stride; - bo = drm_intel_bo_alloc(data->bufmgr, "", size, 4096); - memset(buf, 0, sizeof(*buf)); - buf->bo = bo; - buf->stride = stride; - buf->tiling = tiling; - buf->size = size; + if (ccs) { + int aux_width, aux_height; + + igt_require(intel_gen(data->drm_fd) >= 9); + + igt_assert_eq(tiling, I915_TILING_Y); + + buf->size = size; + buf->stride = stride; + buf->tiling = tiling; + + aux_width = scratch_buf_aux_width(buf); + aux_height = scratch_buf_aux_height(buf); + + buf->aux.offset = ALIGN(size, 4096); + buf->aux.stride = aux_width; + + size = buf->aux.offset + aux_width * aux_height; + } else { + buf->size = size; + buf->stride = stride; + buf->tiling = tiling; + } + + buf->bo = drm_intel_bo_alloc(data->bufmgr, "", size, 4096); drm_intel_bo_set_tiling(buf->bo, &tiling, buf->stride); igt_assert_eq(tiling, buf->tiling); @@ -294,14 +367,35 @@ scratch_buf_check_all(data_t *data, free(linear_buf); } +static void scratch_buf_aux_check(data_t *data, + struct igt_buf *buf) +{ + int aux_size = scratch_buf_aux_width(buf) * + scratch_buf_aux_height(buf); + uint8_t *linear; + int i; + + linear = linear_copy_aux(data, buf); + + for (i = 0; i < aux_size; i++) { + if (linear[i]) + break; + } + + free(linear); + + igt_assert_f(i < aux_size, + "Aux surface indicates that nothing was compressed\n"); +} + static void test_basic(data_t *data, uint32_t tiling) { struct igt_buf src, dst, ref; int opt_dump_aub = igt_aub_dump_enabled(); - scratch_buf_init(data, &src, WIDTH, HEIGHT, STRIDE, tiling); - scratch_buf_init(data, &dst, WIDTH, HEIGHT, STRIDE, tiling); - scratch_buf_init(data, &ref, WIDTH, HEIGHT, STRIDE, I915_TILING_NONE); + scratch_buf_init(data, &src, WIDTH, HEIGHT, STRIDE, tiling, false); + scratch_buf_init(data, &dst, WIDTH, HEIGHT, STRIDE, tiling, false); + scratch_buf_init(data, &ref, WIDTH, HEIGHT, STRIDE, I915_TILING_NONE, false); scratch_buf_draw_pattern(data, &src, 0, 0, WIDTH, HEIGHT, @@ -358,6 +452,84 @@ static void test_basic(data_t *data, uint32_t tiling) } } +static void test_ccs(data_t *data, uint32_t tiling) +{ + struct intel_batchbuffer *batch = data->batch; + struct igt_buf src, dst, ccs, ref; + int opt_dump_aub = igt_aub_dump_enabled(); + + scratch_buf_init(data, &src, WIDTH, HEIGHT, STRIDE, I915_TILING_NONE, false); + scratch_buf_init(data, &dst, WIDTH, HEIGHT, STRIDE, I915_TILING_NONE, false); + scratch_buf_init(data, &ccs, WIDTH, HEIGHT, STRIDE, tiling, true); + scratch_buf_init(data, &ref, WIDTH, HEIGHT, STRIDE, I915_TILING_NONE, false); + + scratch_buf_draw_pattern(data, &src, + 0, 0, WIDTH, HEIGHT, + 0, 0, WIDTH, HEIGHT, true); + scratch_buf_draw_pattern(data, &dst, + 0, 0, WIDTH, HEIGHT, + 0, 0, WIDTH, HEIGHT, false); + + scratch_buf_copy(data, + &dst, 0, 0, WIDTH, HEIGHT, + &ref, 0, 0); + scratch_buf_copy(data, + &src, WIDTH/4, WIDTH/4, WIDTH/2, HEIGHT/2, + &ref, WIDTH/2-1, WIDTH/2-1); + + if (opt_dump_png) { + scratch_buf_write_to_png(data, &src, "source.png"); + scratch_buf_write_to_png(data, &dst, "destination.png"); + scratch_buf_write_to_png(data, &ref, "reference.png"); + } + + if (opt_dump_aub) { + drm_intel_bufmgr_gem_set_aub_filename(data->bufmgr, + "rendercopy.aub"); + drm_intel_bufmgr_gem_set_aub_dump(data->bufmgr, true); + } + + /* This will copy the src to the mid point of the dst buffer. Presumably + * the out of bounds accesses will get clipped. + * Resulting buffer should look like: + * _______ + * |dst|dst| + * |dst|src| + * ------- + */ + data->render_copy(batch, NULL, + &dst, 0, 0, WIDTH, HEIGHT, + &ccs, 0, 0); + data->render_copy(batch, NULL, + &src, WIDTH/4, HEIGHT/4, WIDTH/2, HEIGHT/2, + &ccs, WIDTH/2-1, HEIGHT/2-1); + + data->render_copy(batch, NULL, + &ccs, 0, 0, WIDTH, HEIGHT, + &dst, 0, 0); + + if (opt_dump_png) { + scratch_buf_write_to_png(data, &dst, "result.png"); + scratch_buf_write_to_png(data, &ccs, "compressed.png"); + scratch_buf_aux_write_to_png(data, &ccs, "compressed-aux.png"); + } + + if (opt_dump_aub) { + drm_intel_gem_bo_aub_dump_bmp(dst.bo, + 0, 0, WIDTH, HEIGHT, + AUB_DUMP_BMP_FORMAT_ARGB_8888, + STRIDE, 0); + drm_intel_bufmgr_gem_set_aub_dump(data->bufmgr, false); + } else if (check_all_pixels) { + scratch_buf_check_all(data, &dst, &ref); + } else { + scratch_buf_check(data, &dst, &ref, 10, 10); + scratch_buf_check(data, &dst, &ref, WIDTH - 10, HEIGHT - 10); + } + + scratch_buf_aux_check(data, &ccs); +} + static int opt_handler(int opt, int opt_index, void *data) { if (opt == 'd') { @@ -402,6 +574,9 @@ int main(int argc, char **argv) igt_subtest("y-tiled") test_basic(&data, I915_TILING_Y); + igt_subtest("y-tiled-ccs") + test_ccs(&data, I915_TILING_Y); + igt_fixture { intel_batchbuffer_free(data.batch); drm_intel_bufmgr_destroy(data.bufmgr); -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [igt-dev] [PATCH i-g-t v2 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E Ville Syrjala @ 2018-07-05 18:28 ` Ville Syrjala 2018-07-05 19:38 ` Chris Wilson 0 siblings, 1 reply; 28+ messages in thread From: Ville Syrjala @ 2018-07-05 18:28 UTC (permalink / raw) To: igt-dev From: Ville Syrjälä <ville.syrjala@linux.intel.com> Add a new subtest that does renders the test pattern into a compressed buffer. And we'll follow it up with another copy back to an uncompressed buffer so that we also test the capability to sampled from compressed buffers, and also so that we can actually compare the results against the reference image. We'll also do a quick check of the aux surface to check that it actually indicates that at least some parts of the buffer were in fact compressed. Further visual verification can be done via the dumped png. v2: Test various tiling formats with CCS as well Combine the ccs test into the same function as the rest Pass the correct thing to intel_gen() Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- tests/gem_render_copy.c | 164 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 146 insertions(+), 18 deletions(-) diff --git a/tests/gem_render_copy.c b/tests/gem_render_copy.c index 0798fdf7cdcc..8373cd738e49 100644 --- a/tests/gem_render_copy.c +++ b/tests/gem_render_copy.c @@ -112,6 +112,61 @@ static void scratch_buf_write_to_png(data_t *data, struct igt_buf *buf, free(linear); } +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) + +static int scratch_buf_aux_width(const struct igt_buf *buf) +{ + return DIV_ROUND_UP(igt_buf_width(buf), 1024) * 128; +} + +static int scratch_buf_aux_height(const struct igt_buf *buf) +{ + return DIV_ROUND_UP(igt_buf_height(buf), 512) * 32; +} + +static void *linear_copy_aux(data_t *data, struct igt_buf *buf) +{ + void *map, *linear; + int aux_size = scratch_buf_aux_width(buf) * + scratch_buf_aux_height(buf); + + igt_assert_eq(posix_memalign(&linear, 16, aux_size), 0); + + gem_set_domain(data->drm_fd, buf->bo->handle, + I915_GEM_DOMAIN_GTT, 0); + + map = gem_mmap__gtt(data->drm_fd, buf->bo->handle, + buf->bo->size, PROT_READ); + + igt_memcpy_from_wc(linear, map + buf->aux.offset, aux_size); + + munmap(map, buf->bo->size); + + return linear; +} + +static void scratch_buf_aux_write_to_png(data_t *data, + struct igt_buf *buf, + const char *filename) +{ + cairo_surface_t *surface; + cairo_status_t ret; + void *linear; + + linear = linear_copy_aux(data, buf); + + surface = cairo_image_surface_create_for_data(linear, + CAIRO_FORMAT_A8, + scratch_buf_aux_width(buf), + scratch_buf_aux_height(buf), + buf->aux.stride); + ret = cairo_surface_write_to_png(surface, make_filename(filename)); + igt_assert(ret == CAIRO_STATUS_SUCCESS); + cairo_surface_destroy(surface); + + free(linear); +} + static void scratch_buf_draw_pattern(data_t *data, struct igt_buf *buf, int x, int y, int w, int h, int cx, int cy, int cw, int ch, @@ -214,21 +269,46 @@ scratch_buf_copy(data_t *data, static void scratch_buf_init(data_t *data, struct igt_buf *buf, int width, int height, - uint32_t req_tiling) + uint32_t req_tiling, bool ccs) { uint32_t tiling = req_tiling; unsigned long pitch; memset(buf, 0, sizeof(*buf)); - buf->bo = drm_intel_bo_alloc_tiled(data->bufmgr, "", - width, height, 4, - &tiling, &pitch, 0); - igt_assert_eq(tiling, req_tiling); + if (ccs) { + int aux_width, aux_height; + int size; + + igt_require(intel_gen(data->devid) >= 9); + igt_assert_eq(tiling, I915_TILING_Y); + + buf->stride = ALIGN(width * 4, 128); + buf->size = buf->stride * height; + buf->tiling = tiling; - buf->stride = pitch; - buf->tiling = tiling; - buf->size = pitch * height; + aux_width = scratch_buf_aux_width(buf); + aux_height = scratch_buf_aux_height(buf); + + buf->aux.offset = buf->stride * ALIGN(height, 32); + buf->aux.stride = aux_width; + + size = buf->aux.offset + aux_width * aux_height; + + buf->bo = drm_intel_bo_alloc(data->bufmgr, "", size, 4096); + + drm_intel_bo_set_tiling(buf->bo, &tiling, buf->stride); + igt_assert_eq(tiling, req_tiling); + } else { + buf->bo = drm_intel_bo_alloc_tiled(data->bufmgr, "", + width, height, 4, + &tiling, &pitch, 0); + igt_assert_eq(tiling, req_tiling); + + buf->stride = pitch; + buf->tiling = tiling; + buf->size = pitch * height; + } igt_assert(igt_buf_width(buf) == width); igt_assert(igt_buf_height(buf) == height); @@ -292,9 +372,30 @@ scratch_buf_check_all(data_t *data, free(linear_buf); } -static void test(data_t *data, uint32_t tiling) +static void scratch_buf_aux_check(data_t *data, + struct igt_buf *buf) +{ + int aux_size = scratch_buf_aux_width(buf) * + scratch_buf_aux_height(buf); + uint8_t *linear; + int i; + + linear = linear_copy_aux(data, buf); + + for (i = 0; i < aux_size; i++) { + if (linear[i]) + break; + } + + free(linear); + + igt_assert_f(i < aux_size, + "Aux surface indicates that nothing was compressed\n"); +} + +static void test(data_t *data, uint32_t tiling, bool test_ccs) { - struct igt_buf dst, ref; + struct igt_buf dst, ccs, ref; struct { struct igt_buf buf; const char *filename; @@ -321,9 +422,11 @@ static void test(data_t *data, uint32_t tiling) int opt_dump_aub = igt_aub_dump_enabled(); for (int i = 0; i < ARRAY_SIZE(src); i++) - scratch_buf_init(data, &src[i].buf, WIDTH, HEIGHT, src[i].tiling); - scratch_buf_init(data, &dst, WIDTH, HEIGHT, tiling); - scratch_buf_init(data, &ref, WIDTH, HEIGHT, I915_TILING_NONE); + scratch_buf_init(data, &src[i].buf, WIDTH, HEIGHT, src[i].tiling, false); + scratch_buf_init(data, &dst, WIDTH, HEIGHT, tiling, false); + if (test_ccs) + scratch_buf_init(data, &ccs, WIDTH, HEIGHT, I915_TILING_Y, true); + scratch_buf_init(data, &ref, WIDTH, HEIGHT, I915_TILING_NONE, false); for (int i = 0; i < ARRAY_SIZE(src); i++) scratch_buf_draw_pattern(data, &src[i].buf, @@ -362,13 +465,28 @@ static void test(data_t *data, uint32_t tiling) * |dst|src| * ------- */ + if (test_ccs) + data->render_copy(data->batch, NULL, + &dst, 0, 0, WIDTH, HEIGHT, + &ccs, 0, 0); + for (int i = 0; i < ARRAY_SIZE(src); i++) data->render_copy(data->batch, NULL, &src[i].buf, WIDTH/4, HEIGHT/4, WIDTH/2-2, HEIGHT/2-2, - &dst, src[i].x, src[i].y); + test_ccs ? &ccs : &dst, src[i].x, src[i].y); + + if (test_ccs) + data->render_copy(data->batch, NULL, + &ccs, 0, 0, WIDTH, HEIGHT, + &dst, 0, 0); - if (opt_dump_png) + if (opt_dump_png){ scratch_buf_write_to_png(data, &dst, "result.png"); + if (test_ccs) { + scratch_buf_write_to_png(data, &ccs, "compressed.png"); + scratch_buf_aux_write_to_png(data, &ccs, "compressed-aux.png"); + } + } if (opt_dump_aub) { drm_intel_gem_bo_aub_dump_bmp(dst.bo, @@ -383,6 +501,9 @@ static void test(data_t *data, uint32_t tiling) scratch_buf_check(data, &dst, &ref, 10, 10); scratch_buf_check(data, &dst, &ref, WIDTH - 10, HEIGHT - 10); } + + if (test_ccs) + scratch_buf_aux_check(data, &ccs); } static int opt_handler(int opt, int opt_index, void *data) @@ -421,11 +542,18 @@ int main(int argc, char **argv) } igt_subtest("linear") - test(&data, I915_TILING_NONE); + test(&data, I915_TILING_NONE, false); igt_subtest("x-tiled") - test(&data, I915_TILING_X); + test(&data, I915_TILING_X, false); igt_subtest("y-tiled") - test(&data, I915_TILING_Y); + test(&data, I915_TILING_Y, false); + + igt_subtest("y-tiled-ccs-to-linear") + test(&data, I915_TILING_NONE, true); + igt_subtest("y-tiled-ccs-to-x-tiled") + test(&data, I915_TILING_X, true); + igt_subtest("y-tiled-ccs-to-y-tiled") + test(&data, I915_TILING_Y, true); igt_fixture { intel_batchbuffer_free(data.batch); -- 2.16.4 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v2 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E 2018-07-05 18:28 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala @ 2018-07-05 19:38 ` Chris Wilson 2018-07-06 12:02 ` Ville Syrjälä 0 siblings, 1 reply; 28+ messages in thread From: Chris Wilson @ 2018-07-05 19:38 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-05 19:28:09) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Add a new subtest that does renders the test pattern into a > compressed buffer. And we'll follow it up with another copy > back to an uncompressed buffer so that we also test the > capability to sampled from compressed buffers, and also so > that we can actually compare the results against the reference > image. Ok, so CCS is being carried along in an adjacent image allocated just after the principle buf. (From the SURFACE_STATE, I expect the HW can use any address as compressed storage, so this layout is for convenience? I ask because I was thinking that maybe it would be easier to have a tiled bo and a separate aux bo.) We then populate this by doing our render copies into the extended CCS surface, and check by copying out again (to perform our resolve) into each of the different target tilings. Therefore we are checking both source and dest with each tiling mode. Code looks fine and I'll trust your alignments. > We'll also do a quick check of the aux surface to check that > it actually indicates that at least some parts of the buffer > were in fact compressed. Further visual verification can be > done via the dumped png. > > v2: Test various tiling formats with CCS as well > Combine the ccs test into the same function as > the rest > Pass the correct thing to intel_gen() > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v2 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E 2018-07-05 19:38 ` Chris Wilson @ 2018-07-06 12:02 ` Ville Syrjälä 0 siblings, 0 replies; 28+ messages in thread From: Ville Syrjälä @ 2018-07-06 12:02 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev On Thu, Jul 05, 2018 at 08:38:29PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2018-07-05 19:28:09) > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Add a new subtest that does renders the test pattern into a > > compressed buffer. And we'll follow it up with another copy > > back to an uncompressed buffer so that we also test the > > capability to sampled from compressed buffers, and also so > > that we can actually compare the results against the reference > > image. > > Ok, so CCS is being carried along in an adjacent image allocated just > after the principle buf. (From the SURFACE_STATE, I expect the HW can > use any address as compressed storage, so this layout is for > convenience? I ask because I was thinking that maybe it would be easier > to have a tiled bo and a separate aux bo.) Hmm. I guess the render engine doesn't have that annoying "aux must be above the main surface" limitation of the display engine. So yeah, we could add a separate aux bo here. But any test involving the display would need to stick to the one bo apporach. -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (5 preceding siblings ...) 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E Ville Syrjala @ 2018-07-04 16:46 ` Chris Wilson 2018-07-04 17:10 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] " Patchwork ` (3 subsequent siblings) 10 siblings, 0 replies; 28+ messages in thread From: Chris Wilson @ 2018-07-04 16:46 UTC (permalink / raw) To: Ville Syrjala, igt-dev Quoting Ville Syrjala (2018-07-04 17:16:40) > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Remove the hardcoded dword offsets for the relocs and instead rely > fully on intel_batchbuffer_subdata_offset(). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Meh, igt looks like the ugly stepsister. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (6 preceding siblings ...) 2018-07-04 16:46 ` [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Chris Wilson @ 2018-07-04 17:10 ` Patchwork 2018-07-04 22:31 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork ` (2 subsequent siblings) 10 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2018-07-04 17:10 UTC (permalink / raw) To: Ville Syrjala; +Cc: igt-dev == Series Details == Series: series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets URL : https://patchwork.freedesktop.org/series/45934/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4426 -> IGTPW_1535 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45934/revisions/1/mbox/ == Known issues == Here are the changes found in IGTPW_1535 that come from known issues: === IGT changes === ==== Issues hit ==== igt@kms_frontbuffer_tracking@basic: fi-bxt-j4205: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-6700hq: PASS -> FAIL (fdo#103167, fdo#104724) fi-bxt-dsi: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-6700k2: PASS -> FAIL (fdo#103167, fdo#104724) fi-kbl-7560u: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-6600u: PASS -> FAIL (fdo#103167, fdo#104724) fi-kbl-r: PASS -> FAIL (fdo#103167, fdo#104724) {fi-cfl-8109u}: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-6260u: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-6770hq: PASS -> FAIL (fdo#103167, fdo#104724) fi-cfl-guc: PASS -> FAIL (fdo#103167, fdo#104724) fi-cfl-s3: PASS -> FAIL (fdo#103167, fdo#104724) fi-whl-u: PASS -> FAIL (fdo#103167, fdo#104724) fi-cfl-8700k: PASS -> FAIL (fdo#103167, fdo#104724) fi-kbl-7500u: PASS -> FAIL (fdo#103167, fdo#104724) fi-kbl-7567u: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-guc: PASS -> FAIL (fdo#103167, fdo#104724) fi-glk-dsi: PASS -> FAIL (fdo#103167, fdo#104724) fi-skl-gvtdvm: PASS -> FAIL (fdo#103167, fdo#104724) {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 == Participating hosts (46 -> 41) == Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * IGT: IGT_4535 -> IGTPW_1535 CI_DRM_4426: 0d85b01cef162a7393e3cb2f89f660e50db316b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1535: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1535/ IGT_4535: 20f4aee0fbc5f5a0b375a512d340e4c453b67de9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@gem_render_copy@linear +igt@gem_render_copy@x-tiled +igt@gem_render_copy@y-tiled +igt@gem_render_copy@y-tiled-ccs -igt@gem_render_copy == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1535/issues.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (7 preceding siblings ...) 2018-07-04 17:10 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] " Patchwork @ 2018-07-04 22:31 ` Patchwork 2018-07-06 0:03 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) Patchwork 2018-07-06 15:26 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 10 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2018-07-04 22:31 UTC (permalink / raw) To: Ville Syrjälä; +Cc: igt-dev == Series Details == Series: series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets URL : https://patchwork.freedesktop.org/series/45934/ State : success == Summary == = CI Bug Log - changes from IGT_4535_full -> IGTPW_1535_full = == Summary - WARNING == Minor unknown changes coming with IGTPW_1535_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_1535_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/45934/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in IGTPW_1535_full: === IGT changes === ==== Warnings ==== igt@gem_mocs_settings@mocs-rc6-dirty-render: shard-kbl: SKIP -> PASS igt@gem_mocs_settings@mocs-rc6-vebox: shard-kbl: PASS -> SKIP +1 == Known issues == Here are the changes found in IGTPW_1535_full that come from known issues: === IGT changes === ==== Issues hit ==== igt@gem_bad_reloc@negative-reloc-bltcopy: shard-snb: PASS -> INCOMPLETE (fdo#105411) igt@gem_exec_schedule@pi-ringfull-bsd: shard-glk: NOTRUN -> FAIL (fdo#103158) +2 igt@gem_mmap_gtt@coherency: shard-glk: NOTRUN -> FAIL (fdo#100587) igt@kms_available_modes_crc@available_mode_test_crc: shard-glk: NOTRUN -> FAIL (fdo#106641) igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: NOTRUN -> FAIL (fdo#106509) igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: shard-apl: PASS -> FAIL (fdo#104724, fdo#103184) +2 igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled: shard-kbl: PASS -> FAIL (fdo#104724, fdo#103184) +1 igt@kms_draw_crc@draw-method-xrgb8888-render-untiled: shard-glk: PASS -> FAIL (fdo#104724) +1 shard-kbl: PASS -> FAIL (fdo#104724) +1 igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled: shard-glk: NOTRUN -> FAIL (fdo#104724) +1 shard-apl: PASS -> FAIL (fdo#104724) +1 igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled: shard-apl: PASS -> FAIL (fdo#103232, fdo#104724) shard-kbl: PASS -> FAIL (fdo#103232, fdo#104724) igt@kms_flip@dpms-vs-vblank-race: shard-glk: PASS -> FAIL (fdo#103060) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: shard-apl: PASS -> FAIL (fdo#104724, fdo#103167) +5 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render: shard-glk: PASS -> FAIL (fdo#104724, fdo#103167) +3 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-kbl: PASS -> FAIL (fdo#104724, fdo#103167) +5 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render: shard-glk: NOTRUN -> FAIL (fdo#104724, fdo#103167) +3 igt@kms_frontbuffer_tracking@fbc-suspend: shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#105959) ==== Possible fixes ==== igt@drv_suspend@shrink: shard-snb: FAIL -> PASS igt@gem_wait@write-wait-bsd: shard-snb: INCOMPLETE (fdo#105411) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-glk: FAIL (fdo#103375) -> PASS igt@kms_fbcon_fbt@fbc-suspend: shard-kbl: DMESG-WARN (fdo#103313) -> PASS +1 igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: FAIL (fdo#102887) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-glk: FAIL (fdo#105189) -> PASS igt@kms_rotation_crc@primary-rotation-180: shard-hsw: FAIL (fdo#104724, fdo#103925) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS ==== Warnings ==== igt@drv_selftest@live_gtt: shard-kbl: FAIL (fdo#105347) -> INCOMPLETE (fdo#103665) shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> FAIL (fdo#105347) fdo#100587 https://bugs.freedesktop.org/show_bug.cgi?id=100587 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105959 https://bugs.freedesktop.org/show_bug.cgi?id=105959 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * IGT: IGT_4535 -> IGTPW_1535 * Linux: CI_DRM_4425 -> CI_DRM_4426 CI_DRM_4425: 655f2c563a64861ef52008d968092a62644caf96 @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_4426: 0d85b01cef162a7393e3cb2f89f660e50db316b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1535: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1535/ IGT_4535: 20f4aee0fbc5f5a0b375a512d340e4c453b67de9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1535/shards.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (8 preceding siblings ...) 2018-07-04 22:31 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork @ 2018-07-06 0:03 ` Patchwork 2018-07-06 15:26 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 10 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2018-07-06 0:03 UTC (permalink / raw) To: Ville Syrjala; +Cc: igt-dev == Series Details == Series: series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) URL : https://patchwork.freedesktop.org/series/45934/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4434 -> IGTPW_1537 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45934/revisions/3/mbox/ == Known issues == Here are the changes found in IGTPW_1537 that come from known issues: === IGT changes === ==== Issues hit ==== igt@kms_frontbuffer_tracking@basic: fi-bxt-j4205: PASS -> FAIL (fdo#103167) fi-skl-6700hq: PASS -> FAIL (fdo#103167) fi-bxt-dsi: PASS -> FAIL (fdo#103167) fi-skl-6700k2: PASS -> FAIL (fdo#103167) fi-kbl-7560u: PASS -> FAIL (fdo#103167) fi-skl-6600u: PASS -> FAIL (fdo#103167) fi-kbl-r: PASS -> FAIL (fdo#103167) {fi-cfl-8109u}: PASS -> FAIL (fdo#103167) fi-skl-6260u: PASS -> FAIL (fdo#103167) fi-hsw-peppy: PASS -> DMESG-FAIL (fdo#106103, fdo#102614) fi-skl-6770hq: PASS -> FAIL (fdo#103167) fi-cfl-guc: PASS -> FAIL (fdo#103167) fi-cfl-s3: PASS -> FAIL (fdo#103167) fi-whl-u: PASS -> FAIL (fdo#103167) fi-cfl-8700k: PASS -> FAIL (fdo#103167) fi-kbl-7500u: PASS -> FAIL (fdo#103167) fi-kbl-7567u: PASS -> FAIL (fdo#103167) fi-skl-guc: NOTRUN -> FAIL (fdo#103167) fi-glk-j4005: PASS -> FAIL (fdo#103167) fi-glk-dsi: PASS -> FAIL (fdo#103167) fi-skl-gvtdvm: PASS -> FAIL (fdo#103167) ==== Possible fixes ==== igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-skl-6700k2: FAIL (fdo#103191) -> PASS {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103 == Participating hosts (46 -> 42) == Additional (1): fi-skl-guc Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * IGT: IGT_4538 -> IGTPW_1537 CI_DRM_4434: 2fa1923491b6f391b5048d74f54a9450ee8ba673 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1537: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1537/ IGT_4538: 9b3f41a6c6da7d767516a93dccf17469a551e942 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@gem_render_copy@linear +igt@gem_render_copy@x-tiled +igt@gem_render_copy@y-tiled +igt@gem_render_copy@y-tiled-ccs-to-linear +igt@gem_render_copy@y-tiled-ccs-to-x-tiled +igt@gem_render_copy@y-tiled-ccs-to-y-tiled -igt@gem_render_copy == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1537/issues.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala ` (9 preceding siblings ...) 2018-07-06 0:03 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) Patchwork @ 2018-07-06 15:26 ` Patchwork 2018-07-06 16:42 ` Ville Syrjälä 10 siblings, 1 reply; 28+ messages in thread From: Patchwork @ 2018-07-06 15:26 UTC (permalink / raw) To: Ville Syrjala; +Cc: igt-dev == Series Details == Series: series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) URL : https://patchwork.freedesktop.org/series/45934/ State : failure == Summary == = CI Bug Log - changes from IGT_4538_full -> IGTPW_1537_full = == Summary - FAILURE == Serious unknown changes coming with IGTPW_1537_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_1537_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/45934/revisions/3/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in IGTPW_1537_full: === IGT changes === ==== Possible regressions ==== igt@kms_draw_crc@draw-method-xrgb8888-render-untiled: shard-glk: PASS -> FAIL +5 shard-kbl: PASS -> FAIL +1 igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled: shard-apl: PASS -> FAIL +1 ==== Warnings ==== igt@gem_exec_schedule@deep-blt: shard-kbl: SKIP -> PASS igt@gem_mocs_settings@mocs-rc6-vebox: shard-kbl: PASS -> SKIP +2 igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt: shard-snb: PASS -> SKIP +3 == Known issues == Here are the changes found in IGTPW_1537_full that come from known issues: === IGT changes === ==== Issues hit ==== igt@drv_suspend@shrink: shard-glk: PASS -> FAIL (fdo#106886) igt@gem_eio@in-flight-1us: shard-glk: PASS -> FAIL (fdo#105957) igt@gem_exec_store@basic-vebox: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: PASS -> FAIL (fdo#106509, fdo#105454) igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: shard-apl: PASS -> FAIL (fdo#103184) +2 igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled: shard-kbl: PASS -> FAIL (fdo#103184) +2 igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled: shard-apl: PASS -> FAIL (fdo#103232) shard-glk: PASS -> FAIL (fdo#103232) shard-kbl: PASS -> FAIL (fdo#103232) igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105189) igt@kms_flip@2x-modeset-vs-vblank-race: shard-glk: PASS -> FAIL (fdo#103060) +1 igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: PASS -> FAIL (fdo#100368) +2 igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#103822) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: shard-apl: PASS -> FAIL (fdo#103167) +5 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-kbl: PASS -> FAIL (fdo#103167) +5 igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw: shard-glk: PASS -> FAIL (fdo#103167) +10 igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) ==== Possible fixes ==== igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: FAIL (fdo#106641) -> PASS igt@kms_flip@2x-wf_vblank-ts-check: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip_tiling@flip-to-y-tiled: shard-glk: FAIL (fdo#103822) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff: shard-snb: INCOMPLETE (fdo#105411) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: shard-snb: DMESG-WARN (fdo#102365) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-snb: FAIL (fdo#103166) -> PASS igt@kms_rotation_crc@sprite-rotation-180: shard-snb: FAIL (fdo#103925) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS ==== Warnings ==== igt@drv_selftest@live_gtt: shard-apl: INCOMPLETE (fdo#103927, fdo#107127) -> FAIL (fdo#107127, fdo#105347) fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#107127 https://bugs.freedesktop.org/show_bug.cgi?id=107127 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * IGT: IGT_4538 -> IGTPW_1537 * Linux: CI_DRM_4431 -> CI_DRM_4434 CI_DRM_4431: b9bf725e2d248638a834b4b4db5b684098216b86 @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_4434: 2fa1923491b6f391b5048d74f54a9450ee8ba673 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1537: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1537/ IGT_4538: 9b3f41a6c6da7d767516a93dccf17469a551e942 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1537/shards.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) 2018-07-06 15:26 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork @ 2018-07-06 16:42 ` Ville Syrjälä 0 siblings, 0 replies; 28+ messages in thread From: Ville Syrjälä @ 2018-07-06 16:42 UTC (permalink / raw) To: igt-dev On Fri, Jul 06, 2018 at 03:26:20PM -0000, Patchwork wrote: > == Series Details == > > Series: series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) > URL : https://patchwork.freedesktop.org/series/45934/ > State : failure > > == Summary == > > = CI Bug Log - changes from IGT_4538_full -> IGTPW_1537_full = > > == Summary - FAILURE == > > Serious unknown changes coming with IGTPW_1537_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in IGTPW_1537_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: https://patchwork.freedesktop.org/api/1.0/series/45934/revisions/3/mbox/ > > == Possible new issues == > > Here are the unknown changes that may have been introduced in IGTPW_1537_full: > > === IGT changes === > > ==== Possible regressions ==== > > igt@kms_draw_crc@draw-method-xrgb8888-render-untiled: > shard-glk: PASS -> FAIL +5 > shard-kbl: PASS -> FAIL +1 > > igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled: > shard-apl: PASS -> FAIL +1 Whoops. I shouldn't have dismissed the kms_frontbuffer_tracking fails so lightly. They had associated bug numbers so weren't flagged as regressions even though they were. Fix sent: https://patchwork.freedesktop.org/patch/236857/ > > > ==== Warnings ==== > > igt@gem_exec_schedule@deep-blt: > shard-kbl: SKIP -> PASS > > igt@gem_mocs_settings@mocs-rc6-vebox: > shard-kbl: PASS -> SKIP +2 > > igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt: > shard-snb: PASS -> SKIP +3 > > > == Known issues == > > Here are the changes found in IGTPW_1537_full that come from known issues: > > === IGT changes === > > ==== Issues hit ==== > > igt@drv_suspend@shrink: > shard-glk: PASS -> FAIL (fdo#106886) > > igt@gem_eio@in-flight-1us: > shard-glk: PASS -> FAIL (fdo#105957) > > igt@gem_exec_store@basic-vebox: > shard-snb: SKIP -> INCOMPLETE (fdo#105411) > > igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: > shard-glk: PASS -> FAIL (fdo#106509, fdo#105454) > > igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: > shard-apl: PASS -> FAIL (fdo#103184) +2 > > igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled: > shard-kbl: PASS -> FAIL (fdo#103184) +2 > > igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled: > shard-apl: PASS -> FAIL (fdo#103232) > shard-glk: PASS -> FAIL (fdo#103232) > shard-kbl: PASS -> FAIL (fdo#103232) > > igt@kms_flip@2x-flip-vs-expired-vblank: > shard-glk: PASS -> FAIL (fdo#105189) > > igt@kms_flip@2x-modeset-vs-vblank-race: > shard-glk: PASS -> FAIL (fdo#103060) +1 > > igt@kms_flip@plain-flip-ts-check-interruptible: > shard-glk: PASS -> FAIL (fdo#100368) +2 > > igt@kms_flip_tiling@flip-x-tiled: > shard-glk: PASS -> FAIL (fdo#103822) > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: > shard-apl: PASS -> FAIL (fdo#103167) +5 > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: > shard-kbl: PASS -> FAIL (fdo#103167) +5 > > igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw: > shard-glk: PASS -> FAIL (fdo#103167) +10 > > igt@kms_setmode@basic: > shard-apl: PASS -> FAIL (fdo#99912) > > > ==== Possible fixes ==== > > igt@kms_available_modes_crc@available_mode_test_crc: > shard-snb: FAIL (fdo#106641) -> PASS > > igt@kms_flip@2x-wf_vblank-ts-check: > shard-glk: FAIL (fdo#100368) -> PASS > > igt@kms_flip_tiling@flip-to-y-tiled: > shard-glk: FAIL (fdo#103822) -> PASS +1 > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff: > shard-snb: INCOMPLETE (fdo#105411) -> PASS > > igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: > shard-snb: DMESG-WARN (fdo#102365) -> PASS > > igt@kms_plane_multiple@atomic-pipe-a-tiling-x: > shard-snb: FAIL (fdo#103166) -> PASS > > igt@kms_rotation_crc@sprite-rotation-180: > shard-snb: FAIL (fdo#103925) -> PASS > > igt@kms_setmode@basic: > shard-kbl: FAIL (fdo#99912) -> PASS > > > ==== Warnings ==== > > igt@drv_selftest@live_gtt: > shard-apl: INCOMPLETE (fdo#103927, fdo#107127) -> FAIL (fdo#107127, fdo#105347) > > > fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 > fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365 > fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 > fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 > fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 > fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 > fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 > fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 > fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189 > fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 > fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 > fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 > fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 > fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 > fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 > fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 > fdo#107127 https://bugs.freedesktop.org/show_bug.cgi?id=107127 > fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 > > > == Participating hosts (5 -> 5) == > > No changes in participating hosts > > > == Build changes == > > * IGT: IGT_4538 -> IGTPW_1537 > * Linux: CI_DRM_4431 -> CI_DRM_4434 > > CI_DRM_4431: b9bf725e2d248638a834b4b4db5b684098216b86 @ git://anongit.freedesktop.org/gfx-ci/linux > CI_DRM_4434: 2fa1923491b6f391b5048d74f54a9450ee8ba673 @ git://anongit.freedesktop.org/gfx-ci/linux > IGTPW_1537: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1537/ > IGT_4538: 9b3f41a6c6da7d767516a93dccf17469a551e942 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1537/shards.html -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2018-07-06 16:42 UTC | newest] Thread overview: 28+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-07-04 16:16 [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Ville Syrjala 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 2/7] lib: Constify igt_buf Ville Syrjala 2018-07-04 16:47 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+ Ville Syrjala 2018-07-04 16:37 ` Chris Wilson 2018-07-04 16:41 ` Chris Wilson 2018-07-04 18:47 ` Ville Syrjälä 2018-07-04 18:51 ` Chris Wilson 2018-07-05 18:44 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 4/7] lib: Add aux surface state to igt_buf Ville Syrjala 2018-07-05 18:45 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 5/7] lib/rendercopy: Add enough surface state for AUX_CCS_E Ville Syrjala 2018-07-05 18:50 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 6/7] tests/gem_render_copy: Add subtests for different tiling modes Ville Syrjala 2018-07-04 16:36 ` Chris Wilson 2018-07-04 16:45 ` Chris Wilson 2018-07-05 18:27 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala 2018-07-05 18:43 ` Chris Wilson 2018-07-04 16:16 ` [igt-dev] [PATCH i-g-t 7/7] tests/gem_render_copy: Add a subtest for AUX_CCS_E Ville Syrjala 2018-07-05 18:28 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala 2018-07-05 19:38 ` Chris Wilson 2018-07-06 12:02 ` Ville Syrjälä 2018-07-04 16:46 ` [igt-dev] [PATCH i-g-t 1/7] lib/rendercopy: Simplify reloc offsets Chris Wilson 2018-07-04 17:10 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] " Patchwork 2018-07-04 22:31 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 2018-07-06 0:03 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/7] lib/rendercopy: Simplify reloc offsets (rev3) Patchwork 2018-07-06 15:26 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 2018-07-06 16:42 ` Ville Syrjälä
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