* [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file
@ 2018-11-22 6:11 Karthik B S
2018-11-22 6:50 ` [igt-dev] ✗ Fi.CI.BAT: failure for tools/registers: Add icelake register file (rev2) Patchwork
2018-11-26 18:11 ` [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file Rodrigo Vivi
0 siblings, 2 replies; 3+ messages in thread
From: Karthik B S @ 2018-11-22 6:11 UTC (permalink / raw)
To: igt-dev; +Cc: manasi.d.navare, rodrigo.vivi
Added an icelake register spec file and a register file that contains
additional registers corresponding to icelake.
The icelake spec file uses the skylake file together with the newly
added register file for ICL register definitions.
v2: Changed the commit message. (Uma)
Signed-off-by: Karthik B S <karthik.b.s@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
tools/registers/icelake | 2 +
tools/registers/icl_delta.txt | 229 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 231 insertions(+)
create mode 100644 tools/registers/icelake
create mode 100644 tools/registers/icl_delta.txt
diff --git a/tools/registers/icelake b/tools/registers/icelake
new file mode 100644
index 0000000..9e799dc
--- /dev/null
+++ b/tools/registers/icelake
@@ -0,0 +1,2 @@
+skylake
+icl_delta.txt
diff --git a/tools/registers/icl_delta.txt b/tools/registers/icl_delta.txt
new file mode 100644
index 0000000..0323cfe
--- /dev/null
+++ b/tools/registers/icl_delta.txt
@@ -0,0 +1,229 @@
+# PIPE_A_PLANE
+('PLANE_AUX_DIST_4_A', '0x704c0', '')
+('PLANE_AUX_DIST_5_A', '0x705c0', '')
+('PLANE_AUX_DIST_6_A', '0x706c0', '')
+('PLANE_AUX_DIST_7_A', '0x707c0', '')
+('PLANE_CTL_4_A', '0x70480', '')
+('PLANE_CTL_5_A', '0x70580', '')
+('PLANE_CTL_6_A', '0x70680', '')
+('PLANE_CTL_7_A', '0x70780', '')
+('PLANE_BUF_CFG_4_A', '0x7057c', '')
+('PLANE_BUF_CFG_5_A', '0x7067c', '')
+('PLANE_BUF_CFG_6_A', '0x7077c', '')
+('PLANE_BUF_CFG_7_A', '0x7087c', '')
+('PLANE_COLOR_CTL_1_A', '0x701cc', '')
+('PLANE_COLOR_CTL_2_A', '0x702cc', '')
+('PLANE_COLOR_CTL_3_A', '0x703cc', '')
+('PLANE_COLOR_CTL_4_A', '0x704cc', '')
+('PLANE_COLOR_CTL_5_A', '0x705cc', '')
+('PLANE_COLOR_CTL_6_A', '0x706cc', '')
+('PLANE_COLOR_CTL_7_A', '0x707cc', '')
+('PLANE_KEYMAX_4_A', '0x704a0', '')
+('PLANE_KEYMAX_5_A', '0x705a0', '')
+('PLANE_KEYMAX_6_A', '0x706a0', '')
+('PLANE_KEYMAX_7_A', '0x707a0', '')
+('PLANE_NV12_BUF_CFG_4_A', '0x70578', '')
+('PLANE_NV12_BUF_CFG_5_A', '0x70678', '')
+('PLANE_NV12_BUF_CFG_6_A', '0x70778', '')
+('PLANE_NV12_BUF_CFG_7_A', '0x70878', '')
+('PLANE_POS_4_A', '0x7048c', '')
+('PLANE_POS_5_A', '0x7058c', '')
+('PLANE_POS_6_A', '0x7068c', '')
+('PLANE_POS_7_A', '0x7078c', '')
+('PLANE_SIZE_4_A', '0x70490', '')
+('PLANE_SIZE_5_A', '0x70590', '')
+('PLANE_SIZE_6_A', '0x70690', '')
+('PLANE_SIZE_7_A', '0x70790', '')
+('PLANE_WM_4_A_0', '0x70540', '')
+('PLANE_WM_4_A_1', '0x70544', '')
+('PLANE_WM_4_A_2', '0x70548', '')
+('PLANE_WM_4_A_3', '0x7054c', '')
+('PLANE_WM_4_A_4', '0x70550', '')
+('PLANE_WM_4_A_5', '0x70554', '')
+('PLANE_WM_4_A_6', '0x70558', '')
+('PLANE_WM_4_A_7', '0x7055c', '')
+('PLANE_WM_5_A_0', '0x70640', '')
+('PLANE_WM_5_A_1', '0x70644', '')
+('PLANE_WM_5_A_2', '0x70648', '')
+('PLANE_WM_5_A_3', '0x7064c', '')
+('PLANE_WM_5_A_4', '0x70650', '')
+('PLANE_WM_5_A_5', '0x70654', '')
+('PLANE_WM_5_A_6', '0x70658', '')
+('PLANE_WM_5_A_7', '0x7065c', '')
+('PLANE_WM_6_A_0', '0x70740', '')
+('PLANE_WM_6_A_1', '0x70744', '')
+('PLANE_WM_6_A_2', '0x70748', '')
+('PLANE_WM_6_A_3', '0x7074c', '')
+('PLANE_WM_6_A_4', '0x70750', '')
+('PLANE_WM_6_A_5', '0x70754', '')
+('PLANE_WM_6_A_6', '0x70758', '')
+('PLANE_WM_6_A_7', '0x7075c', '')
+('PLANE_WM_7_A_0', '0x70840', '')
+('PLANE_WM_7_A_1', '0x70844', '')
+('PLANE_WM_7_A_2', '0x70848', '')
+('PLANE_WM_7_A_3', '0x7084c', '')
+('PLANE_WM_7_A_4', '0x70850', '')
+('PLANE_WM_7_A_5', '0x70854', '')
+('PLANE_WM_7_A_6', '0x70858', '')
+('PLANE_WM_7_A_7', '0x7085c', '')
+('PLANE_WM_TRANS_4_A', '0x70568', '')
+('PLANE_WM_TRANS_5_A', '0x70668', '')
+('PLANE_WM_TRANS_6_A', '0x70768', '')
+('PLANE_WM_TRANS_7_A', '0x70868', '')
+# PIPE_B_PLANE
+('PLANE_AUX_DIST_4_B', '0x714c0', '')
+('PLANE_AUX_DIST_5_B', '0x715c0', '')
+('PLANE_AUX_DIST_6_B', '0x716c0', '')
+('PLANE_AUX_DIST_7_B', '0x717c0', '')
+('PLANE_CTL_4_B', '0x71480', '')
+('PLANE_CTL_5_B', '0x71580', '')
+('PLANE_CTL_6_B', '0x71680', '')
+('PLANE_CTL_7_B', '0x71780', '')
+('PLANE_BUF_CFG_4_B', '0x7157c', '')
+('PLANE_BUF_CFG_5_B', '0x7167c', '')
+('PLANE_BUF_CFG_6_B', '0x7177c', '')
+('PLANE_BUF_CFG_7_B', '0x7187c', '')
+('PLANE_COLOR_CTL_1_B', '0x711cc', '')
+('PLANE_COLOR_CTL_2_B', '0x712cc', '')
+('PLANE_COLOR_CTL_3_B', '0x713cc', '')
+('PLANE_COLOR_CTL_4_B', '0x714cc', '')
+('PLANE_COLOR_CTL_5_B', '0x715cc', '')
+('PLANE_COLOR_CTL_6_B', '0x716cc', '')
+('PLANE_COLOR_CTL_7_B', '0x717cc', '')
+('PLANE_KEYMAX_4_B', '0x714a0', '')
+('PLANE_KEYMAX_5_B', '0x715a0', '')
+('PLANE_KEYMAX_6_B', '0x716a0', '')
+('PLANE_KEYMAX_7_B', '0x717a0', '')
+('PLANE_NV12_BUF_CFG_4_B', '0x71578', '')
+('PLANE_NV12_BUF_CFG_5_B', '0x71678', '')
+('PLANE_NV12_BUF_CFG_6_B', '0x71778', '')
+('PLANE_NV12_BUF_CFG_7_B', '0x71878', '')
+('PLANE_POS_4_B', '0x7148c', '')
+('PLANE_POS_5_B', '0x7158c', '')
+('PLANE_POS_6_B', '0x7168c', '')
+('PLANE_POS_7_B', '0x7178c', '')
+('PLANE_SIZE_4_B', '0x71490', '')
+('PLANE_SIZE_5_B', '0x71590', '')
+('PLANE_SIZE_6_B', '0x71690', '')
+('PLANE_SIZE_7_B', '0x71790', '')
+('PLANE_WM_4_B_0', '0x71540', '')
+('PLANE_WM_4_B_1', '0x71544', '')
+('PLANE_WM_4_B_2', '0x71548', '')
+('PLANE_WM_4_B_3', '0x7154c', '')
+('PLANE_WM_4_B_4', '0x71550', '')
+('PLANE_WM_4_B_5', '0x71554', '')
+('PLANE_WM_4_B_6', '0x71558', '')
+('PLANE_WM_4_B_7', '0x7155c', '')
+('PLANE_WM_5_B_0', '0x71640', '')
+('PLANE_WM_5_B_1', '0x71644', '')
+('PLANE_WM_5_B_2', '0x71648', '')
+('PLANE_WM_5_B_3', '0x7164c', '')
+('PLANE_WM_5_B_4', '0x71650', '')
+('PLANE_WM_5_B_5', '0x71654', '')
+('PLANE_WM_5_B_6', '0x71658', '')
+('PLANE_WM_5_B_7', '0x7165c', '')
+('PLANE_WM_6_B_0', '0x71740', '')
+('PLANE_WM_6_B_1', '0x71744', '')
+('PLANE_WM_6_B_2', '0x71748', '')
+('PLANE_WM_6_B_3', '0x7174c', '')
+('PLANE_WM_6_B_4', '0x71750', '')
+('PLANE_WM_6_B_5', '0x71754', '')
+('PLANE_WM_6_B_6', '0x71758', '')
+('PLANE_WM_6_B_7', '0x7175c', '')
+('PLANE_WM_7_B_0', '0x71840', '')
+('PLANE_WM_7_B_1', '0x71844', '')
+('PLANE_WM_7_B_2', '0x71848', '')
+('PLANE_WM_7_B_3', '0x7184c', '')
+('PLANE_WM_7_B_4', '0x71850', '')
+('PLANE_WM_7_B_5', '0x71854', '')
+('PLANE_WM_7_B_6', '0x71858', '')
+('PLANE_WM_7_B_7', '0x7185c', '')
+('PLANE_WM_TRANS_4_B', '0x71568', '')
+('PLANE_WM_TRANS_5_B', '0x71668', '')
+('PLANE_WM_TRANS_6_B', '0x71768', '')
+('PLANE_WM_TRANS_7_B', '0x71868', '')
+# PIPE_C_PLANE
+('PLANE_AUX_DIST_4_C', '0x724c0', '')
+('PLANE_AUX_DIST_5_C', '0x725c0', '')
+('PLANE_AUX_DIST_6_C', '0x726c0', '')
+('PLANE_AUX_DIST_7_C', '0x727c0', '')
+('PLANE_CTL_4_C', '0x72480', '')
+('PLANE_CTL_5_C', '0x72580', '')
+('PLANE_CTL_6_C', '0x72680', '')
+('PLANE_CTL_7_C', '0x72780', '')
+('PLANE_BUF_CFG_4_C', '0x7257c', '')
+('PLANE_BUF_CFG_5_C', '0x7267c', '')
+('PLANE_BUF_CFG_6_C', '0x7277c', '')
+('PLANE_BUF_CFG_7_C', '0x7287c', '')
+('PLANE_COLOR_CTL_1_C', '0x721cc', '')
+('PLANE_COLOR_CTL_2_C', '0x722cc', '')
+('PLANE_COLOR_CTL_3_C', '0x723cc', '')
+('PLANE_COLOR_CTL_4_C', '0x724cc', '')
+('PLANE_COLOR_CTL_5_C', '0x725cc', '')
+('PLANE_COLOR_CTL_6_C', '0x726cc', '')
+('PLANE_COLOR_CTL_7_C', '0x727cc', '')
+('PLANE_KEYMAX_4_C', '0x724a0', '')
+('PLANE_KEYMAX_5_C', '0x725a0', '')
+('PLANE_KEYMAX_6_C', '0x726a0', '')
+('PLANE_KEYMAX_7_C', '0x727a0', '')
+('PLANE_NV12_BUF_CFG_4_C', '0x72578', '')
+('PLANE_NV12_BUF_CFG_5_C', '0x72678', '')
+('PLANE_NV12_BUF_CFG_6_C', '0x72778', '')
+('PLANE_NV12_BUF_CFG_7_C', '0x72878', '')
+('PLANE_POS_4_C', '0x7248c', '')
+('PLANE_POS_5_C', '0x7258c', '')
+('PLANE_POS_6_C', '0x7268c', '')
+('PLANE_POS_7_C', '0x7278c', '')
+('PLANE_SIZE_4_C', '0x72490', '')
+('PLANE_SIZE_5_C', '0x72590', '')
+('PLANE_SIZE_6_C', '0x72690', '')
+('PLANE_SIZE_7_C', '0x72790', '')
+('PLANE_WM_4_C_0', '0x72540', '')
+('PLANE_WM_4_C_1', '0x72544', '')
+('PLANE_WM_4_C_2', '0x72548', '')
+('PLANE_WM_4_C_3', '0x7254c', '')
+('PLANE_WM_4_C_4', '0x72550', '')
+('PLANE_WM_4_C_5', '0x72554', '')
+('PLANE_WM_4_C_6', '0x72558', '')
+('PLANE_WM_4_C_7', '0x7255c', '')
+('PLANE_WM_5_C_0', '0x72640', '')
+('PLANE_WM_5_C_1', '0x72644', '')
+('PLANE_WM_5_C_2', '0x72648', '')
+('PLANE_WM_5_C_3', '0x7264c', '')
+('PLANE_WM_5_C_4', '0x72650', '')
+('PLANE_WM_5_C_5', '0x72654', '')
+('PLANE_WM_5_C_6', '0x72658', '')
+('PLANE_WM_5_C_7', '0x7265c', '')
+('PLANE_WM_6_C_0', '0x72740', '')
+('PLANE_WM_6_C_1', '0x72744', '')
+('PLANE_WM_6_C_2', '0x72748', '')
+('PLANE_WM_6_C_3', '0x7274c', '')
+('PLANE_WM_6_C_4', '0x72750', '')
+('PLANE_WM_6_C_5', '0x72754', '')
+('PLANE_WM_6_C_6', '0x72758', '')
+('PLANE_WM_6_C_7', '0x7275c', '')
+('PLANE_WM_7_C_0', '0x72840', '')
+('PLANE_WM_7_C_1', '0x72844', '')
+('PLANE_WM_7_C_2', '0x72848', '')
+('PLANE_WM_7_C_3', '0x7284c', '')
+('PLANE_WM_7_C_4', '0x72850', '')
+('PLANE_WM_7_C_5', '0x72854', '')
+('PLANE_WM_7_C_6', '0x72858', '')
+('PLANE_WM_7_C_7', '0x7285c', '')
+('PLANE_WM_TRANS_4_C', '0x72468', '')
+('PLANE_WM_TRANS_5_C', '0x72468', '')
+('PLANE_WM_TRANS_6_C', '0x72468', '')
+('PLANE_WM_TRANS_7_C', '0x72468', '')
+# TRANSCODER_DSI_DDI_CONTROL
+('TRANS_DDI_FUNC_CTL_DSI0', '0x6b400', '')
+('TRANS_DDI_FUNC_CTL_DSI1', '0x6bc00', '')
+# TRANSCODER_DSI_TIMING
+('TRANS_HTOTAL_DSI0', '0x6b000', '')
+('TRANS_HTOTAL_DSI1', '0x6b800', '')
+('TRANS_VTOTAL_DSI0', '0x6b00c', '')
+('TRANS_VTOTAL_DSI1', '0x6b80c', '')
+# MBUS_CTL
+('MBUS_ABOX_CTL', '0x45038', '')
+('MBUS_DBOX_CTL_A', '0x7003c', '')
+('MBUS_DBOX_CTL_B', '0x7103c', '')
+('MBUS_DBOX_CTL_C', '0x7203c', '')
--
2.7.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for tools/registers: Add icelake register file (rev2)
2018-11-22 6:11 [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file Karthik B S
@ 2018-11-22 6:50 ` Patchwork
2018-11-26 18:11 ` [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file Rodrigo Vivi
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2018-11-22 6:50 UTC (permalink / raw)
To: Karthik B S; +Cc: igt-dev
== Series Details ==
Series: tools/registers: Add icelake register file (rev2)
URL : https://patchwork.freedesktop.org/series/50384/
State : failure
== Summary ==
= CI Bug Log - changes from IGT_4724 -> IGTPW_2085 =
== Summary - FAILURE ==
Serious unknown changes coming with IGTPW_2085 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2085, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/50384/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in IGTPW_2085:
=== IGT changes ===
==== Possible regressions ====
igt@gem_close_race@basic-threads:
fi-bsw-n3050: PASS -> INCOMPLETE
== Known issues ==
Here are the changes found in IGTPW_2085 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-bwr-2160: PASS -> FAIL (fdo#100368)
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
==== Possible fixes ====
igt@i915_module_load@reload:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@i915_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
== Participating hosts (51 -> 44) ==
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u3 fi-pnv-d510
== Build changes ==
* IGT: IGT_4724 -> IGTPW_2085
CI_DRM_5180: 95de9a943571204eda4dc3156c3d984ba07c78e4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2085: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2085/
IGT_4724: 29ae0925abe1d3a0202059538559468ad947d42d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2085/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file
2018-11-22 6:11 [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file Karthik B S
2018-11-22 6:50 ` [igt-dev] ✗ Fi.CI.BAT: failure for tools/registers: Add icelake register file (rev2) Patchwork
@ 2018-11-26 18:11 ` Rodrigo Vivi
1 sibling, 0 replies; 3+ messages in thread
From: Rodrigo Vivi @ 2018-11-26 18:11 UTC (permalink / raw)
To: Karthik B S; +Cc: igt-dev, manasi.d.navare
On Thu, Nov 22, 2018 at 11:41:53AM +0530, Karthik B S wrote:
> Added an icelake register spec file and a register file that contains
> additional registers corresponding to icelake.
>
> The icelake spec file uses the skylake file together with the newly
> added register file for ICL register definitions.
>
> v2: Changed the commit message. (Uma)
>
> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
pushed, thanks
> ---
> tools/registers/icelake | 2 +
> tools/registers/icl_delta.txt | 229 ++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 231 insertions(+)
> create mode 100644 tools/registers/icelake
> create mode 100644 tools/registers/icl_delta.txt
>
> diff --git a/tools/registers/icelake b/tools/registers/icelake
> new file mode 100644
> index 0000000..9e799dc
> --- /dev/null
> +++ b/tools/registers/icelake
> @@ -0,0 +1,2 @@
> +skylake
> +icl_delta.txt
> diff --git a/tools/registers/icl_delta.txt b/tools/registers/icl_delta.txt
> new file mode 100644
> index 0000000..0323cfe
> --- /dev/null
> +++ b/tools/registers/icl_delta.txt
> @@ -0,0 +1,229 @@
> +# PIPE_A_PLANE
> +('PLANE_AUX_DIST_4_A', '0x704c0', '')
> +('PLANE_AUX_DIST_5_A', '0x705c0', '')
> +('PLANE_AUX_DIST_6_A', '0x706c0', '')
> +('PLANE_AUX_DIST_7_A', '0x707c0', '')
> +('PLANE_CTL_4_A', '0x70480', '')
> +('PLANE_CTL_5_A', '0x70580', '')
> +('PLANE_CTL_6_A', '0x70680', '')
> +('PLANE_CTL_7_A', '0x70780', '')
> +('PLANE_BUF_CFG_4_A', '0x7057c', '')
> +('PLANE_BUF_CFG_5_A', '0x7067c', '')
> +('PLANE_BUF_CFG_6_A', '0x7077c', '')
> +('PLANE_BUF_CFG_7_A', '0x7087c', '')
> +('PLANE_COLOR_CTL_1_A', '0x701cc', '')
> +('PLANE_COLOR_CTL_2_A', '0x702cc', '')
> +('PLANE_COLOR_CTL_3_A', '0x703cc', '')
> +('PLANE_COLOR_CTL_4_A', '0x704cc', '')
> +('PLANE_COLOR_CTL_5_A', '0x705cc', '')
> +('PLANE_COLOR_CTL_6_A', '0x706cc', '')
> +('PLANE_COLOR_CTL_7_A', '0x707cc', '')
> +('PLANE_KEYMAX_4_A', '0x704a0', '')
> +('PLANE_KEYMAX_5_A', '0x705a0', '')
> +('PLANE_KEYMAX_6_A', '0x706a0', '')
> +('PLANE_KEYMAX_7_A', '0x707a0', '')
> +('PLANE_NV12_BUF_CFG_4_A', '0x70578', '')
> +('PLANE_NV12_BUF_CFG_5_A', '0x70678', '')
> +('PLANE_NV12_BUF_CFG_6_A', '0x70778', '')
> +('PLANE_NV12_BUF_CFG_7_A', '0x70878', '')
> +('PLANE_POS_4_A', '0x7048c', '')
> +('PLANE_POS_5_A', '0x7058c', '')
> +('PLANE_POS_6_A', '0x7068c', '')
> +('PLANE_POS_7_A', '0x7078c', '')
> +('PLANE_SIZE_4_A', '0x70490', '')
> +('PLANE_SIZE_5_A', '0x70590', '')
> +('PLANE_SIZE_6_A', '0x70690', '')
> +('PLANE_SIZE_7_A', '0x70790', '')
> +('PLANE_WM_4_A_0', '0x70540', '')
> +('PLANE_WM_4_A_1', '0x70544', '')
> +('PLANE_WM_4_A_2', '0x70548', '')
> +('PLANE_WM_4_A_3', '0x7054c', '')
> +('PLANE_WM_4_A_4', '0x70550', '')
> +('PLANE_WM_4_A_5', '0x70554', '')
> +('PLANE_WM_4_A_6', '0x70558', '')
> +('PLANE_WM_4_A_7', '0x7055c', '')
> +('PLANE_WM_5_A_0', '0x70640', '')
> +('PLANE_WM_5_A_1', '0x70644', '')
> +('PLANE_WM_5_A_2', '0x70648', '')
> +('PLANE_WM_5_A_3', '0x7064c', '')
> +('PLANE_WM_5_A_4', '0x70650', '')
> +('PLANE_WM_5_A_5', '0x70654', '')
> +('PLANE_WM_5_A_6', '0x70658', '')
> +('PLANE_WM_5_A_7', '0x7065c', '')
> +('PLANE_WM_6_A_0', '0x70740', '')
> +('PLANE_WM_6_A_1', '0x70744', '')
> +('PLANE_WM_6_A_2', '0x70748', '')
> +('PLANE_WM_6_A_3', '0x7074c', '')
> +('PLANE_WM_6_A_4', '0x70750', '')
> +('PLANE_WM_6_A_5', '0x70754', '')
> +('PLANE_WM_6_A_6', '0x70758', '')
> +('PLANE_WM_6_A_7', '0x7075c', '')
> +('PLANE_WM_7_A_0', '0x70840', '')
> +('PLANE_WM_7_A_1', '0x70844', '')
> +('PLANE_WM_7_A_2', '0x70848', '')
> +('PLANE_WM_7_A_3', '0x7084c', '')
> +('PLANE_WM_7_A_4', '0x70850', '')
> +('PLANE_WM_7_A_5', '0x70854', '')
> +('PLANE_WM_7_A_6', '0x70858', '')
> +('PLANE_WM_7_A_7', '0x7085c', '')
> +('PLANE_WM_TRANS_4_A', '0x70568', '')
> +('PLANE_WM_TRANS_5_A', '0x70668', '')
> +('PLANE_WM_TRANS_6_A', '0x70768', '')
> +('PLANE_WM_TRANS_7_A', '0x70868', '')
> +# PIPE_B_PLANE
> +('PLANE_AUX_DIST_4_B', '0x714c0', '')
> +('PLANE_AUX_DIST_5_B', '0x715c0', '')
> +('PLANE_AUX_DIST_6_B', '0x716c0', '')
> +('PLANE_AUX_DIST_7_B', '0x717c0', '')
> +('PLANE_CTL_4_B', '0x71480', '')
> +('PLANE_CTL_5_B', '0x71580', '')
> +('PLANE_CTL_6_B', '0x71680', '')
> +('PLANE_CTL_7_B', '0x71780', '')
> +('PLANE_BUF_CFG_4_B', '0x7157c', '')
> +('PLANE_BUF_CFG_5_B', '0x7167c', '')
> +('PLANE_BUF_CFG_6_B', '0x7177c', '')
> +('PLANE_BUF_CFG_7_B', '0x7187c', '')
> +('PLANE_COLOR_CTL_1_B', '0x711cc', '')
> +('PLANE_COLOR_CTL_2_B', '0x712cc', '')
> +('PLANE_COLOR_CTL_3_B', '0x713cc', '')
> +('PLANE_COLOR_CTL_4_B', '0x714cc', '')
> +('PLANE_COLOR_CTL_5_B', '0x715cc', '')
> +('PLANE_COLOR_CTL_6_B', '0x716cc', '')
> +('PLANE_COLOR_CTL_7_B', '0x717cc', '')
> +('PLANE_KEYMAX_4_B', '0x714a0', '')
> +('PLANE_KEYMAX_5_B', '0x715a0', '')
> +('PLANE_KEYMAX_6_B', '0x716a0', '')
> +('PLANE_KEYMAX_7_B', '0x717a0', '')
> +('PLANE_NV12_BUF_CFG_4_B', '0x71578', '')
> +('PLANE_NV12_BUF_CFG_5_B', '0x71678', '')
> +('PLANE_NV12_BUF_CFG_6_B', '0x71778', '')
> +('PLANE_NV12_BUF_CFG_7_B', '0x71878', '')
> +('PLANE_POS_4_B', '0x7148c', '')
> +('PLANE_POS_5_B', '0x7158c', '')
> +('PLANE_POS_6_B', '0x7168c', '')
> +('PLANE_POS_7_B', '0x7178c', '')
> +('PLANE_SIZE_4_B', '0x71490', '')
> +('PLANE_SIZE_5_B', '0x71590', '')
> +('PLANE_SIZE_6_B', '0x71690', '')
> +('PLANE_SIZE_7_B', '0x71790', '')
> +('PLANE_WM_4_B_0', '0x71540', '')
> +('PLANE_WM_4_B_1', '0x71544', '')
> +('PLANE_WM_4_B_2', '0x71548', '')
> +('PLANE_WM_4_B_3', '0x7154c', '')
> +('PLANE_WM_4_B_4', '0x71550', '')
> +('PLANE_WM_4_B_5', '0x71554', '')
> +('PLANE_WM_4_B_6', '0x71558', '')
> +('PLANE_WM_4_B_7', '0x7155c', '')
> +('PLANE_WM_5_B_0', '0x71640', '')
> +('PLANE_WM_5_B_1', '0x71644', '')
> +('PLANE_WM_5_B_2', '0x71648', '')
> +('PLANE_WM_5_B_3', '0x7164c', '')
> +('PLANE_WM_5_B_4', '0x71650', '')
> +('PLANE_WM_5_B_5', '0x71654', '')
> +('PLANE_WM_5_B_6', '0x71658', '')
> +('PLANE_WM_5_B_7', '0x7165c', '')
> +('PLANE_WM_6_B_0', '0x71740', '')
> +('PLANE_WM_6_B_1', '0x71744', '')
> +('PLANE_WM_6_B_2', '0x71748', '')
> +('PLANE_WM_6_B_3', '0x7174c', '')
> +('PLANE_WM_6_B_4', '0x71750', '')
> +('PLANE_WM_6_B_5', '0x71754', '')
> +('PLANE_WM_6_B_6', '0x71758', '')
> +('PLANE_WM_6_B_7', '0x7175c', '')
> +('PLANE_WM_7_B_0', '0x71840', '')
> +('PLANE_WM_7_B_1', '0x71844', '')
> +('PLANE_WM_7_B_2', '0x71848', '')
> +('PLANE_WM_7_B_3', '0x7184c', '')
> +('PLANE_WM_7_B_4', '0x71850', '')
> +('PLANE_WM_7_B_5', '0x71854', '')
> +('PLANE_WM_7_B_6', '0x71858', '')
> +('PLANE_WM_7_B_7', '0x7185c', '')
> +('PLANE_WM_TRANS_4_B', '0x71568', '')
> +('PLANE_WM_TRANS_5_B', '0x71668', '')
> +('PLANE_WM_TRANS_6_B', '0x71768', '')
> +('PLANE_WM_TRANS_7_B', '0x71868', '')
> +# PIPE_C_PLANE
> +('PLANE_AUX_DIST_4_C', '0x724c0', '')
> +('PLANE_AUX_DIST_5_C', '0x725c0', '')
> +('PLANE_AUX_DIST_6_C', '0x726c0', '')
> +('PLANE_AUX_DIST_7_C', '0x727c0', '')
> +('PLANE_CTL_4_C', '0x72480', '')
> +('PLANE_CTL_5_C', '0x72580', '')
> +('PLANE_CTL_6_C', '0x72680', '')
> +('PLANE_CTL_7_C', '0x72780', '')
> +('PLANE_BUF_CFG_4_C', '0x7257c', '')
> +('PLANE_BUF_CFG_5_C', '0x7267c', '')
> +('PLANE_BUF_CFG_6_C', '0x7277c', '')
> +('PLANE_BUF_CFG_7_C', '0x7287c', '')
> +('PLANE_COLOR_CTL_1_C', '0x721cc', '')
> +('PLANE_COLOR_CTL_2_C', '0x722cc', '')
> +('PLANE_COLOR_CTL_3_C', '0x723cc', '')
> +('PLANE_COLOR_CTL_4_C', '0x724cc', '')
> +('PLANE_COLOR_CTL_5_C', '0x725cc', '')
> +('PLANE_COLOR_CTL_6_C', '0x726cc', '')
> +('PLANE_COLOR_CTL_7_C', '0x727cc', '')
> +('PLANE_KEYMAX_4_C', '0x724a0', '')
> +('PLANE_KEYMAX_5_C', '0x725a0', '')
> +('PLANE_KEYMAX_6_C', '0x726a0', '')
> +('PLANE_KEYMAX_7_C', '0x727a0', '')
> +('PLANE_NV12_BUF_CFG_4_C', '0x72578', '')
> +('PLANE_NV12_BUF_CFG_5_C', '0x72678', '')
> +('PLANE_NV12_BUF_CFG_6_C', '0x72778', '')
> +('PLANE_NV12_BUF_CFG_7_C', '0x72878', '')
> +('PLANE_POS_4_C', '0x7248c', '')
> +('PLANE_POS_5_C', '0x7258c', '')
> +('PLANE_POS_6_C', '0x7268c', '')
> +('PLANE_POS_7_C', '0x7278c', '')
> +('PLANE_SIZE_4_C', '0x72490', '')
> +('PLANE_SIZE_5_C', '0x72590', '')
> +('PLANE_SIZE_6_C', '0x72690', '')
> +('PLANE_SIZE_7_C', '0x72790', '')
> +('PLANE_WM_4_C_0', '0x72540', '')
> +('PLANE_WM_4_C_1', '0x72544', '')
> +('PLANE_WM_4_C_2', '0x72548', '')
> +('PLANE_WM_4_C_3', '0x7254c', '')
> +('PLANE_WM_4_C_4', '0x72550', '')
> +('PLANE_WM_4_C_5', '0x72554', '')
> +('PLANE_WM_4_C_6', '0x72558', '')
> +('PLANE_WM_4_C_7', '0x7255c', '')
> +('PLANE_WM_5_C_0', '0x72640', '')
> +('PLANE_WM_5_C_1', '0x72644', '')
> +('PLANE_WM_5_C_2', '0x72648', '')
> +('PLANE_WM_5_C_3', '0x7264c', '')
> +('PLANE_WM_5_C_4', '0x72650', '')
> +('PLANE_WM_5_C_5', '0x72654', '')
> +('PLANE_WM_5_C_6', '0x72658', '')
> +('PLANE_WM_5_C_7', '0x7265c', '')
> +('PLANE_WM_6_C_0', '0x72740', '')
> +('PLANE_WM_6_C_1', '0x72744', '')
> +('PLANE_WM_6_C_2', '0x72748', '')
> +('PLANE_WM_6_C_3', '0x7274c', '')
> +('PLANE_WM_6_C_4', '0x72750', '')
> +('PLANE_WM_6_C_5', '0x72754', '')
> +('PLANE_WM_6_C_6', '0x72758', '')
> +('PLANE_WM_6_C_7', '0x7275c', '')
> +('PLANE_WM_7_C_0', '0x72840', '')
> +('PLANE_WM_7_C_1', '0x72844', '')
> +('PLANE_WM_7_C_2', '0x72848', '')
> +('PLANE_WM_7_C_3', '0x7284c', '')
> +('PLANE_WM_7_C_4', '0x72850', '')
> +('PLANE_WM_7_C_5', '0x72854', '')
> +('PLANE_WM_7_C_6', '0x72858', '')
> +('PLANE_WM_7_C_7', '0x7285c', '')
> +('PLANE_WM_TRANS_4_C', '0x72468', '')
> +('PLANE_WM_TRANS_5_C', '0x72468', '')
> +('PLANE_WM_TRANS_6_C', '0x72468', '')
> +('PLANE_WM_TRANS_7_C', '0x72468', '')
> +# TRANSCODER_DSI_DDI_CONTROL
> +('TRANS_DDI_FUNC_CTL_DSI0', '0x6b400', '')
> +('TRANS_DDI_FUNC_CTL_DSI1', '0x6bc00', '')
> +# TRANSCODER_DSI_TIMING
> +('TRANS_HTOTAL_DSI0', '0x6b000', '')
> +('TRANS_HTOTAL_DSI1', '0x6b800', '')
> +('TRANS_VTOTAL_DSI0', '0x6b00c', '')
> +('TRANS_VTOTAL_DSI1', '0x6b80c', '')
> +# MBUS_CTL
> +('MBUS_ABOX_CTL', '0x45038', '')
> +('MBUS_DBOX_CTL_A', '0x7003c', '')
> +('MBUS_DBOX_CTL_B', '0x7103c', '')
> +('MBUS_DBOX_CTL_C', '0x7203c', '')
> --
> 2.7.4
>
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end of thread, other threads:[~2018-11-26 18:11 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2018-11-22 6:11 [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file Karthik B S
2018-11-22 6:50 ` [igt-dev] ✗ Fi.CI.BAT: failure for tools/registers: Add icelake register file (rev2) Patchwork
2018-11-26 18:11 ` [igt-dev] [PATCH i-g-t v2] tools/registers: Add icelake register file Rodrigo Vivi
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