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* [igt-dev] [PATCH i-g-t] tests/kms_plane: Add 1 pixel wide visible plane test
@ 2019-02-25 13:48 Juha-Pekka Heikkila
  2019-02-25 14:37 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_plane: Add 1 pixel wide visible plane test (rev2) Patchwork
  2019-02-25 18:53 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Juha-Pekka Heikkila @ 2019-02-25 13:48 UTC (permalink / raw)
  To: igt-dev

This test creates plane and fb which are 1 pixel wider than
maximum visible size. On both ends are vertical lines, first
plane is positioned at place (0,0) and then (-width,0) and
crc is compared. Then plane is positioned to (-1,0) and
(width-1,0) and crcs are compared again.

This test will skip YUV fb formats.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 tests/kms_plane.c | 179 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 179 insertions(+)

diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index 91de469..f378135 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -586,6 +586,182 @@ test_pixel_formats(data_t *data, enum pipe pipe)
 	}
 }
 
+static const struct {
+	uint64_t tiling;
+	const char *tiling_name;
+} tiling[] = {
+	{LOCAL_DRM_FORMAT_MOD_NONE, "MOD_NONE" },
+	{LOCAL_I915_FORMAT_MOD_X_TILED, "X_TILED" },
+	{LOCAL_I915_FORMAT_MOD_Y_TILED, "Y_TILED" },
+	{LOCAL_I915_FORMAT_MOD_Yf_TILED, "Yf_TILED" }
+};
+
+static void
+test_1px_plane(data_t *data, enum pipe pipe, igt_output_t *output,
+	       igt_plane_t *plane)
+{
+	struct igt_fb fb = {};
+	drmModeModeInfo *mode;
+	uint32_t format;
+	uint64_t width, height;
+	igt_crc_t crc[2]; /* 2 ref crcs as in ref and test */
+
+	/*
+	 * No 1pix wide test for cursor.
+	 */
+	if (plane->type == DRM_PLANE_TYPE_CURSOR)
+		return;
+
+	mode = igt_output_get_mode(output);
+	width = mode->hdisplay;
+	height = mode->vdisplay;
+
+	igt_debug("Testing connector %s on %s plane %s.%u\n",
+		  igt_output_name(output), kmstest_plane_type_name(plane->type),
+		  kmstest_pipe_name(pipe), plane->index);
+
+	igt_output_set_pipe(output, pipe);
+	igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
+
+	set_legacy_lut(data, pipe, 0xfc00);
+
+	data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+	igt_pipe_crc_start(data->pipe_crc);
+
+	for (int i = 0; i < plane->drm_plane->count_formats; i++) {
+		int rval;
+
+		format = plane->drm_plane->formats[i];
+
+		if (!igt_fb_supported_format(format))
+			continue;
+
+		/*
+		 * There seems to be some issue there with the CRC not
+		 * matching. Both CRCs are stable, but don't match,
+		 * which seems to indicate some issue with the CRC
+		 * computation logic, but I haven't been able to find
+		 * what.
+		 */
+		if (format == DRM_FORMAT_XBGR8888)
+			continue;
+
+		rval = 0;
+		for (int j = 0; j < ARRAY_SIZE(tiling) && !rval; j++) {
+			cairo_t *cr;
+
+			igt_info("Testing format " IGT_FORMAT_FMT " with %s tiling on %s.%u\n",
+				 IGT_FORMAT_ARGS(format), tiling[j].tiling_name,
+				 kmstest_pipe_name(pipe), plane->index);
+
+			for (int k = 0; k < ARRAY_SIZE(colors) && !rval; k++) {
+				/*
+				 * create 1pix wider plane than mode, there will be vertical line at
+				 * both horizontal ends, always one of them hidden and one showing.
+				 */
+				igt_create_fb(data->drm_fd, width+1,
+						    height, format,
+						    tiling[j].tiling,
+						    &fb);
+
+				cr = igt_get_cairo_ctx(data->drm_fd, &fb);
+
+				igt_paint_color(cr, 0, 0,
+						1,
+						height,
+						colors[k].red,
+						colors[k].green,
+						colors[k].blue);
+
+				igt_paint_color(cr, 1, 0,
+						width-1,
+						height-1,
+						0.0f,
+						0.0f,
+						0.0f);
+
+				igt_paint_color(cr, width, 0,
+						1,
+						height,
+						colors[k].red,
+						colors[k].green,
+						colors[k].blue);
+
+				igt_put_cairo_ctx(data->drm_fd, &fb, cr);
+
+				igt_plane_set_fb(plane, &fb);
+				igt_plane_set_position(plane, 0, 0);
+				igt_plane_set_size(plane, width+1, height);
+				igt_fb_set_position(&fb, plane, 0, 0);
+				igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+				igt_pipe_crc_drain(data->pipe_crc);
+				igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, &crc[0]);
+
+				igt_plane_set_position(plane, -width, 0);
+				rval = igt_display_try_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+				/*
+				 * yuv will fail here and we're all ok with that.
+				 * if skip here it will skip rest of this fb format
+				 * from modifier test.
+				 */
+				if (rval)
+					goto next_round;
+
+				igt_pipe_crc_drain(data->pipe_crc);
+				igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, &crc[1]);
+				igt_assert_crc_equal(&crc[0], &crc[1]);
+
+				/*
+				 * here begin right side test
+				 */
+				igt_plane_set_position(plane, -1, 0);
+				rval = igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+				igt_pipe_crc_drain(data->pipe_crc);
+				igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, &crc[0]);
+
+				igt_plane_set_position(plane, width-1, 0);
+				rval = igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+				igt_pipe_crc_drain(data->pipe_crc);
+				igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, &crc[1]);
+
+				igt_assert_crc_equal(&crc[0], &crc[1]);
+next_round:
+				igt_plane_set_fb(plane, NULL);
+				igt_remove_fb(data->drm_fd, &fb);
+			}
+		}
+	}
+
+	igt_pipe_crc_stop(data->pipe_crc);
+	igt_pipe_crc_free(data->pipe_crc);
+
+	set_legacy_lut(data, pipe, 0xffff);
+
+	igt_plane_set_fb(plane, NULL);
+	igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
+
+	igt_remove_fb(data->drm_fd, &fb);
+}
+
+static void
+test_1px_wide_planes(data_t *data, enum pipe pipe)
+{
+	igt_output_t *output;
+
+	igt_display_require_output_on_pipe(&data->display, pipe);
+
+	for_each_valid_output_on_pipe(&data->display, pipe, output) {
+		igt_plane_t *plane;
+
+		for_each_plane_on_pipe(&data->display, pipe, plane)
+			test_1px_plane(data, pipe, output, plane);
+
+		igt_output_set_pipe(output, PIPE_ANY);
+	}
+}
+
 static void
 run_tests_for_pipe_plane(data_t *data, enum pipe pipe)
 {
@@ -629,6 +805,9 @@ run_tests_for_pipe_plane(data_t *data, enum pipe pipe)
 		      kmstest_pipe_name(pipe))
 		test_plane_panning(data, pipe, TEST_PANNING_BOTTOM_RIGHT |
 					       TEST_SUSPEND_RESUME);
+
+	igt_subtest_f("plane-1pix-wide-pipe-%s", kmstest_pipe_name(pipe))
+		test_1px_wide_planes(data, pipe);
 }
 
 
-- 
2.7.4

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2019-02-25 13:48 [igt-dev] [PATCH i-g-t] tests/kms_plane: Add 1 pixel wide visible plane test Juha-Pekka Heikkila
2019-02-25 14:37 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_plane: Add 1 pixel wide visible plane test (rev2) Patchwork
2019-02-25 18:53 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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