[igt-dev] [PATCH i-g-t 1/2] lib/i915: Move mmap IOCTLs wrappers into separate file

[igt-dev] [PATCH i-g-t 1/2] lib/i915: Move mmap IOCTLs wrappers into separate file

[Antonio Argenziano]

Move all mmap flavours and support function to separate file in i915
folder. This helps with moving i915 specific functions away from common
libraries.

Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/i915/gem_mman.c  | 254 +++++++++++++++++++++++++++++++++++++++++++
 lib/i915/gem_mman.h  |  55 ++++++++++
 lib/ioctl_wrappers.c | 213 ------------------------------------
 lib/ioctl_wrappers.h |  23 +---
 lib/meson.build      |   1 +
 5 files changed, 311 insertions(+), 235 deletions(-)
 create mode 100644 lib/i915/gem_mman.c
 create mode 100644 lib/i915/gem_mman.h

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
new file mode 100644
index 00000000..3cf9a6bb
--- /dev/null
+++ b/lib/i915/gem_mman.c
@@ -0,0 +1,254 @@
+/*
+ * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include <stdbool.h>
+#include <sys/ioctl.h>
+#include <errno.h>
+
+#include "igt_core.h"
+#include "ioctl_wrappers.h"
+
+#include "gem_mman.h"
+
+#ifdef HAVE_VALGRIND
+#include <valgrind/valgrind.h>
+#include <valgrind/memcheck.h>
+
+#define VG(x) x
+#else
+#define VG(x) do {} while (0)
+#endif
+
+/**
+ * __gem_mmap__gtt:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @size: size of the gem buffer
+ * @prot: memory protection bits as used by mmap()
+ *
+ * This functions wraps up procedure to establish a memory mapping through the
+ * GTT.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
+{
+	struct drm_i915_gem_mmap_gtt mmap_arg;
+	void *ptr;
+
+	memset(&mmap_arg, 0, sizeof(mmap_arg));
+	mmap_arg.handle = handle;
+	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg))
+		return NULL;
+
+	ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
+	if (ptr == MAP_FAILED)
+		ptr = NULL;
+	else
+		errno = 0;
+
+	VG(VALGRIND_MAKE_MEM_DEFINED(ptr, size));
+
+	return ptr;
+}
+
+/**
+ * gem_mmap__gtt:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @size: size of the gem buffer
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Like __gem_mmap__gtt() except we assert on failure.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap__gtt(fd, handle, size, prot);
+	igt_assert(ptr);
+	return ptr;
+}
+
+int gem_munmap(void *ptr, uint64_t size)
+{
+	int ret = munmap(ptr, size);
+
+	if (ret == 0)
+		VG(VALGRIND_MAKE_MEM_NOACCESS(ptr, size));
+
+	return ret;
+}
+
+bool gem_mmap__has_wc(int fd)
+{
+	static int has_wc = -1;
+
+	if (has_wc == -1) {
+		struct drm_i915_getparam gp;
+		int mmap_version = -1;
+		int gtt_version = -1;
+
+		has_wc = 0;
+
+		memset(&gp, 0, sizeof(gp));
+		gp.param = I915_PARAM_MMAP_GTT_VERSION;
+		gp.value = &gtt_version;
+		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+		memset(&gp, 0, sizeof(gp));
+		gp.param = I915_PARAM_MMAP_VERSION;
+		gp.value = &mmap_version;
+		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
+		if (mmap_version >= 1 && gtt_version >= 2) {
+			struct drm_i915_gem_mmap arg;
+
+			/* Does this device support wc-mmaps ? */
+			memset(&arg, 0, sizeof(arg));
+			arg.handle = gem_create(fd, 4096);
+			arg.offset = 0;
+			arg.size = 4096;
+			arg.flags = I915_MMAP_WC;
+			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+			gem_close(fd, arg.handle);
+		}
+		errno = 0;
+	}
+
+	return has_wc > 0;
+}
+
+/**
+ * __gem_mmap:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * This functions wraps up procedure to establish a memory mapping through
+ * direct cpu access, bypassing the gpu (valid for wc == false). For wc == true
+ * it also bypass cpu caches completely and GTT system agent (i.e. there is no
+ * automatic tiling of the mmapping through the fence registers).
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+static void
+*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+{
+	struct drm_i915_gem_mmap arg;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = handle;
+	arg.offset = offset;
+	arg.size = size;
+	arg.flags = flags;
+
+	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg))
+		return NULL;
+
+	VG(VALGRIND_MAKE_MEM_DEFINED(from_user_pointer(arg.addr_ptr), arg.size));
+
+	errno = 0;
+	return from_user_pointer(arg.addr_ptr);
+}
+
+/**
+ * __gem_mmap__wc:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * This functions wraps up procedure to establish a memory mapping through
+ * direct cpu access, bypassing the gpu and cpu caches completely and also
+ * bypassing the GTT system agent (i.e. there is no automatic tiling of
+ * the mmapping through the fence registers).
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
+{
+	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
+}
+
+/**
+ * gem_mmap__wc:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Like __gem_mmap__wc() except we assert on failure.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+	igt_assert(ptr);
+	return ptr;
+}
+
+/**
+ * __gem_mmap__cpu:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * This functions wraps up procedure to establish a memory mapping through
+ * direct cpu access, bypassing the gpu completely.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
+{
+	return __gem_mmap(fd, handle, offset, size, prot, 0);
+}
+
+/**
+ * gem_mmap__cpu:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Like __gem_mmap__cpu() except we assert on failure.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
+	igt_assert(ptr);
+	return ptr;
+}
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
new file mode 100644
index 00000000..f7242ed7
--- /dev/null
+++ b/lib/i915/gem_mman.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef GEM_MMAN_H
+#define GEM_MMAN_H
+
+void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
+void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+
+bool gem_mmap__has_wc(int fd);
+void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+
+#ifndef I915_GEM_DOMAIN_WC
+#define I915_GEM_DOMAIN_WC 0x80
+#endif
+
+void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
+void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+
+int gem_munmap(void *ptr, uint64_t size);
+
+/**
+ * gem_require_mmap_wc:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether direct (i.e. cpu access path, bypassing
+ * the gtt) write-combine memory mappings are available. Automatically skips
+ * through igt_require() if not.
+ */
+#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
+
+#endif /* GEM_MMAN_H */
+
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 404c2fbf..39920f87 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -641,219 +641,6 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
 	igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
 }
 
-/**
- * __gem_mmap__gtt:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @size: size of the gem buffer
- * @prot: memory protection bits as used by mmap()
- *
- * This functions wraps up procedure to establish a memory mapping through the
- * GTT.
- *
- * Returns: A pointer to the created memory mapping, NULL on failure.
- */
-void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
-{
-	struct drm_i915_gem_mmap_gtt mmap_arg;
-	void *ptr;
-
-	memset(&mmap_arg, 0, sizeof(mmap_arg));
-	mmap_arg.handle = handle;
-	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg))
-		return NULL;
-
-	ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
-	if (ptr == MAP_FAILED)
-		ptr = NULL;
-	else
-		errno = 0;
-
-	VG(VALGRIND_MAKE_MEM_DEFINED(ptr, size));
-
-	return ptr;
-}
-
-/**
- * gem_mmap__gtt:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @size: size of the gem buffer
- * @prot: memory protection bits as used by mmap()
- *
- * Like __gem_mmap__gtt() except we assert on failure.
- *
- * Returns: A pointer to the created memory mapping
- */
-void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
-{
-	void *ptr = __gem_mmap__gtt(fd, handle, size, prot);
-	igt_assert(ptr);
-	return ptr;
-}
-
-int gem_munmap(void *ptr, uint64_t size)
-{
-	int ret = munmap(ptr, size);
-
-	if (ret == 0)
-		VG(VALGRIND_MAKE_MEM_NOACCESS(ptr, size));
-
-	return ret;
-}
-
-bool gem_mmap__has_wc(int fd)
-{
-	static int has_wc = -1;
-
-	if (has_wc == -1) {
-		struct drm_i915_getparam gp;
-		int mmap_version = -1;
-		int gtt_version = -1;
-
-		has_wc = 0;
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_GTT_VERSION;
-		gp.value = &gtt_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_VERSION;
-		gp.value = &mmap_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
-		if (mmap_version >= 1 && gtt_version >= 2) {
-			struct drm_i915_gem_mmap arg;
-
-			/* Does this device support wc-mmaps ? */
-			memset(&arg, 0, sizeof(arg));
-			arg.handle = gem_create(fd, 4096);
-			arg.offset = 0;
-			arg.size = 4096;
-			arg.flags = I915_MMAP_WC;
-			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
-			gem_close(fd, arg.handle);
-		}
-		errno = 0;
-	}
-
-	return has_wc > 0;
-}
-
-/**
- * __gem_mmap:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @offset: offset in the gem buffer of the mmap arena
- * @size: size of the mmap arena
- * @prot: memory protection bits as used by mmap()
- * @flags: flags used to determine caching
- *
- * This functions wraps up procedure to establish a memory mapping through
- * direct cpu access, bypassing the gpu (valid for wc == false). For wc == true
- * it also bypass cpu caches completely and GTT system agent (i.e. there is no
- * automatic tiling of the mmapping through the fence registers).
- *
- * Returns: A pointer to the created memory mapping, NULL on failure.
- */
-static void
-*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
-{
-	struct drm_i915_gem_mmap arg;
-
-	memset(&arg, 0, sizeof(arg));
-	arg.handle = handle;
-	arg.offset = offset;
-	arg.size = size;
-	arg.flags = flags;
-
-	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg))
-		return NULL;
-
-	VG(VALGRIND_MAKE_MEM_DEFINED(from_user_pointer(arg.addr_ptr), arg.size));
-
-	errno = 0;
-	return from_user_pointer(arg.addr_ptr);
-}
-
-/**
- * __gem_mmap__wc:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @offset: offset in the gem buffer of the mmap arena
- * @size: size of the mmap arena
- * @prot: memory protection bits as used by mmap()
- *
- * This functions wraps up procedure to establish a memory mapping through
- * direct cpu access, bypassing the gpu and cpu caches completely and also
- * bypassing the GTT system agent (i.e. there is no automatic tiling of
- * the mmapping through the fence registers).
- *
- * Returns: A pointer to the created memory mapping, NULL on failure.
- */
-void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
-{
-	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
-}
-
-/**
- * gem_mmap__wc:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @offset: offset in the gem buffer of the mmap arena
- * @size: size of the mmap arena
- * @prot: memory protection bits as used by mmap()
- *
- * Like __gem_mmap__wc() except we assert on failure.
- *
- * Returns: A pointer to the created memory mapping
- */
-void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
-{
-	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
-	igt_assert(ptr);
-	return ptr;
-}
-
-/**
- * __gem_mmap__cpu:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @offset: offset in the gem buffer of the mmap arena
- * @size: size of the mmap arena
- * @prot: memory protection bits as used by mmap()
- *
- * This functions wraps up procedure to establish a memory mapping through
- * direct cpu access, bypassing the gpu completely.
- *
- * Returns: A pointer to the created memory mapping, NULL on failure.
- */
-void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
-{
-	return __gem_mmap(fd, handle, offset, size, prot, 0);
-}
-
-/**
- * gem_mmap__cpu:
- * @fd: open i915 drm file descriptor
- * @handle: gem buffer object handle
- * @offset: offset in the gem buffer of the mmap arena
- * @size: size of the mmap arena
- * @prot: memory protection bits as used by mmap()
- *
- * Like __gem_mmap__cpu() except we assert on failure.
- *
- * Returns: A pointer to the created memory mapping
- */
-void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
-{
-	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
-	igt_assert(ptr);
-	return ptr;
-}
-
 /**
  * gem_madvise:
  * @fd: open i915 drm file descriptor
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index b22b36b0..54703235 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -38,6 +38,7 @@
 
 #include "i915/gem_context.h"
 #include "i915/gem_scheduler.h"
+#include "i915/gem_mman.h"
 
 /**
  * igt_ioctl:
@@ -84,22 +85,10 @@ int __gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
 void gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
 int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
 
-void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
-void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
-
-bool gem_mmap__has_wc(int fd);
-void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
-
 #ifndef I915_GEM_DOMAIN_WC
 #define I915_GEM_DOMAIN_WC 0x80
 #endif
 
-void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
-void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
-void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
-
-int gem_munmap(void *ptr, uint64_t size);
-
 /**
  * gem_require_stolen_support:
  * @fd: open i915 drm file descriptor
@@ -111,16 +100,6 @@ int gem_munmap(void *ptr, uint64_t size);
 			igt_require(gem_create__has_stolen_support(fd) && \
 				    (gem_total_stolen_size(fd) > 0))
 
-/**
- * gem_require_mmap_wc:
- * @fd: open i915 drm file descriptor
- *
- * Feature test macro to query whether direct (i.e. cpu access path, bypassing
- * the gtt) write-combine memory mappings are available. Automatically skips
- * through igt_require() if not.
- */
-#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
-
 int gem_madvise(int fd, uint32_t handle, int state);
 
 #define LOCAL_I915_GEM_USERPTR       0x33
diff --git a/lib/meson.build b/lib/meson.build
index dd36f818..0eb5585d 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -4,6 +4,7 @@ lib_sources = [
 	'i915/gem_scheduler.c',
 	'i915/gem_submission.c',
 	'i915/gem_ring.c',
+	'i915/gem_mman.c',
 	'igt_color_encoding.c',
 	'igt_debugfs.c',
 	'igt_device.c',
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 2/2] lib/i915: Add mmap_offset support

[Antonio Argenziano]

From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>

With recently proposed changes, IGT need to start supporting new
way of mmaping object, which will be used from now by default.
This patch modify gem_mmap_wc and gem_mmap functions to be
in sync with those changes.

v2:
	- Fix IOCTL number. (Daniele)
	- Move wrappers to new file. (Chris)

v3:
	- Use mmap IOCTL for lowr level wrappers. (Chris)

Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/i915/gem_mman.c | 125 ++++++++++++++++++++++++++++++++++++--------
 lib/i915/gem_mman.h |  33 ++++++++++++
 2 files changed, 136 insertions(+), 22 deletions(-)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 3cf9a6bb..f89d389e 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -106,36 +106,51 @@ bool gem_mmap__has_wc(int fd)
 	static int has_wc = -1;
 
 	if (has_wc == -1) {
-		struct drm_i915_getparam gp;
-		int mmap_version = -1;
-		int gtt_version = -1;
 
 		has_wc = 0;
 
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_GTT_VERSION;
-		gp.value = &gtt_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_VERSION;
-		gp.value = &mmap_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
-		if (mmap_version >= 1 && gtt_version >= 2) {
-			struct drm_i915_gem_mmap arg;
+		/* Do we have the new mmap_offset ioctl? */
+		if (has_mmap_offset(fd)) {
+			struct local_drm_i915_gem_mmap_offset arg;
 
 			/* Does this device support wc-mmaps ? */
 			memset(&arg, 0, sizeof(arg));
 			arg.handle = gem_create(fd, 4096);
 			arg.offset = 0;
-			arg.size = 4096;
-			arg.flags = I915_MMAP_WC;
-			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+			arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
+			has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
 			gem_close(fd, arg.handle);
+		} else {
+			struct drm_i915_getparam gp;
+			int mmap_version = -1;
+			int gtt_version = -1;
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_GTT_VERSION;
+			gp.value = &gtt_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_VERSION;
+			gp.value = &mmap_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			/* Do we have the mmap_ioctl with DOMAIN_WC? */
+			if (mmap_version >= 1 && gtt_version >= 2) {
+				struct drm_i915_gem_mmap arg;
+
+				/* Does this device support wc-mmaps ? */
+				memset(&arg, 0, sizeof(arg));
+				arg.handle = gem_create(fd, 4096);
+				arg.offset = 0;
+				arg.size = 4096;
+				arg.flags = I915_MMAP_WC;
+				has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+				gem_close(fd, arg.handle);
+			}
 		}
-		errno = 0;
+
+			errno = 0;
 	}
 
 	return has_wc > 0;
@@ -211,7 +226,12 @@ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, un
  */
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+	void *ptr;
+
+	ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
+	if (!ptr)
+		ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+
 	igt_assert(ptr);
 	return ptr;
 }
@@ -248,7 +268,68 @@ void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, u
  */
 void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
+	void *ptr;
+
+	ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
+	if (!ptr)
+		ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
+
 	igt_assert(ptr);
 	return ptr;
 }
+
+bool has_mmap_offset(int fd)
+{
+	static int has_mmap_offset = -1;
+
+	if (has_mmap_offset == -1) {
+		struct drm_i915_getparam gp;
+
+		has_mmap_offset = 0;
+
+		memset(&gp, 0, sizeof(gp));
+		gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
+		gp.value = &has_mmap_offset;
+		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	}
+
+	return has_mmap_offset > 0;
+}
+
+/**
+ * __gem_mmap_offset:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void
+*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+{
+	struct local_drm_i915_gem_mmap_offset arg;
+	void *ptr;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = handle;
+	arg.offset = offset;
+	arg.flags = flags;
+
+	if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
+		return NULL;
+
+	ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
+
+	if (ptr == MAP_FAILED)
+		ptr = NULL;
+	else
+		errno = 0;
+
+	return ptr;
+}
+
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index f7242ed7..c2c10249 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -51,5 +51,38 @@ int gem_munmap(void *ptr, uint64_t size);
  */
 #define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
 
+struct local_drm_i915_gem_mmap_offset {
+	/** Handle for the object being mapped. */
+	__u32 handle;
+	__u32 pad;
+	/**
+	 * Fake offset to use for subsequent mmap call
+	 *
+	 * This is a fixed-size type for 32/64 compatibility.
+	 */
+	__u64 offset;
+
+	/**
+	 * Flags for extended behaviour.
+	 *
+	 * It is mandatory that either one of the _WC/_WB flags
+	 * should be passed here.
+	 */
+	__u64 flags;
+};
+
+#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
+#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
+#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
+#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
+
+#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
+		DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
+
+bool has_mmap_offset(int fd);
+
+void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
+
+
 #endif /* GEM_MMAN_H */
 
-- 
2.20.1

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[igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/2] lib/i915: Move mmap IOCTLs wrappers into separate file

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] lib/i915: Move mmap IOCTLs wrappers into separate file
URL   : https://patchwork.freedesktop.org/series/57222/
State : failure

== Summary ==

CI Bug Log - changes from IGT_4855 -> IGTPW_2518
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_2518 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_2518, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57222/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_2518:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_fence@basic-await-default:
    - fi-skl-6700k2:      PASS -> FAIL +2
    - fi-hsw-4770r:       PASS -> FAIL +3
    - fi-byt-n2820:       PASS -> FAIL +2
    - fi-skl-6260u:       PASS -> FAIL +2
    - fi-kbl-7560u:       PASS -> FAIL +2
    - fi-ivb-3770:        PASS -> FAIL +2
    - fi-bsw-n3050:       PASS -> FAIL +2
    - fi-skl-6600u:       PASS -> FAIL +2
    - fi-hsw-4770:        PASS -> FAIL +3
    - fi-byt-j1900:       PASS -> FAIL +2
    - fi-blb-e6850:       PASS -> FAIL +1
    - fi-kbl-8809g:       PASS -> FAIL +2
    - fi-kbl-7500u:       PASS -> FAIL +2
    - fi-kbl-x1275:       PASS -> FAIL +2

  * igt@gem_exec_fence@nb-await-default:
    - fi-bsw-kefka:       PASS -> FAIL +2
    - fi-bxt-j4205:       PASS -> FAIL +2
    - fi-ilk-650:         PASS -> FAIL +3
    - fi-icl-u2:          NOTRUN -> FAIL +2
    - fi-ivb-3520m:       PASS -> FAIL +2
    - fi-snb-2520m:       PASS -> FAIL +3
    - fi-whl-u:           PASS -> FAIL +2
    - fi-bdw-5557u:       PASS -> FAIL +2
    - fi-hsw-peppy:       PASS -> FAIL +2
    - fi-skl-gvtdvm:      PASS -> FAIL +2

  * igt@gem_mmap_gtt@basic-small-bo-tiledy:
    - fi-kbl-7567u:       PASS -> FAIL +2
    - fi-bwr-2160:        PASS -> FAIL +1
    - fi-bdw-gvtdvm:      PASS -> FAIL +2
    - fi-kbl-guc:         PASS -> FAIL
    - fi-cfl-8109u:       PASS -> FAIL +2
    - fi-kbl-r:           PASS -> FAIL +2
    - fi-cfl-guc:         PASS -> FAIL
    - fi-elk-e7500:       PASS -> FAIL +3
    - fi-cfl-8700k:       PASS -> FAIL +2
    - fi-apl-guc:         PASS -> FAIL
    - fi-pnv-d510:        PASS -> FAIL +2
    - fi-skl-guc:         PASS -> FAIL

  * igt@kms_frontbuffer_tracking@basic:
    - fi-bsw-n3050:       PASS -> CRASH +1
    - fi-bsw-kefka:       PASS -> CRASH +1
    - fi-ivb-3770:        PASS -> CRASH
    - fi-skl-6700k2:      PASS -> CRASH
    - fi-byt-j1900:       PASS -> CRASH
    - fi-hsw-4770:        PASS -> CRASH
    - fi-kbl-7560u:       PASS -> CRASH
    - fi-skl-6600u:       PASS -> CRASH
    - fi-bdw-5557u:       PASS -> CRASH
    - fi-kbl-r:           PASS -> CRASH
    - fi-cfl-8109u:       PASS -> CRASH
    - fi-hsw-4770r:       PASS -> CRASH
    - fi-skl-6260u:       PASS -> CRASH
    - fi-ilk-650:         PASS -> CRASH
    - fi-byt-n2820:       PASS -> CRASH
    - fi-snb-2520m:       PASS -> CRASH
    - fi-whl-u:           PASS -> CRASH
    - fi-cfl-8700k:       PASS -> CRASH
    - fi-kbl-7500u:       PASS -> CRASH
    - fi-ivb-3520m:       PASS -> CRASH
    - fi-bdw-gvtdvm:      PASS -> CRASH
    - fi-kbl-7567u:       PASS -> CRASH
    - fi-kbl-x1275:       PASS -> CRASH
    - fi-skl-gvtdvm:      PASS -> CRASH

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_fence@basic-await-default:
    - {fi-icl-y}:         PASS -> FAIL +2

  
Known issues
------------

  Here are the changes found in IGTPW_2518 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@fork-gfx0:
    - fi-icl-u2:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@gem_exec_basic@readonly-bsd1:
    - fi-icl-u2:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_fence@basic-await-default:
    - fi-apl-guc:         PASS -> FAIL [fdo#109474]
    - fi-kbl-guc:         PASS -> FAIL [fdo#109474]
    - fi-cfl-guc:         PASS -> FAIL [fdo#109474]
    - fi-skl-guc:         PASS -> FAIL [fdo#109474]

  * igt@gem_exec_parse@basic-allowed:
    - fi-icl-u2:          NOTRUN -> SKIP [fdo#109289] +1

  * igt@gem_exec_reloc@basic-cpu-noreloc:
    - fi-cfl-guc:         PASS -> SKIP [fdo#109271] +63

  * igt@gem_exec_reloc@basic-gtt-noreloc:
    - fi-skl-guc:         PASS -> SKIP [fdo#109271] +63

  * igt@gem_exec_reloc@basic-write-gtt:
    - fi-apl-guc:         PASS -> SKIP [fdo#109271] +40

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  * igt@gem_mmap_gtt@basic-wc:
    - fi-pnv-d510:        PASS -> FAIL [fdo#107307]
    - fi-kbl-guc:         PASS -> FAIL [fdo#107307]
    - fi-kbl-x1275:       PASS -> FAIL [fdo#107307]
    - fi-byt-j1900:       PASS -> FAIL [fdo#107307]
    - fi-kbl-r:           PASS -> FAIL [fdo#107307]
    - fi-skl-6260u:       PASS -> FAIL [fdo#107307]
    - fi-byt-n2820:       PASS -> FAIL [fdo#107307]
    - fi-kbl-8809g:       PASS -> FAIL [fdo#107307]
    - fi-skl-gvtdvm:      PASS -> FAIL [fdo#107307]
    - fi-kbl-7560u:       PASS -> FAIL [fdo#107307]
    - fi-hsw-4770:        PASS -> FAIL [fdo#107307]
    - fi-cfl-guc:         PASS -> FAIL [fdo#107307]
    - fi-whl-u:           PASS -> FAIL [fdo#107307]
    - fi-skl-guc:         PASS -> FAIL [fdo#107307]
    - fi-kbl-7567u:       PASS -> FAIL [fdo#107307]
    - fi-bsw-n3050:       PASS -> FAIL [fdo#107307]
    - fi-skl-6700k2:      PASS -> FAIL [fdo#107307]
    - fi-ivb-3770:        PASS -> FAIL [fdo#107307]
    - fi-hsw-peppy:       PASS -> FAIL [fdo#107307]
    - fi-cfl-8700k:       PASS -> FAIL [fdo#107307]
    - fi-apl-guc:         PASS -> INCOMPLETE [fdo#103927]
    - fi-skl-6600u:       PASS -> FAIL [fdo#107307]
    - fi-kbl-7500u:       PASS -> FAIL [fdo#107307]
    - fi-gdg-551:         PASS -> FAIL [fdo#107307]
    - fi-cfl-8109u:       PASS -> FAIL [fdo#107307]
    - fi-ivb-3520m:       PASS -> FAIL [fdo#107307]
    - fi-bxt-j4205:       PASS -> INCOMPLETE [fdo#103927]
    - fi-ilk-650:         PASS -> FAIL [fdo#107307]
    - fi-bdw-gvtdvm:      PASS -> FAIL [fdo#107307]
    - fi-icl-u2:          NOTRUN -> FAIL [fdo#107307]
    - fi-hsw-4770r:       PASS -> FAIL [fdo#107307]
    - fi-elk-e7500:       PASS -> FAIL [fdo#107307]
    - fi-snb-2520m:       PASS -> FAIL [fdo#107307]
    - fi-bsw-kefka:       PASS -> FAIL [fdo#107307]
    - fi-bwr-2160:        PASS -> FAIL [fdo#107307]
    - fi-bdw-5557u:       PASS -> FAIL [fdo#107307]

  * igt@i915_pm_rps@basic-api:
    - fi-kbl-guc:         PASS -> SKIP [fdo#109271] +71

  * igt@i915_selftest@live_contexts:
    - fi-icl-u2:          NOTRUN -> DMESG-FAIL [fdo#108569]

  * igt@kms_busy@basic-flip-a:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182]

  * igt@kms_chamelium@dp-edid-read:
    - fi-icl-u2:          NOTRUN -> SKIP [fdo#109316] +2

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       PASS -> FAIL [fdo#109485]

  * igt@kms_chamelium@vga-hpd-fast:
    - fi-icl-u2:          NOTRUN -> SKIP [fdo#109309] +1

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u2:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          NOTRUN -> FAIL [fdo#103167]

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-kbl-7500u:       DMESG-WARN [fdo#105128] / [fdo#107139] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
  [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
  [fdo#107307]: https://bugs.freedesktop.org/show_bug.cgi?id=107307
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109316]: https://bugs.freedesktop.org/show_bug.cgi?id=109316
  [fdo#109474]: https://bugs.freedesktop.org/show_bug.cgi?id=109474
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (42 -> 39)
------------------------------

  Additional (1): fi-icl-u2 
  Missing    (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-u3 


Build changes
-------------

    * IGT: IGT_4855 -> IGTPW_2518

  CI_DRM_5659: bffea990c63087245e8501df82fd45f24ce6ad1f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2518: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2518/
  IGT_4855: 7cc428962158ed4335d998a5cd447050d423e618 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2518/
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915: Move mmap IOCTLs wrappers into separate file

[Petri Latvala]

On Mon, Feb 25, 2019 at 04:20:19PM -0800, Antonio Argenziano wrote:
> Move all mmap flavours and support function to separate file in i915
> folder. This helps with moving i915 specific functions away from common
> libraries.
> 
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  lib/i915/gem_mman.c  | 254 +++++++++++++++++++++++++++++++++++++++++++
>  lib/i915/gem_mman.h  |  55 ++++++++++
>  lib/ioctl_wrappers.c | 213 ------------------------------------
>  lib/ioctl_wrappers.h |  23 +---
>  lib/meson.build      |   1 +


Where's the change to lib/Makefile.sources?


-- 
Petri Latvala



>  5 files changed, 311 insertions(+), 235 deletions(-)
>  create mode 100644 lib/i915/gem_mman.c
>  create mode 100644 lib/i915/gem_mman.h
> 
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> new file mode 100644
> index 00000000..3cf9a6bb
> --- /dev/null
> +++ b/lib/i915/gem_mman.c
> @@ -0,0 +1,254 @@
> +/*
> + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include <stdbool.h>
> +#include <sys/ioctl.h>
> +#include <errno.h>
> +
> +#include "igt_core.h"
> +#include "ioctl_wrappers.h"
> +
> +#include "gem_mman.h"
> +
> +#ifdef HAVE_VALGRIND
> +#include <valgrind/valgrind.h>
> +#include <valgrind/memcheck.h>
> +
> +#define VG(x) x
> +#else
> +#define VG(x) do {} while (0)
> +#endif
> +
> +/**
> + * __gem_mmap__gtt:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @size: size of the gem buffer
> + * @prot: memory protection bits as used by mmap()
> + *
> + * This functions wraps up procedure to establish a memory mapping through the
> + * GTT.
> + *
> + * Returns: A pointer to the created memory mapping, NULL on failure.
> + */
> +void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
> +{
> +	struct drm_i915_gem_mmap_gtt mmap_arg;
> +	void *ptr;
> +
> +	memset(&mmap_arg, 0, sizeof(mmap_arg));
> +	mmap_arg.handle = handle;
> +	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg))
> +		return NULL;
> +
> +	ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
> +	if (ptr == MAP_FAILED)
> +		ptr = NULL;
> +	else
> +		errno = 0;
> +
> +	VG(VALGRIND_MAKE_MEM_DEFINED(ptr, size));
> +
> +	return ptr;
> +}
> +
> +/**
> + * gem_mmap__gtt:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @size: size of the gem buffer
> + * @prot: memory protection bits as used by mmap()
> + *
> + * Like __gem_mmap__gtt() except we assert on failure.
> + *
> + * Returns: A pointer to the created memory mapping
> + */
> +void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
> +{
> +	void *ptr = __gem_mmap__gtt(fd, handle, size, prot);
> +	igt_assert(ptr);
> +	return ptr;
> +}
> +
> +int gem_munmap(void *ptr, uint64_t size)
> +{
> +	int ret = munmap(ptr, size);
> +
> +	if (ret == 0)
> +		VG(VALGRIND_MAKE_MEM_NOACCESS(ptr, size));
> +
> +	return ret;
> +}
> +
> +bool gem_mmap__has_wc(int fd)
> +{
> +	static int has_wc = -1;
> +
> +	if (has_wc == -1) {
> +		struct drm_i915_getparam gp;
> +		int mmap_version = -1;
> +		int gtt_version = -1;
> +
> +		has_wc = 0;
> +
> +		memset(&gp, 0, sizeof(gp));
> +		gp.param = I915_PARAM_MMAP_GTT_VERSION;
> +		gp.value = &gtt_version;
> +		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +
> +		memset(&gp, 0, sizeof(gp));
> +		gp.param = I915_PARAM_MMAP_VERSION;
> +		gp.value = &mmap_version;
> +		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +
> +		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
> +		if (mmap_version >= 1 && gtt_version >= 2) {
> +			struct drm_i915_gem_mmap arg;
> +
> +			/* Does this device support wc-mmaps ? */
> +			memset(&arg, 0, sizeof(arg));
> +			arg.handle = gem_create(fd, 4096);
> +			arg.offset = 0;
> +			arg.size = 4096;
> +			arg.flags = I915_MMAP_WC;
> +			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> +			gem_close(fd, arg.handle);
> +		}
> +		errno = 0;
> +	}
> +
> +	return has_wc > 0;
> +}
> +
> +/**
> + * __gem_mmap:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + * @flags: flags used to determine caching
> + *
> + * This functions wraps up procedure to establish a memory mapping through
> + * direct cpu access, bypassing the gpu (valid for wc == false). For wc == true
> + * it also bypass cpu caches completely and GTT system agent (i.e. there is no
> + * automatic tiling of the mmapping through the fence registers).
> + *
> + * Returns: A pointer to the created memory mapping, NULL on failure.
> + */
> +static void
> +*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
> +{
> +	struct drm_i915_gem_mmap arg;
> +
> +	memset(&arg, 0, sizeof(arg));
> +	arg.handle = handle;
> +	arg.offset = offset;
> +	arg.size = size;
> +	arg.flags = flags;
> +
> +	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg))
> +		return NULL;
> +
> +	VG(VALGRIND_MAKE_MEM_DEFINED(from_user_pointer(arg.addr_ptr), arg.size));
> +
> +	errno = 0;
> +	return from_user_pointer(arg.addr_ptr);
> +}
> +
> +/**
> + * __gem_mmap__wc:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + *
> + * This functions wraps up procedure to establish a memory mapping through
> + * direct cpu access, bypassing the gpu and cpu caches completely and also
> + * bypassing the GTT system agent (i.e. there is no automatic tiling of
> + * the mmapping through the fence registers).
> + *
> + * Returns: A pointer to the created memory mapping, NULL on failure.
> + */
> +void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> +{
> +	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
> +}
> +
> +/**
> + * gem_mmap__wc:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + *
> + * Like __gem_mmap__wc() except we assert on failure.
> + *
> + * Returns: A pointer to the created memory mapping
> + */
> +void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> +{
> +	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
> +	igt_assert(ptr);
> +	return ptr;
> +}
> +
> +/**
> + * __gem_mmap__cpu:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + *
> + * This functions wraps up procedure to establish a memory mapping through
> + * direct cpu access, bypassing the gpu completely.
> + *
> + * Returns: A pointer to the created memory mapping, NULL on failure.
> + */
> +void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> +{
> +	return __gem_mmap(fd, handle, offset, size, prot, 0);
> +}
> +
> +/**
> + * gem_mmap__cpu:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + *
> + * Like __gem_mmap__cpu() except we assert on failure.
> + *
> + * Returns: A pointer to the created memory mapping
> + */
> +void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> +{
> +	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
> +	igt_assert(ptr);
> +	return ptr;
> +}
> diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
> new file mode 100644
> index 00000000..f7242ed7
> --- /dev/null
> +++ b/lib/i915/gem_mman.h
> @@ -0,0 +1,55 @@
> +/*
> + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef GEM_MMAN_H
> +#define GEM_MMAN_H
> +
> +void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
> +void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> +
> +bool gem_mmap__has_wc(int fd);
> +void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> +
> +#ifndef I915_GEM_DOMAIN_WC
> +#define I915_GEM_DOMAIN_WC 0x80
> +#endif
> +
> +void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
> +void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> +void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> +
> +int gem_munmap(void *ptr, uint64_t size);
> +
> +/**
> + * gem_require_mmap_wc:
> + * @fd: open i915 drm file descriptor
> + *
> + * Feature test macro to query whether direct (i.e. cpu access path, bypassing
> + * the gtt) write-combine memory mappings are available. Automatically skips
> + * through igt_require() if not.
> + */
> +#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
> +
> +#endif /* GEM_MMAN_H */
> +
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 404c2fbf..39920f87 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -641,219 +641,6 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
>  	igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
>  }
>  
> -/**
> - * __gem_mmap__gtt:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @size: size of the gem buffer
> - * @prot: memory protection bits as used by mmap()
> - *
> - * This functions wraps up procedure to establish a memory mapping through the
> - * GTT.
> - *
> - * Returns: A pointer to the created memory mapping, NULL on failure.
> - */
> -void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
> -{
> -	struct drm_i915_gem_mmap_gtt mmap_arg;
> -	void *ptr;
> -
> -	memset(&mmap_arg, 0, sizeof(mmap_arg));
> -	mmap_arg.handle = handle;
> -	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg))
> -		return NULL;
> -
> -	ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
> -	if (ptr == MAP_FAILED)
> -		ptr = NULL;
> -	else
> -		errno = 0;
> -
> -	VG(VALGRIND_MAKE_MEM_DEFINED(ptr, size));
> -
> -	return ptr;
> -}
> -
> -/**
> - * gem_mmap__gtt:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @size: size of the gem buffer
> - * @prot: memory protection bits as used by mmap()
> - *
> - * Like __gem_mmap__gtt() except we assert on failure.
> - *
> - * Returns: A pointer to the created memory mapping
> - */
> -void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
> -{
> -	void *ptr = __gem_mmap__gtt(fd, handle, size, prot);
> -	igt_assert(ptr);
> -	return ptr;
> -}
> -
> -int gem_munmap(void *ptr, uint64_t size)
> -{
> -	int ret = munmap(ptr, size);
> -
> -	if (ret == 0)
> -		VG(VALGRIND_MAKE_MEM_NOACCESS(ptr, size));
> -
> -	return ret;
> -}
> -
> -bool gem_mmap__has_wc(int fd)
> -{
> -	static int has_wc = -1;
> -
> -	if (has_wc == -1) {
> -		struct drm_i915_getparam gp;
> -		int mmap_version = -1;
> -		int gtt_version = -1;
> -
> -		has_wc = 0;
> -
> -		memset(&gp, 0, sizeof(gp));
> -		gp.param = I915_PARAM_MMAP_GTT_VERSION;
> -		gp.value = &gtt_version;
> -		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> -
> -		memset(&gp, 0, sizeof(gp));
> -		gp.param = I915_PARAM_MMAP_VERSION;
> -		gp.value = &mmap_version;
> -		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> -
> -		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
> -		if (mmap_version >= 1 && gtt_version >= 2) {
> -			struct drm_i915_gem_mmap arg;
> -
> -			/* Does this device support wc-mmaps ? */
> -			memset(&arg, 0, sizeof(arg));
> -			arg.handle = gem_create(fd, 4096);
> -			arg.offset = 0;
> -			arg.size = 4096;
> -			arg.flags = I915_MMAP_WC;
> -			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> -			gem_close(fd, arg.handle);
> -		}
> -		errno = 0;
> -	}
> -
> -	return has_wc > 0;
> -}
> -
> -/**
> - * __gem_mmap:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @offset: offset in the gem buffer of the mmap arena
> - * @size: size of the mmap arena
> - * @prot: memory protection bits as used by mmap()
> - * @flags: flags used to determine caching
> - *
> - * This functions wraps up procedure to establish a memory mapping through
> - * direct cpu access, bypassing the gpu (valid for wc == false). For wc == true
> - * it also bypass cpu caches completely and GTT system agent (i.e. there is no
> - * automatic tiling of the mmapping through the fence registers).
> - *
> - * Returns: A pointer to the created memory mapping, NULL on failure.
> - */
> -static void
> -*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
> -{
> -	struct drm_i915_gem_mmap arg;
> -
> -	memset(&arg, 0, sizeof(arg));
> -	arg.handle = handle;
> -	arg.offset = offset;
> -	arg.size = size;
> -	arg.flags = flags;
> -
> -	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg))
> -		return NULL;
> -
> -	VG(VALGRIND_MAKE_MEM_DEFINED(from_user_pointer(arg.addr_ptr), arg.size));
> -
> -	errno = 0;
> -	return from_user_pointer(arg.addr_ptr);
> -}
> -
> -/**
> - * __gem_mmap__wc:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @offset: offset in the gem buffer of the mmap arena
> - * @size: size of the mmap arena
> - * @prot: memory protection bits as used by mmap()
> - *
> - * This functions wraps up procedure to establish a memory mapping through
> - * direct cpu access, bypassing the gpu and cpu caches completely and also
> - * bypassing the GTT system agent (i.e. there is no automatic tiling of
> - * the mmapping through the fence registers).
> - *
> - * Returns: A pointer to the created memory mapping, NULL on failure.
> - */
> -void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> -{
> -	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
> -}
> -
> -/**
> - * gem_mmap__wc:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @offset: offset in the gem buffer of the mmap arena
> - * @size: size of the mmap arena
> - * @prot: memory protection bits as used by mmap()
> - *
> - * Like __gem_mmap__wc() except we assert on failure.
> - *
> - * Returns: A pointer to the created memory mapping
> - */
> -void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> -{
> -	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
> -	igt_assert(ptr);
> -	return ptr;
> -}
> -
> -/**
> - * __gem_mmap__cpu:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @offset: offset in the gem buffer of the mmap arena
> - * @size: size of the mmap arena
> - * @prot: memory protection bits as used by mmap()
> - *
> - * This functions wraps up procedure to establish a memory mapping through
> - * direct cpu access, bypassing the gpu completely.
> - *
> - * Returns: A pointer to the created memory mapping, NULL on failure.
> - */
> -void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> -{
> -	return __gem_mmap(fd, handle, offset, size, prot, 0);
> -}
> -
> -/**
> - * gem_mmap__cpu:
> - * @fd: open i915 drm file descriptor
> - * @handle: gem buffer object handle
> - * @offset: offset in the gem buffer of the mmap arena
> - * @size: size of the mmap arena
> - * @prot: memory protection bits as used by mmap()
> - *
> - * Like __gem_mmap__cpu() except we assert on failure.
> - *
> - * Returns: A pointer to the created memory mapping
> - */
> -void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> -{
> -	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
> -	igt_assert(ptr);
> -	return ptr;
> -}
> -
>  /**
>   * gem_madvise:
>   * @fd: open i915 drm file descriptor
> diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
> index b22b36b0..54703235 100644
> --- a/lib/ioctl_wrappers.h
> +++ b/lib/ioctl_wrappers.h
> @@ -38,6 +38,7 @@
>  
>  #include "i915/gem_context.h"
>  #include "i915/gem_scheduler.h"
> +#include "i915/gem_mman.h"
>  
>  /**
>   * igt_ioctl:
> @@ -84,22 +85,10 @@ int __gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
>  void gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
>  int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
>  
> -void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
> -void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> -
> -bool gem_mmap__has_wc(int fd);
> -void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> -
>  #ifndef I915_GEM_DOMAIN_WC
>  #define I915_GEM_DOMAIN_WC 0x80
>  #endif
>  
> -void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
> -void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> -void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
> -
> -int gem_munmap(void *ptr, uint64_t size);
> -
>  /**
>   * gem_require_stolen_support:
>   * @fd: open i915 drm file descriptor
> @@ -111,16 +100,6 @@ int gem_munmap(void *ptr, uint64_t size);
>  			igt_require(gem_create__has_stolen_support(fd) && \
>  				    (gem_total_stolen_size(fd) > 0))
>  
> -/**
> - * gem_require_mmap_wc:
> - * @fd: open i915 drm file descriptor
> - *
> - * Feature test macro to query whether direct (i.e. cpu access path, bypassing
> - * the gtt) write-combine memory mappings are available. Automatically skips
> - * through igt_require() if not.
> - */
> -#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
> -
>  int gem_madvise(int fd, uint32_t handle, int state);
>  
>  #define LOCAL_I915_GEM_USERPTR       0x33
> diff --git a/lib/meson.build b/lib/meson.build
> index dd36f818..0eb5585d 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -4,6 +4,7 @@ lib_sources = [
>  	'i915/gem_scheduler.c',
>  	'i915/gem_submission.c',
>  	'i915/gem_ring.c',
> +	'i915/gem_mman.c',
>  	'igt_color_encoding.c',
>  	'igt_debugfs.c',
>  	'igt_device.c',
> -- 
> 2.20.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915: Move mmap IOCTLs wrappers into separate file

[Antonio Argenziano]

On 26/02/19 01:49, Petri Latvala wrote:
> On Mon, Feb 25, 2019 at 04:20:19PM -0800, Antonio Argenziano wrote:
>> Move all mmap flavours and support function to separate file in i915
>> folder. This helps with moving i915 specific functions away from common
>> libraries.
>>
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> ---
>>   lib/i915/gem_mman.c  | 254 +++++++++++++++++++++++++++++++++++++++++++
>>   lib/i915/gem_mman.h  |  55 ++++++++++
>>   lib/ioctl_wrappers.c | 213 ------------------------------------
>>   lib/ioctl_wrappers.h |  23 +---
>>   lib/meson.build      |   1 +
> 
> 
> Where's the change to lib/Makefile.sources?

Ops, I forgot about that.

Thanks,
Antonio

> 
> 
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915: Move mmap IOCTLs wrappers into separate file

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-26 00:20:19)
> Move all mmap flavours and support function to separate file in i915
> folder. This helps with moving i915 specific functions away from common
> libraries.
> 
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
> index b22b36b0..54703235 100644
> --- a/lib/ioctl_wrappers.h
> +++ b/lib/ioctl_wrappers.h
> @@ -38,6 +38,7 @@
>  
>  #include "i915/gem_context.h"
>  #include "i915/gem_scheduler.h"
> +#include "i915/gem_mman.h"

Noooo!!! I hadn't spotted we committed this sin before, but now it must
go!
-Chris
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