[igt-dev] [PATCH i-g-t v4] igt/tests: kms_plane_stress: Add plane stress test

[igt-dev] [PATCH i-g-t v4] igt/tests: kms_plane_stress: Add plane stress test

[Stanislav Lisovskiy]

This test attempts to utilize all connected
outputs at the same time, using maximum possible
resolution and amount of planes, to check whether
we are hiting any kind of bandwidth, watermark or
other limitations.

v2: Added cpu and gpu load threads, which consume
    additional bandwidth.

v3: Removed binary picture file, using pattern fb
    instead.

v4: Moved FB creation/removal to better place.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 lib/igt_kms.h            |   7 +
 tests/Makefile.sources   |   1 +
 tests/kms_plane_stress.c | 546 +++++++++++++++++++++++++++++++++++++++
 tests/meson.build        |   1 +
 4 files changed, 555 insertions(+)
 create mode 100644 tests/kms_plane_stress.c

diff --git a/lib/igt_kms.h b/lib/igt_kms.h
index 407f3d64..0e6784ca 100644
--- a/lib/igt_kms.h
+++ b/lib/igt_kms.h
@@ -519,6 +519,13 @@ static inline bool igt_output_is_connected(igt_output_t *output)
 		for_each_if ((((output) = &(display)->outputs[con__]), \
 			     igt_pipe_connector_valid((pipe), (output))))
 
+#define for_each_pipe_with_new_output(display, pipe, output) \
+			for (int con = 0, (pipe) = 0; con < (display)->n_outputs; con++) \
+				for_each_if((output) = &(display)->outputs[con]) \
+					for_each_if((pipe) < IGT_MAX_PIPES) \
+						for_each_if(igt_pipe_connector_valid((pipe), (output)))
+
+
 igt_output_t **__igt_pipe_populate_outputs(igt_display_t *display,
 					   igt_output_t **chosen_outputs);
 
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 71ccf00a..9d04d888 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -59,6 +59,7 @@ TESTS_progs = \
 	kms_plane_lowres \
 	kms_plane_multiple \
 	kms_plane_scaling \
+	kms_plane_stress \
 	kms_prop_blob \
 	kms_properties \
 	kms_psr \
diff --git a/tests/kms_plane_stress.c b/tests/kms_plane_stress.c
new file mode 100644
index 00000000..8a244dc7
--- /dev/null
+++ b/tests/kms_plane_stress.c
@@ -0,0 +1,546 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_rand.h"
+#include "drmtest.h"
+#include "sw_sync.h"
+#include <errno.h>
+#include <pthread.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <time.h>
+#include <poll.h>
+#include <pthread.h>
+
+#ifndef DRM_CAP_CURSOR_WIDTH
+#define DRM_CAP_CURSOR_WIDTH 0x8
+#endif
+#ifndef DRM_CAP_CURSOR_HEIGHT
+#define DRM_CAP_CURSOR_HEIGHT 0x9
+#endif
+
+
+drmModeModeInfo uhd_mode_60hz = {
+	.name = "3840x2160@60hz",
+	.vrefresh = 60,
+	.clock = 142667*2,
+	.hdisplay = 3840,
+	.hsync_start = 1936*2,
+	.hsync_end = 1952*2,
+	.htotal = 2104*2,
+	.vdisplay = 2160,
+	.vsync_start = 1083*2,
+	.vsync_end = 1097*2,
+	.vtotal = 1128*2,
+	.flags = 0xa,
+};
+
+#define N_FORMATS 3
+static const uint32_t formats[N_FORMATS] = {
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB2101010,
+};
+
+#define N_TILING_METHODS 3
+static const uint64_t tilings[N_TILING_METHODS] = {
+	DRM_FORMAT_MOD_LINEAR,
+	I915_FORMAT_MOD_X_TILED,
+	I915_FORMAT_MOD_Y_TILED,
+};
+
+static const char *format_str(int format_index)
+{
+	switch (formats[format_index]) {
+	case DRM_FORMAT_RGB565:
+		return "rgb565";
+	case DRM_FORMAT_XRGB8888:
+		return "xrgb8888";
+	case DRM_FORMAT_XRGB2101010:
+		return "xrgb2101010";
+	default:
+		igt_assert(false);
+	}
+}
+
+static const char *tiling_str(int tiling_index)
+{
+	switch (tilings[tiling_index]) {
+	case DRM_FORMAT_MOD_LINEAR:
+		return "untiled";
+	case I915_FORMAT_MOD_X_TILED:
+		return "xtiled";
+	case I915_FORMAT_MOD_Y_TILED:
+		return "ytiled";
+	default:
+		igt_assert(false);
+	}
+}
+
+
+#define MAX_CORES 8
+
+struct data;
+
+struct thread_context {
+	struct data *data;
+	int id;
+	void *buf1;
+	void *buf2;
+};
+
+struct gpu_context {
+	struct data *data;
+	int pipe;
+	int color;
+};
+
+struct data {
+	int drm_fd;
+	igt_display_t display;
+	int num_planes;
+	uint32_t format;
+	uint64_t modifier;
+	uint32_t devid;
+	drm_intel_bufmgr *bufmgr;
+	struct igt_fb fb[IGT_MAX_PIPES];
+	struct igt_fb cursor_fb[IGT_MAX_PIPES];
+	pthread_t cpu_thread[MAX_CORES];
+	bool cpu_thread_stop[MAX_CORES];
+	struct thread_context cpu_context[MAX_CORES];
+	struct gpu_context gpu_context[IGT_MAX_PIPES];
+};
+
+
+struct base_crc {
+	bool set;
+	igt_crc_t crc;
+};
+
+igt_pipe_crc_t *pipe_crc;
+
+#define BUF_SIZE 128*1024*1024
+
+static void *cpu_load(void *d)
+{
+	char *buf1, *buf2;
+	struct thread_context *context = (struct thread_context *)d;
+	struct data *data = context->data;
+
+	buf1 = context->buf1;
+	buf2 = context->buf2;
+
+	data->cpu_thread_stop[context->id] = false;
+
+	while(!data->cpu_thread_stop[context->id]) {
+		memcpy(buf1, buf2, BUF_SIZE);
+		memcpy(buf2, buf1, BUF_SIZE);
+	}
+
+	return NULL;
+}
+
+
+static void scratch_buf_init(struct igt_buf *buf,
+			drm_intel_bo *bo, int width, int height, int stride, int tiling)
+{
+	buf->bo = bo;
+	buf->stride = stride;
+	buf->tiling = tiling;
+	buf->size = width * height * 4;
+	buf->bpp = 32;
+}
+
+
+static void gpu_load(struct gpu_context *gpu_context)
+{
+	struct intel_batchbuffer *batch = NULL;
+	struct igt_buf dst;
+	struct data *data = gpu_context->data;
+	int pipe = gpu_context->pipe;
+	igt_fillfunc_t gpgpu_fill = NULL;
+	drm_intel_bo *bo;
+	struct igt_fb *fb = &data->fb[pipe];
+
+	if (!data->devid) {
+		data->devid = intel_get_drm_devid(data->drm_fd);
+		igt_require_gem(data->drm_fd);
+
+		data->bufmgr = drm_intel_bufmgr_gem_init(data->drm_fd, 4096);
+		igt_assert(data->bufmgr);
+	}
+
+	gpgpu_fill = igt_get_gpgpu_fillfunc(data->devid);
+
+	igt_require_f(gpgpu_fill,
+	      "no gpgpu-fill function\n");
+
+	batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
+	igt_assert(batch);
+
+	bo = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", fb->gem_handle);
+
+	scratch_buf_init(&dst, bo, fb->width, fb->height, fb->strides[0], fb->tiling);
+
+	gpgpu_fill(batch,
+	   &dst, 0, 0, (fb->width * 4), fb->height,
+	   gpu_context->color);
+
+	gpu_context->color += 0x10;
+
+	intel_batchbuffer_free(batch);
+}
+
+static inline uint32_t pipe_select(enum pipe pipe)
+{
+	if (pipe > 1)
+		return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT;
+	else if (pipe > 0)
+		return DRM_VBLANK_SECONDARY;
+	else
+		return 0;
+}
+
+static unsigned get_vblank(int fd, enum pipe pipe, unsigned flags)
+{
+	union drm_wait_vblank vbl;
+
+	memset(&vbl, 0, sizeof(vbl));
+	vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(pipe) | flags;
+	if (drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl))
+		return 0;
+
+	return vbl.reply.sequence;
+}
+
+
+static int plane_stress(struct data *data, igt_output_t *output, enum pipe pipe, drmModeModeInfo *mode, bool gpu)
+{
+	igt_plane_t *plane;
+	uint64_t cursor_width, cursor_height;
+	int i;
+	int ret;
+	igt_crc_t	crc, crc2;
+
+	igt_output_override_mode(output, mode);
+	ret = igt_display_try_commit_atomic(&data->display,
+			DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+	if (ret) {
+		return ret;
+	}
+
+	igt_output_set_pipe(output, pipe);
+
+	igt_display_commit2(&data->display, COMMIT_ATOMIC);
+
+	mode = igt_output_get_mode(output);
+
+	do_or_die(drmGetCap(data->drm_fd, DRM_CAP_CURSOR_WIDTH, &cursor_width));
+	do_or_die(drmGetCap(data->drm_fd, DRM_CAP_CURSOR_HEIGHT, &cursor_height));
+
+	if (!data->cursor_fb[pipe].fb_id) {
+		igt_create_color_fb(data->drm_fd, cursor_width, cursor_height,
+				DRM_FORMAT_ARGB8888,
+				LOCAL_DRM_FORMAT_MOD_NONE,
+					1.0,0.0,0.0,
+					&data->cursor_fb[pipe]);
+	}
+
+	if (!data->fb[pipe].fb_id) {
+		igt_create_color_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+				    data->format,
+				    data->modifier,
+				    0.0, 1.0, 0.0, &data->fb[pipe]);
+	}
+
+	ret = igt_display_try_commit_atomic(&data->display, DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+	if (ret) {
+		igt_info("Plane %d pipe %d try commit failed, exiting\n", i, pipe);
+		goto cleanup;
+	}
+
+	igt_display_commit2(&data->display, COMMIT_ATOMIC);
+
+	i = 0;
+
+	for_each_plane_on_pipe(&data->display, pipe, plane) {
+
+		if (plane->type == DRM_PLANE_TYPE_CURSOR) {
+			igt_plane_set_fb(plane, &data->cursor_fb[pipe]);
+			igt_fb_set_size(&data->cursor_fb[pipe], plane, cursor_width, cursor_height);
+			igt_plane_set_size(plane, cursor_width, cursor_height);
+		} else {
+			igt_plane_set_fb(plane, &data->fb[pipe]);
+			igt_plane_set_position(plane, 0, 0);
+			igt_fb_set_size(&data->fb[pipe], plane, mode->hdisplay, mode->vdisplay);
+			igt_plane_set_size(plane, mode->hdisplay, mode->vdisplay);
+		}
+
+		ret = igt_display_try_commit_atomic(&data->display, DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+		if (ret) {
+			igt_info("Plane %d pipe %d try commit failed, exiting\n", i, pipe);
+			goto cleanup;
+		}
+
+		if (++i >= data->num_planes)
+			break;
+	}
+
+	if (gpu) {
+		gpu_load(&data->gpu_context[pipe]);
+	}
+
+	igt_display_commit2(&data->display, COMMIT_ATOMIC);
+
+	get_vblank(data->display.drm_fd, pipe, DRM_VBLANK_NEXTONMISS);
+
+	igt_pipe_crc_collect_crc(pipe_crc, &crc);
+
+	get_vblank(data->display.drm_fd, pipe, DRM_VBLANK_NEXTONMISS);
+
+	igt_pipe_crc_collect_crc(pipe_crc, &crc2);
+	igt_assert_crc_equal(&crc, &crc2);
+
+	return 0;
+
+cleanup:
+	for_each_plane_on_pipe(&data->display, pipe, plane) {
+		igt_plane_set_fb(plane, NULL);
+	}
+	igt_remove_fb(data->display.drm_fd, &data->fb[pipe]);
+	data->fb[pipe].fb_id = 0;
+
+	return ret;
+}
+
+#define DURATION_SEC 5.00
+
+static drmModeModeInfo * find_highest_mode(drmModeConnector *connector)
+{
+	drmModeModeInfo *highest_mode = NULL;
+	int j;
+
+	for (j = 0; j < connector->count_modes; j++) {
+		if (!highest_mode) {
+			highest_mode = &connector->modes[j];
+		}
+		else if (connector->modes[j].vdisplay && connector->modes[j].hdisplay) {
+			if (highest_mode->hdisplay < connector->modes[j].hdisplay)
+				highest_mode = &connector->modes[j];
+			}
+	}
+
+	return highest_mode;
+}
+
+static void stress(struct data *data, bool override, bool gpu, int format_idx, int tiling_idx)
+{
+	struct timespec start, end;
+	igt_output_t *output;
+	int ret;int crtc_id = 0;
+	int i;
+	drmModeModeInfo *highest_mode = NULL;
+
+	drmModeRes *mode_resources = drmModeGetResources(data->drm_fd);
+
+	if (!mode_resources) {
+		igt_warn("drmModeGetResources failed: %s\n", strerror(errno));
+		return;
+	}
+
+	clock_gettime(CLOCK_MONOTONIC, &start);
+
+	do {
+		for_each_pipe_with_new_output(&data->display, pipe, output) {
+			crtc_id = 0;
+			for (i = 0; i < mode_resources->count_connectors; i++) {
+				drmModeConnector *connector;
+
+				connector = drmModeGetConnectorCurrent(data->drm_fd,
+							       mode_resources->connectors[i]);
+				if (!connector) {
+					igt_warn("could not get connector %i: %s\n", mode_resources->connectors[i], strerror(errno));
+					continue;
+				}
+
+				if (!connector->count_modes) {
+					drmModeFreeConnector(connector);
+					continue;
+				}
+
+				if (connector->connection == DRM_MODE_CONNECTED) {
+					if (crtc_id == pipe) {
+						if (!override) {
+							highest_mode = find_highest_mode(connector);
+						}
+						else
+							highest_mode = &uhd_mode_60hz;
+
+						data->format = formats[format_idx];
+						data->modifier = tilings[tiling_idx];
+						data->num_planes = data->display.pipes[pipe].n_planes;
+
+						igt_info("Pipe %s %d planes, using mode:", kmstest_pipe_name(pipe),
+								data->num_planes);
+
+						kmstest_dump_mode(highest_mode);
+
+						pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe,
+							INTEL_PIPE_CRC_SOURCE_AUTO);
+
+						ret = plane_stress(data, output, pipe, highest_mode, gpu);
+
+						igt_pipe_crc_free(pipe_crc);
+					}
+					crtc_id++;
+				}
+				drmModeFreeConnector(connector);
+			}
+			pipe++;
+		}
+		clock_gettime(CLOCK_MONOTONIC, &end);
+	} while ((igt_time_elapsed(&start, &end) < DURATION_SEC) && !ret);
+
+	drmModeFreeResources(mode_resources);
+}
+
+static void test(struct data *data, bool override, bool cpu, bool gpu)
+{
+	int i;
+	int number_of_cores = min(sysconf(_SC_NPROCESSORS_ONLN), MAX_CORES);
+	int format_idx, tiling_idx;
+
+	igt_fixture {
+		for (i = 0; i < IGT_MAX_PIPES; i++) {
+				data->fb[i].fb_id = 0;
+				data->cursor_fb[i].fb_id = 0;
+		}
+		if (gpu) {
+			for (i = 0; i < IGT_MAX_PIPES; i++) {
+				data->gpu_context[i].data = data;
+				data->gpu_context[i].pipe = i;
+			}
+		}
+
+		if (cpu) {
+			for (i = 0; i < number_of_cores;i++) {
+				data->cpu_context[i].buf1 = malloc(BUF_SIZE);
+				data->cpu_context[i].buf2 = malloc(BUF_SIZE);
+				data->cpu_context[i].id = i;
+				data->cpu_context[i].data = data;
+				pthread_create(&data->cpu_thread[i], NULL, cpu_load, (void*)&data->cpu_context[i]);
+			}
+		}
+	}
+
+	for (format_idx = 0; format_idx < N_FORMATS; format_idx++) {
+		for (tiling_idx = 0; tiling_idx < N_TILING_METHODS; tiling_idx++) {
+
+			igt_subtest_f("stress%s%s%s-%s-%s",
+				      override == false ? "" : "-mode-override",
+				      cpu == false ? "" : "-cpu-load",
+				      gpu == false ? "" : "-gpu-load",
+				      format_str(format_idx),
+				      tiling_str(tiling_idx))
+
+			stress(data, override, gpu, format_idx, tiling_idx);
+
+			/*
+			 * As we change tiling/format we need a new FB
+			 */
+			for (i = 0; i < IGT_MAX_PIPES; i++) {
+				if (data->fb[i].fb_id) {
+					igt_remove_fb(data->display.drm_fd, &data->fb[i]);
+					data->fb[i].fb_id = 0;
+				}
+				if (data->cursor_fb[i].fb_id) {
+					igt_remove_fb(data->display.drm_fd, &data->cursor_fb[i]);
+					data->cursor_fb[i].fb_id = 0;
+				}
+			}
+		}
+	}
+
+	igt_fixture {
+		if (cpu) {
+			for (i = 0; i < number_of_cores;i++) {
+				data->cpu_thread_stop[i] = true;
+				pthread_join(data->cpu_thread[i], NULL);
+			}
+			for (i = 0;i < number_of_cores; i++) {
+				free(data->cpu_context[i].buf1);
+				free(data->cpu_context[i].buf2);
+			}
+		}
+	}
+}
+
+
+struct data data = {
+	.num_planes = 7,
+	.format = DRM_FORMAT_XRGB8888,
+	.modifier = DRM_FORMAT_MOD_LINEAR,
+	.devid = 0,
+};
+
+
+igt_main
+{
+	bool mode_override = false;
+	bool cpu_load = false;
+	bool gpu_load = false;
+
+	igt_fixture {
+		data.drm_fd = data.display.drm_fd = drm_open_driver_master(DRIVER_ANY);
+
+		kmstest_set_vt_graphics_mode();
+
+		igt_display_require(&data.display, data.display.drm_fd);
+		igt_require(data.display.is_atomic);
+		igt_display_require_output(&data.display);
+	}
+
+	test(&data, mode_override, cpu_load, gpu_load);
+
+	cpu_load = true;
+	gpu_load = true;
+
+	test(&data, mode_override, cpu_load, gpu_load);
+
+	mode_override = true;
+	cpu_load = false;
+	gpu_load = false;
+
+	test(&data, mode_override, cpu_load, gpu_load);
+
+	cpu_load = true;
+	gpu_load = true;
+
+	test(&data, mode_override, cpu_load, gpu_load);
+
+	igt_fixture {
+		igt_display_fini(&data.display);
+	}
+}
\ No newline at end of file
diff --git a/tests/meson.build b/tests/meson.build
index 9015f809..c586642c 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -46,6 +46,7 @@ test_progs = [
 	'kms_plane_lowres',
 	'kms_plane_multiple',
 	'kms_plane_scaling',
+	'kms_plane_stress',
 	'kms_prop_blob',
 	'kms_properties',
 	'kms_psr',
-- 
2.17.1

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[igt-dev] ✗ Fi.CI.BAT: failure for igt/tests: kms_plane_stress: Add plane stress test (rev4)

[Patchwork]

== Series Details ==

Series: igt/tests: kms_plane_stress: Add plane stress test (rev4)
URL   : https://patchwork.freedesktop.org/series/58524/
State : failure

== Summary ==

IGT patchset build failed on latest successful build
3d325bb211d8cd84c6862c9945185a937395cb44 i915: Mark up some forgotten set-domain

[138/732] Linking target tests/core_setmaster_vs_auth.
[139/732] Linking target tests/core_getversion.
[140/732] Linking target tests/drm_import_export.
[141/732] Linking target tests/drm_mm.
[142/732] Linking target tests/drm_read.
[143/732] Linking target tests/kms_3d.
[144/732] Linking target tests/kms_atomic.
[145/732] Linking target tests/kms_addfb_basic.
[146/732] Linking target tests/kms_atomic_interruptible.
[147/732] Linking target tests/kms_ccs.
[148/732] Linking target tests/kms_atomic_transition.
[149/732] Linking target tests/kms_available_modes_crc.
[150/732] Linking target tests/gem_hang.
[151/732] Linking target tests/gem_ctx_isolation.
[152/732] Linking target tests/kms_busy.
[153/732] Linking target tests/kms_concurrent.
[154/732] Linking target tests/kms_chv_cursor_fail.
[155/732] Linking target tests/kms_color.
[156/732] Linking target tests/kms_content_protection.
[157/732] Linking target tests/kms_cursor_legacy.
[158/732] Linking target tests/kms_crtc_background_color.
[159/732] Linking target tests/kms_cursor_crc.
[160/732] Linking target tests/kms_dp_dsc.
[161/732] Linking target tests/kms_draw_crc.
[162/732] Linking target tests/kms_flip_tiling.
[163/732] Linking target tests/kms_fence_pin_leak.
[164/732] Linking target tests/kms_flip.
[165/732] Linking target tests/kms_flip_event_leak.
[166/732] Linking target tests/kms_force_connector_basic.
[167/732] Linking target tests/kms_getfb.
[168/732] Linking target tests/kms_frontbuffer_tracking.
[169/732] Linking target tests/kms_mmap_write_crc.
[170/732] Linking target tests/kms_hdmi_inject.
[171/732] Linking target tests/kms_invalid_dotclock.
[172/732] Linking target tests/kms_lease.
[173/732] Linking target tests/kms_legacy_colorkey.
[174/732] Linking target tests/kms_pipe_crc_basic.
[175/732] Linking target tests/kms_panel_fitting.
[176/732] Linking target tests/kms_pipe_b_c_ivb.
[177/732] Linking target tests/kms_plane.
[178/732] Linking target tests/kms_plane_lowres.
[179/732] Linking target tests/kms_plane_alpha_blend.
[180/732] Compiling C object 'tests/tests@@kms_plane_stress@exe/kms_plane_stress.c.o'.
FAILED: tests/tests@@kms_plane_stress@exe/kms_plane_stress.c.o 
ccache cc -Itests/tests@@kms_plane_stress@exe -Itests -I../tests -I../include/drm-uapi -Ilib -I../lib -I../lib/stubs/syscalls -I. -I../ -I/usr/include/cairo -I/usr/include/glib-2.0 -I/usr/lib/x86_64-linux-gnu/glib-2.0/include -I/usr/include/pixman-1 -I/usr/include/libpng16 -I/usr/include/freetype2 -I/usr/include/libpng12 -I/opt/igt/include -I/opt/igt/include/libdrm -I/usr/include/x86_64-linux-gnu -I/usr/include -I/usr/include/libdrm -I/usr/include/libdrm/nouveau -I/home/cidrm/kernel_headers/include -fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wextra -std=gnu11 -O0 -g -D_GNU_SOURCE -include config.h -Wbad-function-cast -Wdeclaration-after-statement -Wformat=2 -Wimplicit-fallthrough=0 -Wlogical-op -Wmissing-declarations -Wmissing-format-attribute -Wmissing-noreturn -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wredundant-decls -Wshadow -Wstrict-prototypes -Wuninitialized -Wunused -Wno-clobbered -Wno-maybe-uninitialized -Wno-missing-field-initializers -Wno-pointer-arith -Wno-sign-compare -Wno-type-limits -Wno-unused-parameter -Wno-unused-result -Werror=address -Werror=array-bounds -Werror=implicit -Werror=init-self -Werror=int-to-pointer-cast -Werror=main -Werror=missing-braces -Werror=nonnull -Werror=pointer-to-int-cast -Werror=return-type -Werror=sequence-point -Werror=trigraphs -Werror=write-strings -pthread  -MD -MQ 'tests/tests@@kms_plane_stress@exe/kms_plane_stress.c.o' -MF 'tests/tests@@kms_plane_stress@exe/kms_plane_stress.c.o.d' -o 'tests/tests@@kms_plane_stress@exe/kms_plane_stress.c.o' -c ../tests/kms_plane_stress.c
../tests/kms_plane_stress.c: In function ‘gpu_load’:
../tests/kms_plane_stress.c:205:70: error: ‘struct igt_fb’ has no member named ‘tiling’
  scratch_buf_init(&dst, bo, fb->width, fb->height, fb->strides[0], fb->tiling);
                                                                      ^~
ninja: build stopped: subcommand failed.

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Re: [igt-dev] [PATCH i-g-t v4] igt/tests: kms_plane_stress: Add plane stress test

[Petri Latvala]

On Mon, Mar 25, 2019 at 05:54:40PM +0200, Stanislav Lisovskiy wrote:
> This test attempts to utilize all connected
> outputs at the same time, using maximum possible
> resolution and amount of planes, to check whether
> we are hiting any kind of bandwidth, watermark or
> other limitations.
> 
> v2: Added cpu and gpu load threads, which consume
>     additional bandwidth.
> 
> v3: Removed binary picture file, using pattern fb
>     instead.
> 
> v4: Moved FB creation/removal to better place.
> 
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  lib/igt_kms.h            |   7 +
>  tests/Makefile.sources   |   1 +
>  tests/kms_plane_stress.c | 546 +++++++++++++++++++++++++++++++++++++++
>  tests/meson.build        |   1 +
>  4 files changed, 555 insertions(+)
>  create mode 100644 tests/kms_plane_stress.c
> 
> diff --git a/lib/igt_kms.h b/lib/igt_kms.h
> index 407f3d64..0e6784ca 100644
> --- a/lib/igt_kms.h
> +++ b/lib/igt_kms.h
> @@ -519,6 +519,13 @@ static inline bool igt_output_is_connected(igt_output_t *output)
>  		for_each_if ((((output) = &(display)->outputs[con__]), \
>  			     igt_pipe_connector_valid((pipe), (output))))
>  
> +#define for_each_pipe_with_new_output(display, pipe, output) \
> +			for (int con = 0, (pipe) = 0; con < (display)->n_outputs; con++) \
> +				for_each_if((output) = &(display)->outputs[con]) \
> +					for_each_if((pipe) < IGT_MAX_PIPES) \
> +						for_each_if(igt_pipe_connector_valid((pipe), (output)))


Docs for this. And a very good explanation what is different from
for_each_pipe_with_valid_output().


> +
> +
>  igt_output_t **__igt_pipe_populate_outputs(igt_display_t *display,
>  					   igt_output_t **chosen_outputs);
>  
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 71ccf00a..9d04d888 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -59,6 +59,7 @@ TESTS_progs = \
>  	kms_plane_lowres \
>  	kms_plane_multiple \
>  	kms_plane_scaling \
> +	kms_plane_stress \
>  	kms_prop_blob \
>  	kms_properties \
>  	kms_psr \
> diff --git a/tests/kms_plane_stress.c b/tests/kms_plane_stress.c
> new file mode 100644
> index 00000000..8a244dc7
> --- /dev/null
> +++ b/tests/kms_plane_stress.c
> @@ -0,0 +1,546 @@
> +/*
> + * Copyright © 2016 Intel Corporation

2016?


> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_rand.h"
> +#include "drmtest.h"
> +#include "sw_sync.h"
> +#include <errno.h>
> +#include <pthread.h>
> +#include <stdbool.h>
> +#include <stdio.h>
> +#include <string.h>
> +#include <time.h>
> +#include <poll.h>
> +#include <pthread.h>
> +
> +#ifndef DRM_CAP_CURSOR_WIDTH
> +#define DRM_CAP_CURSOR_WIDTH 0x8
> +#endif
> +#ifndef DRM_CAP_CURSOR_HEIGHT
> +#define DRM_CAP_CURSOR_HEIGHT 0x9
> +#endif
> +
> +
> +drmModeModeInfo uhd_mode_60hz = {
> +	.name = "3840x2160@60hz",
> +	.vrefresh = 60,
> +	.clock = 142667*2,
> +	.hdisplay = 3840,
> +	.hsync_start = 1936*2,
> +	.hsync_end = 1952*2,
> +	.htotal = 2104*2,
> +	.vdisplay = 2160,
> +	.vsync_start = 1083*2,
> +	.vsync_end = 1097*2,
> +	.vtotal = 1128*2,
> +	.flags = 0xa,
> +};
> +
> +#define N_FORMATS 3
> +static const uint32_t formats[N_FORMATS] = {
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB2101010,
> +};
> +
> +#define N_TILING_METHODS 3
> +static const uint64_t tilings[N_TILING_METHODS] = {
> +	DRM_FORMAT_MOD_LINEAR,
> +	I915_FORMAT_MOD_X_TILED,
> +	I915_FORMAT_MOD_Y_TILED,
> +};
> +
> +static const char *format_str(int format_index)
> +{
> +	switch (formats[format_index]) {
> +	case DRM_FORMAT_RGB565:
> +		return "rgb565";
> +	case DRM_FORMAT_XRGB8888:
> +		return "xrgb8888";
> +	case DRM_FORMAT_XRGB2101010:
> +		return "xrgb2101010";
> +	default:
> +		igt_assert(false);
> +	}
> +}
> +
> +static const char *tiling_str(int tiling_index)
> +{
> +	switch (tilings[tiling_index]) {
> +	case DRM_FORMAT_MOD_LINEAR:
> +		return "untiled";
> +	case I915_FORMAT_MOD_X_TILED:
> +		return "xtiled";
> +	case I915_FORMAT_MOD_Y_TILED:
> +		return "ytiled";
> +	default:
> +		igt_assert(false);
> +	}
> +}
> +
> +
> +#define MAX_CORES 8
> +
> +struct data;
> +
> +struct thread_context {
> +	struct data *data;
> +	int id;
> +	void *buf1;
> +	void *buf2;
> +};
> +
> +struct gpu_context {
> +	struct data *data;
> +	int pipe;
> +	int color;
> +};
> +
> +struct data {
> +	int drm_fd;
> +	igt_display_t display;
> +	int num_planes;
> +	uint32_t format;
> +	uint64_t modifier;
> +	uint32_t devid;
> +	drm_intel_bufmgr *bufmgr;
> +	struct igt_fb fb[IGT_MAX_PIPES];
> +	struct igt_fb cursor_fb[IGT_MAX_PIPES];
> +	pthread_t cpu_thread[MAX_CORES];
> +	bool cpu_thread_stop[MAX_CORES];
> +	struct thread_context cpu_context[MAX_CORES];
> +	struct gpu_context gpu_context[IGT_MAX_PIPES];
> +};
> +
> +
> +struct base_crc {
> +	bool set;
> +	igt_crc_t crc;
> +};
> +
> +igt_pipe_crc_t *pipe_crc;
> +
> +#define BUF_SIZE 128*1024*1024
> +
> +static void *cpu_load(void *d)
> +{
> +	char *buf1, *buf2;
> +	struct thread_context *context = (struct thread_context *)d;
> +	struct data *data = context->data;
> +
> +	buf1 = context->buf1;
> +	buf2 = context->buf2;
> +
> +	data->cpu_thread_stop[context->id] = false;
> +
> +	while(!data->cpu_thread_stop[context->id]) {
> +		memcpy(buf1, buf2, BUF_SIZE);
> +		memcpy(buf2, buf1, BUF_SIZE);
> +	}
> +
> +	return NULL;
> +}
> +
> +
> +static void scratch_buf_init(struct igt_buf *buf,
> +			drm_intel_bo *bo, int width, int height, int stride, int tiling)
> +{
> +	buf->bo = bo;
> +	buf->stride = stride;
> +	buf->tiling = tiling;
> +	buf->size = width * height * 4;
> +	buf->bpp = 32;
> +}
> +
> +
> +static void gpu_load(struct gpu_context *gpu_context)
> +{
> +	struct intel_batchbuffer *batch = NULL;
> +	struct igt_buf dst;
> +	struct data *data = gpu_context->data;
> +	int pipe = gpu_context->pipe;
> +	igt_fillfunc_t gpgpu_fill = NULL;
> +	drm_intel_bo *bo;
> +	struct igt_fb *fb = &data->fb[pipe];
> +
> +	if (!data->devid) {
> +		data->devid = intel_get_drm_devid(data->drm_fd);
> +		igt_require_gem(data->drm_fd);
> +
> +		data->bufmgr = drm_intel_bufmgr_gem_init(data->drm_fd, 4096);
> +		igt_assert(data->bufmgr);
> +	}
> +
> +	gpgpu_fill = igt_get_gpgpu_fillfunc(data->devid);
> +
> +	igt_require_f(gpgpu_fill,
> +	      "no gpgpu-fill function\n");
> +
> +	batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
> +	igt_assert(batch);
> +
> +	bo = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", fb->gem_handle);
> +
> +	scratch_buf_init(&dst, bo, fb->width, fb->height, fb->strides[0], fb->tiling);
> +
> +	gpgpu_fill(batch,
> +	   &dst, 0, 0, (fb->width * 4), fb->height,
> +	   gpu_context->color);
> +
> +	gpu_context->color += 0x10;
> +
> +	intel_batchbuffer_free(batch);
> +}
> +
> +static inline uint32_t pipe_select(enum pipe pipe)
> +{
> +	if (pipe > 1)
> +		return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT;
> +	else if (pipe > 0)
> +		return DRM_VBLANK_SECONDARY;
> +	else
> +		return 0;
> +}
> +
> +static unsigned get_vblank(int fd, enum pipe pipe, unsigned flags)
> +{
> +	union drm_wait_vblank vbl;
> +
> +	memset(&vbl, 0, sizeof(vbl));
> +	vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(pipe) | flags;
> +	if (drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl))
> +		return 0;
> +
> +	return vbl.reply.sequence;
> +}
> +
> +
> +static int plane_stress(struct data *data, igt_output_t *output, enum pipe pipe, drmModeModeInfo *mode, bool gpu)
> +{
> +	igt_plane_t *plane;
> +	uint64_t cursor_width, cursor_height;
> +	int i;
> +	int ret;
> +	igt_crc_t	crc, crc2;
> +
> +	igt_output_override_mode(output, mode);
> +	ret = igt_display_try_commit_atomic(&data->display,
> +			DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> +	if (ret) {
> +		return ret;
> +	}
> +
> +	igt_output_set_pipe(output, pipe);
> +
> +	igt_display_commit2(&data->display, COMMIT_ATOMIC);
> +
> +	mode = igt_output_get_mode(output);
> +
> +	do_or_die(drmGetCap(data->drm_fd, DRM_CAP_CURSOR_WIDTH, &cursor_width));
> +	do_or_die(drmGetCap(data->drm_fd, DRM_CAP_CURSOR_HEIGHT, &cursor_height));
> +
> +	if (!data->cursor_fb[pipe].fb_id) {
> +		igt_create_color_fb(data->drm_fd, cursor_width, cursor_height,
> +				DRM_FORMAT_ARGB8888,
> +				LOCAL_DRM_FORMAT_MOD_NONE,
> +					1.0,0.0,0.0,
> +					&data->cursor_fb[pipe]);
> +	}
> +
> +	if (!data->fb[pipe].fb_id) {
> +		igt_create_color_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
> +				    data->format,
> +				    data->modifier,
> +				    0.0, 1.0, 0.0, &data->fb[pipe]);
> +	}
> +
> +	ret = igt_display_try_commit_atomic(&data->display, DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> +	if (ret) {
> +		igt_info("Plane %d pipe %d try commit failed, exiting\n", i, pipe);
> +		goto cleanup;
> +	}
> +
> +	igt_display_commit2(&data->display, COMMIT_ATOMIC);
> +
> +	i = 0;
> +
> +	for_each_plane_on_pipe(&data->display, pipe, plane) {
> +
> +		if (plane->type == DRM_PLANE_TYPE_CURSOR) {
> +			igt_plane_set_fb(plane, &data->cursor_fb[pipe]);
> +			igt_fb_set_size(&data->cursor_fb[pipe], plane, cursor_width, cursor_height);
> +			igt_plane_set_size(plane, cursor_width, cursor_height);
> +		} else {
> +			igt_plane_set_fb(plane, &data->fb[pipe]);
> +			igt_plane_set_position(plane, 0, 0);
> +			igt_fb_set_size(&data->fb[pipe], plane, mode->hdisplay, mode->vdisplay);
> +			igt_plane_set_size(plane, mode->hdisplay, mode->vdisplay);
> +		}
> +
> +		ret = igt_display_try_commit_atomic(&data->display, DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> +		if (ret) {
> +			igt_info("Plane %d pipe %d try commit failed, exiting\n", i, pipe);
> +			goto cleanup;
> +		}
> +
> +		if (++i >= data->num_planes)
> +			break;
> +	}
> +
> +	if (gpu) {
> +		gpu_load(&data->gpu_context[pipe]);
> +	}
> +
> +	igt_display_commit2(&data->display, COMMIT_ATOMIC);
> +
> +	get_vblank(data->display.drm_fd, pipe, DRM_VBLANK_NEXTONMISS);
> +
> +	igt_pipe_crc_collect_crc(pipe_crc, &crc);
> +
> +	get_vblank(data->display.drm_fd, pipe, DRM_VBLANK_NEXTONMISS);
> +
> +	igt_pipe_crc_collect_crc(pipe_crc, &crc2);
> +	igt_assert_crc_equal(&crc, &crc2);
> +
> +	return 0;
> +
> +cleanup:
> +	for_each_plane_on_pipe(&data->display, pipe, plane) {
> +		igt_plane_set_fb(plane, NULL);
> +	}
> +	igt_remove_fb(data->display.drm_fd, &data->fb[pipe]);
> +	data->fb[pipe].fb_id = 0;
> +
> +	return ret;
> +}
> +
> +#define DURATION_SEC 5.00
> +
> +static drmModeModeInfo * find_highest_mode(drmModeConnector *connector)
> +{
> +	drmModeModeInfo *highest_mode = NULL;
> +	int j;
> +
> +	for (j = 0; j < connector->count_modes; j++) {
> +		if (!highest_mode) {
> +			highest_mode = &connector->modes[j];
> +		}
> +		else if (connector->modes[j].vdisplay && connector->modes[j].hdisplay) {
> +			if (highest_mode->hdisplay < connector->modes[j].hdisplay)
> +				highest_mode = &connector->modes[j];
> +			}
> +	}
> +
> +	return highest_mode;
> +}
> +
> +static void stress(struct data *data, bool override, bool gpu, int format_idx, int tiling_idx)
> +{
> +	struct timespec start, end;
> +	igt_output_t *output;
> +	int ret;int crtc_id = 0;
> +	int i;
> +	drmModeModeInfo *highest_mode = NULL;
> +
> +	drmModeRes *mode_resources = drmModeGetResources(data->drm_fd);
> +
> +	if (!mode_resources) {
> +		igt_warn("drmModeGetResources failed: %s\n", strerror(errno));
> +		return;
> +	}
> +
> +	clock_gettime(CLOCK_MONOTONIC, &start);
> +
> +	do {
> +		for_each_pipe_with_new_output(&data->display, pipe, output) {
> +			crtc_id = 0;
> +			for (i = 0; i < mode_resources->count_connectors; i++) {
> +				drmModeConnector *connector;
> +
> +				connector = drmModeGetConnectorCurrent(data->drm_fd,
> +							       mode_resources->connectors[i]);
> +				if (!connector) {
> +					igt_warn("could not get connector %i: %s\n", mode_resources->connectors[i], strerror(errno));
> +					continue;
> +				}
> +
> +				if (!connector->count_modes) {
> +					drmModeFreeConnector(connector);
> +					continue;
> +				}
> +
> +				if (connector->connection == DRM_MODE_CONNECTED) {
> +					if (crtc_id == pipe) {
> +						if (!override) {
> +							highest_mode = find_highest_mode(connector);
> +						}
> +						else
> +							highest_mode = &uhd_mode_60hz;
> +
> +						data->format = formats[format_idx];
> +						data->modifier = tilings[tiling_idx];
> +						data->num_planes = data->display.pipes[pipe].n_planes;
> +
> +						igt_info("Pipe %s %d planes, using mode:", kmstest_pipe_name(pipe),
> +								data->num_planes);
> +
> +						kmstest_dump_mode(highest_mode);
> +
> +						pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe,
> +							INTEL_PIPE_CRC_SOURCE_AUTO);
> +
> +						ret = plane_stress(data, output, pipe, highest_mode, gpu);
> +
> +						igt_pipe_crc_free(pipe_crc);
> +					}
> +					crtc_id++;
> +				}
> +				drmModeFreeConnector(connector);
> +			}
> +			pipe++;
> +		}
> +		clock_gettime(CLOCK_MONOTONIC, &end);
> +	} while ((igt_time_elapsed(&start, &end) < DURATION_SEC) && !ret);


Is there a reason for using clock_gettime with explicit
CLOCK_MONOTONIC instead of igt_gettime? And igt_time_elapsed instead
of igt_until_timeout?

> +
> +	drmModeFreeResources(mode_resources);
> +}
> +
> +static void test(struct data *data, bool override, bool cpu, bool gpu)
> +{
> +	int i;
> +	int number_of_cores = min(sysconf(_SC_NPROCESSORS_ONLN), MAX_CORES);
> +	int format_idx, tiling_idx;
> +
> +	igt_fixture {
> +		for (i = 0; i < IGT_MAX_PIPES; i++) {
> +				data->fb[i].fb_id = 0;
> +				data->cursor_fb[i].fb_id = 0;
> +		}
> +		if (gpu) {
> +			for (i = 0; i < IGT_MAX_PIPES; i++) {
> +				data->gpu_context[i].data = data;
> +				data->gpu_context[i].pipe = i;
> +			}
> +		}
> +
> +		if (cpu) {
> +			for (i = 0; i < number_of_cores;i++) {
> +				data->cpu_context[i].buf1 = malloc(BUF_SIZE);
> +				data->cpu_context[i].buf2 = malloc(BUF_SIZE);
> +				data->cpu_context[i].id = i;
> +				data->cpu_context[i].data = data;
> +				pthread_create(&data->cpu_thread[i], NULL, cpu_load, (void*)&data->cpu_context[i]);
> +			}
> +		}
> +	}
> +
> +	for (format_idx = 0; format_idx < N_FORMATS; format_idx++) {
> +		for (tiling_idx = 0; tiling_idx < N_TILING_METHODS; tiling_idx++) {
> +
> +			igt_subtest_f("stress%s%s%s-%s-%s",
> +				      override == false ? "" : "-mode-override",
> +				      cpu == false ? "" : "-cpu-load",
> +				      gpu == false ? "" : "-gpu-load",
> +				      format_str(format_idx),
> +				      tiling_str(tiling_idx))


Did you mean to have some braces here?


-- 
Petri Latvala



> +
> +			stress(data, override, gpu, format_idx, tiling_idx);
> +
> +			/*
> +			 * As we change tiling/format we need a new FB
> +			 */
> +			for (i = 0; i < IGT_MAX_PIPES; i++) {
> +				if (data->fb[i].fb_id) {
> +					igt_remove_fb(data->display.drm_fd, &data->fb[i]);
> +					data->fb[i].fb_id = 0;
> +				}
> +				if (data->cursor_fb[i].fb_id) {
> +					igt_remove_fb(data->display.drm_fd, &data->cursor_fb[i]);
> +					data->cursor_fb[i].fb_id = 0;
> +				}
> +			}
> +		}
> +	}
> +
> +	igt_fixture {
> +		if (cpu) {
> +			for (i = 0; i < number_of_cores;i++) {
> +				data->cpu_thread_stop[i] = true;
> +				pthread_join(data->cpu_thread[i], NULL);
> +			}
> +			for (i = 0;i < number_of_cores; i++) {
> +				free(data->cpu_context[i].buf1);
> +				free(data->cpu_context[i].buf2);
> +			}
> +		}
> +	}
> +}
> +
> +
> +struct data data = {
> +	.num_planes = 7,
> +	.format = DRM_FORMAT_XRGB8888,
> +	.modifier = DRM_FORMAT_MOD_LINEAR,
> +	.devid = 0,
> +};
> +
> +
> +igt_main
> +{
> +	bool mode_override = false;
> +	bool cpu_load = false;
> +	bool gpu_load = false;
> +
> +	igt_fixture {
> +		data.drm_fd = data.display.drm_fd = drm_open_driver_master(DRIVER_ANY);
> +
> +		kmstest_set_vt_graphics_mode();
> +
> +		igt_display_require(&data.display, data.display.drm_fd);
> +		igt_require(data.display.is_atomic);
> +		igt_display_require_output(&data.display);
> +	}
> +
> +	test(&data, mode_override, cpu_load, gpu_load);
> +
> +	cpu_load = true;
> +	gpu_load = true;
> +
> +	test(&data, mode_override, cpu_load, gpu_load);
> +
> +	mode_override = true;
> +	cpu_load = false;
> +	gpu_load = false;
> +
> +	test(&data, mode_override, cpu_load, gpu_load);
> +
> +	cpu_load = true;
> +	gpu_load = true;
> +
> +	test(&data, mode_override, cpu_load, gpu_load);
> +
> +	igt_fixture {
> +		igt_display_fini(&data.display);
> +	}
> +}
> \ No newline at end of file
> diff --git a/tests/meson.build b/tests/meson.build
> index 9015f809..c586642c 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -46,6 +46,7 @@ test_progs = [
>  	'kms_plane_lowres',
>  	'kms_plane_multiple',
>  	'kms_plane_scaling',
> +	'kms_plane_stress',
>  	'kms_prop_blob',
>  	'kms_properties',
>  	'kms_psr',
> -- 
> 2.17.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
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igt-dev@lists.freedesktop.org
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Re: [igt-dev] [PATCH i-g-t v4] igt/tests: kms_plane_stress: Add plane stress test

[Lisovskiy, Stanislav]

On Tue, 2019-03-26 at 11:11 +0200, Petri Latvala wrote:
> On Mon, Mar 25, 2019 at 05:54:40PM +0200, Stanislav Lisovskiy wrote:
> > This test attempts to utilize all connected
> > outputs at the same time, using maximum possible
> > resolution and amount of planes, to check whether
> > we are hiting any kind of bandwidth, watermark or
> > other limitations.
> > 
> > v2: Added cpu and gpu load threads, which consume
> >     additional bandwidth.
> > 
> > v3: Removed binary picture file, using pattern fb
> >     instead.
> > 
> > v4: Moved FB creation/removal to better place.
> > 
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > ---
> >  lib/igt_kms.h            |   7 +
> >  tests/Makefile.sources   |   1 +
> >  tests/kms_plane_stress.c | 546
> > +++++++++++++++++++++++++++++++++++++++
> >  tests/meson.build        |   1 +
> >  4 files changed, 555 insertions(+)
> >  create mode 100644 tests/kms_plane_stress.c
> > 
> > diff --git a/lib/igt_kms.h b/lib/igt_kms.h
> > index 407f3d64..0e6784ca 100644
> > --- a/lib/igt_kms.h
> > +++ b/lib/igt_kms.h
> > @@ -519,6 +519,13 @@ static inline bool
> > igt_output_is_connected(igt_output_t *output)
> >  		for_each_if ((((output) = &(display)->outputs[con__]),
> > \
> >  			     igt_pipe_connector_valid((pipe),
> > (output))))
> >  
> > +#define for_each_pipe_with_new_output(display, pipe, output) \
> > +			for (int con = 0, (pipe) = 0; con < (display)-
> > >n_outputs; con++) \
> > +				for_each_if((output) = &(display)-
> > >outputs[con]) \
> > +					for_each_if((pipe) <
> > IGT_MAX_PIPES) \
> > +						for_each_if(igt_pipe_co
> > nnector_valid((pipe), (output)))
> 
> 
> Docs for this. And a very good explanation what is different from
> for_each_pipe_with_valid_output().

Sure, will add those. The reasoning is that
for_each_pipe_with_valid_output will try to test every possible
combination of pipe and output, while in this case it is not needed.
 
This test case is different from for example kms_atomic_transition,
because it attempts to test all the pipes connected to outputs
simultaneously, while most of current test cases do it one by one.

> 
> 
> > +
> > +
> >  igt_output_t **__igt_pipe_populate_outputs(igt_display_t *display,
> >  					   igt_output_t
> > **chosen_outputs);
> >  
> > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > index 71ccf00a..9d04d888 100644
> > --- a/tests/Makefile.sources
> > +++ b/tests/Makefile.sources
> > @@ -59,6 +59,7 @@ TESTS_progs = \
> >  	kms_plane_lowres \
> >  	kms_plane_multiple \
> >  	kms_plane_scaling \
> > +	kms_plane_stress \
> >  	kms_prop_blob \
> >  	kms_properties \
> >  	kms_psr \
> > diff --git a/tests/kms_plane_stress.c b/tests/kms_plane_stress.c
> > new file mode 100644
> > index 00000000..8a244dc7
> > --- /dev/null
> > +++ b/tests/kms_plane_stress.c
> > @@ -0,0 +1,546 @@
> > +/*
> > + * Copyright © 2016 Intel Corporation
> 
> 2016?
> 
> 
> > + *
> > + * Permission is hereby granted, free of charge, to any person
> > obtaining a
> > + * copy of this software and associated documentation files (the
> > "Software"),
> > + * to deal in the Software without restriction, including without
> > limitation
> > + * the rights to use, copy, modify, merge, publish, distribute,
> > sublicense,
> > + * and/or sell copies of the Software, and to permit persons to
> > whom the
> > + * Software is furnished to do so, subject to the following
> > conditions:
> > + *
> > + * The above copyright notice and this permission notice
> > (including the next
> > + * paragraph) shall be included in all copies or substantial
> > portions of the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> > MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
> > EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
> > DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > OTHER DEALINGS
> > + * IN THE SOFTWARE.
> > + */
> > +
> > +#include "igt.h"
> > +#include "igt_rand.h"
> > +#include "drmtest.h"
> > +#include "sw_sync.h"
> > +#include <errno.h>
> > +#include <pthread.h>
> > +#include <stdbool.h>
> > +#include <stdio.h>
> > +#include <string.h>
> > +#include <time.h>
> > +#include <poll.h>
> > +#include <pthread.h>
> > +
> > +#ifndef DRM_CAP_CURSOR_WIDTH
> > +#define DRM_CAP_CURSOR_WIDTH 0x8
> > +#endif
> > +#ifndef DRM_CAP_CURSOR_HEIGHT
> > +#define DRM_CAP_CURSOR_HEIGHT 0x9
> > +#endif
> > +
> > +
> > +drmModeModeInfo uhd_mode_60hz = {
> > +	.name = "3840x2160@60hz",
> > +	.vrefresh = 60,
> > +	.clock = 142667*2,
> > +	.hdisplay = 3840,
> > +	.hsync_start = 1936*2,
> > +	.hsync_end = 1952*2,
> > +	.htotal = 2104*2,
> > +	.vdisplay = 2160,
> > +	.vsync_start = 1083*2,
> > +	.vsync_end = 1097*2,
> > +	.vtotal = 1128*2,
> > +	.flags = 0xa,
> > +};
> > +
> > +#define N_FORMATS 3
> > +static const uint32_t formats[N_FORMATS] = {
> > +	DRM_FORMAT_XRGB8888,
> > +	DRM_FORMAT_RGB565,
> > +	DRM_FORMAT_XRGB2101010,
> > +};
> > +
> > +#define N_TILING_METHODS 3
> > +static const uint64_t tilings[N_TILING_METHODS] = {
> > +	DRM_FORMAT_MOD_LINEAR,
> > +	I915_FORMAT_MOD_X_TILED,
> > +	I915_FORMAT_MOD_Y_TILED,
> > +};
> > +
> > +static const char *format_str(int format_index)
> > +{
> > +	switch (formats[format_index]) {
> > +	case DRM_FORMAT_RGB565:
> > +		return "rgb565";
> > +	case DRM_FORMAT_XRGB8888:
> > +		return "xrgb8888";
> > +	case DRM_FORMAT_XRGB2101010:
> > +		return "xrgb2101010";
> > +	default:
> > +		igt_assert(false);
> > +	}
> > +}
> > +
> > +static const char *tiling_str(int tiling_index)
> > +{
> > +	switch (tilings[tiling_index]) {
> > +	case DRM_FORMAT_MOD_LINEAR:
> > +		return "untiled";
> > +	case I915_FORMAT_MOD_X_TILED:
> > +		return "xtiled";
> > +	case I915_FORMAT_MOD_Y_TILED:
> > +		return "ytiled";
> > +	default:
> > +		igt_assert(false);
> > +	}
> > +}
> > +
> > +
> > +#define MAX_CORES 8
> > +
> > +struct data;
> > +
> > +struct thread_context {
> > +	struct data *data;
> > +	int id;
> > +	void *buf1;
> > +	void *buf2;
> > +};
> > +
> > +struct gpu_context {
> > +	struct data *data;
> > +	int pipe;
> > +	int color;
> > +};
> > +
> > +struct data {
> > +	int drm_fd;
> > +	igt_display_t display;
> > +	int num_planes;
> > +	uint32_t format;
> > +	uint64_t modifier;
> > +	uint32_t devid;
> > +	drm_intel_bufmgr *bufmgr;
> > +	struct igt_fb fb[IGT_MAX_PIPES];
> > +	struct igt_fb cursor_fb[IGT_MAX_PIPES];
> > +	pthread_t cpu_thread[MAX_CORES];
> > +	bool cpu_thread_stop[MAX_CORES];
> > +	struct thread_context cpu_context[MAX_CORES];
> > +	struct gpu_context gpu_context[IGT_MAX_PIPES];
> > +};
> > +
> > +
> > +struct base_crc {
> > +	bool set;
> > +	igt_crc_t crc;
> > +};
> > +
> > +igt_pipe_crc_t *pipe_crc;
> > +
> > +#define BUF_SIZE 128*1024*1024
> > +
> > +static void *cpu_load(void *d)
> > +{
> > +	char *buf1, *buf2;
> > +	struct thread_context *context = (struct thread_context *)d;
> > +	struct data *data = context->data;
> > +
> > +	buf1 = context->buf1;
> > +	buf2 = context->buf2;
> > +
> > +	data->cpu_thread_stop[context->id] = false;
> > +
> > +	while(!data->cpu_thread_stop[context->id]) {
> > +		memcpy(buf1, buf2, BUF_SIZE);
> > +		memcpy(buf2, buf1, BUF_SIZE);
> > +	}
> > +
> > +	return NULL;
> > +}
> > +
> > +
> > +static void scratch_buf_init(struct igt_buf *buf,
> > +			drm_intel_bo *bo, int width, int height, int
> > stride, int tiling)
> > +{
> > +	buf->bo = bo;
> > +	buf->stride = stride;
> > +	buf->tiling = tiling;
> > +	buf->size = width * height * 4;
> > +	buf->bpp = 32;
> > +}
> > +
> > +
> > +static void gpu_load(struct gpu_context *gpu_context)
> > +{
> > +	struct intel_batchbuffer *batch = NULL;
> > +	struct igt_buf dst;
> > +	struct data *data = gpu_context->data;
> > +	int pipe = gpu_context->pipe;
> > +	igt_fillfunc_t gpgpu_fill = NULL;
> > +	drm_intel_bo *bo;
> > +	struct igt_fb *fb = &data->fb[pipe];
> > +
> > +	if (!data->devid) {
> > +		data->devid = intel_get_drm_devid(data->drm_fd);
> > +		igt_require_gem(data->drm_fd);
> > +
> > +		data->bufmgr = drm_intel_bufmgr_gem_init(data->drm_fd,
> > 4096);
> > +		igt_assert(data->bufmgr);
> > +	}
> > +
> > +	gpgpu_fill = igt_get_gpgpu_fillfunc(data->devid);
> > +
> > +	igt_require_f(gpgpu_fill,
> > +	      "no gpgpu-fill function\n");
> > +
> > +	batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
> > +	igt_assert(batch);
> > +
> > +	bo = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "",
> > fb->gem_handle);
> > +
> > +	scratch_buf_init(&dst, bo, fb->width, fb->height, fb-
> > >strides[0], fb->tiling);
> > +
> > +	gpgpu_fill(batch,
> > +	   &dst, 0, 0, (fb->width * 4), fb->height,
> > +	   gpu_context->color);
> > +
> > +	gpu_context->color += 0x10;
> > +
> > +	intel_batchbuffer_free(batch);
> > +}
> > +
> > +static inline uint32_t pipe_select(enum pipe pipe)
> > +{
> > +	if (pipe > 1)
> > +		return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT;
> > +	else if (pipe > 0)
> > +		return DRM_VBLANK_SECONDARY;
> > +	else
> > +		return 0;
> > +}
> > +
> > +static unsigned get_vblank(int fd, enum pipe pipe, unsigned flags)
> > +{
> > +	union drm_wait_vblank vbl;
> > +
> > +	memset(&vbl, 0, sizeof(vbl));
> > +	vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(pipe) |
> > flags;
> > +	if (drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl))
> > +		return 0;
> > +
> > +	return vbl.reply.sequence;
> > +}
> > +
> > +
> > +static int plane_stress(struct data *data, igt_output_t *output,
> > enum pipe pipe, drmModeModeInfo *mode, bool gpu)
> > +{
> > +	igt_plane_t *plane;
> > +	uint64_t cursor_width, cursor_height;
> > +	int i;
> > +	int ret;
> > +	igt_crc_t	crc, crc2;
> > +
> > +	igt_output_override_mode(output, mode);
> > +	ret = igt_display_try_commit_atomic(&data->display,
> > +			DRM_MODE_ATOMIC_TEST_ONLY |
> > DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> > +	if (ret) {
> > +		return ret;
> > +	}
> > +
> > +	igt_output_set_pipe(output, pipe);
> > +
> > +	igt_display_commit2(&data->display, COMMIT_ATOMIC);
> > +
> > +	mode = igt_output_get_mode(output);
> > +
> > +	do_or_die(drmGetCap(data->drm_fd, DRM_CAP_CURSOR_WIDTH,
> > &cursor_width));
> > +	do_or_die(drmGetCap(data->drm_fd, DRM_CAP_CURSOR_HEIGHT,
> > &cursor_height));
> > +
> > +	if (!data->cursor_fb[pipe].fb_id) {
> > +		igt_create_color_fb(data->drm_fd, cursor_width,
> > cursor_height,
> > +				DRM_FORMAT_ARGB8888,
> > +				LOCAL_DRM_FORMAT_MOD_NONE,
> > +					1.0,0.0,0.0,
> > +					&data->cursor_fb[pipe]);
> > +	}
> > +
> > +	if (!data->fb[pipe].fb_id) {
> > +		igt_create_color_pattern_fb(data->drm_fd, mode-
> > >hdisplay, mode->vdisplay,
> > +				    data->format,
> > +				    data->modifier,
> > +				    0.0, 1.0, 0.0, &data->fb[pipe]);
> > +	}
> > +
> > +	ret = igt_display_try_commit_atomic(&data->display,
> > DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> > +	if (ret) {
> > +		igt_info("Plane %d pipe %d try commit failed,
> > exiting\n", i, pipe);
> > +		goto cleanup;
> > +	}
> > +
> > +	igt_display_commit2(&data->display, COMMIT_ATOMIC);
> > +
> > +	i = 0;
> > +
> > +	for_each_plane_on_pipe(&data->display, pipe, plane) {
> > +
> > +		if (plane->type == DRM_PLANE_TYPE_CURSOR) {
> > +			igt_plane_set_fb(plane, &data-
> > >cursor_fb[pipe]);
> > +			igt_fb_set_size(&data->cursor_fb[pipe], plane,
> > cursor_width, cursor_height);
> > +			igt_plane_set_size(plane, cursor_width,
> > cursor_height);
> > +		} else {
> > +			igt_plane_set_fb(plane, &data->fb[pipe]);
> > +			igt_plane_set_position(plane, 0, 0);
> > +			igt_fb_set_size(&data->fb[pipe], plane, mode-
> > >hdisplay, mode->vdisplay);
> > +			igt_plane_set_size(plane, mode->hdisplay, mode-
> > >vdisplay);
> > +		}
> > +
> > +		ret = igt_display_try_commit_atomic(&data->display,
> > DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> > +		if (ret) {
> > +			igt_info("Plane %d pipe %d try commit failed,
> > exiting\n", i, pipe);
> > +			goto cleanup;
> > +		}
> > +
> > +		if (++i >= data->num_planes)
> > +			break;
> > +	}
> > +
> > +	if (gpu) {
> > +		gpu_load(&data->gpu_context[pipe]);
> > +	}
> > +
> > +	igt_display_commit2(&data->display, COMMIT_ATOMIC);
> > +
> > +	get_vblank(data->display.drm_fd, pipe, DRM_VBLANK_NEXTONMISS);
> > +
> > +	igt_pipe_crc_collect_crc(pipe_crc, &crc);
> > +
> > +	get_vblank(data->display.drm_fd, pipe, DRM_VBLANK_NEXTONMISS);
> > +
> > +	igt_pipe_crc_collect_crc(pipe_crc, &crc2);
> > +	igt_assert_crc_equal(&crc, &crc2);
> > +
> > +	return 0;
> > +
> > +cleanup:
> > +	for_each_plane_on_pipe(&data->display, pipe, plane) {
> > +		igt_plane_set_fb(plane, NULL);
> > +	}
> > +	igt_remove_fb(data->display.drm_fd, &data->fb[pipe]);
> > +	data->fb[pipe].fb_id = 0;
> > +
> > +	return ret;
> > +}
> > +
> > +#define DURATION_SEC 5.00
> > +
> > +static drmModeModeInfo * find_highest_mode(drmModeConnector
> > *connector)
> > +{
> > +	drmModeModeInfo *highest_mode = NULL;
> > +	int j;
> > +
> > +	for (j = 0; j < connector->count_modes; j++) {
> > +		if (!highest_mode) {
> > +			highest_mode = &connector->modes[j];
> > +		}
> > +		else if (connector->modes[j].vdisplay && connector-
> > >modes[j].hdisplay) {
> > +			if (highest_mode->hdisplay < connector-
> > >modes[j].hdisplay)
> > +				highest_mode = &connector->modes[j];
> > +			}
> > +	}
> > +
> > +	return highest_mode;
> > +}
> > +
> > +static void stress(struct data *data, bool override, bool gpu, int
> > format_idx, int tiling_idx)
> > +{
> > +	struct timespec start, end;
> > +	igt_output_t *output;
> > +	int ret;int crtc_id = 0;
> > +	int i;
> > +	drmModeModeInfo *highest_mode = NULL;
> > +
> > +	drmModeRes *mode_resources = drmModeGetResources(data->drm_fd);
> > +
> > +	if (!mode_resources) {
> > +		igt_warn("drmModeGetResources failed: %s\n",
> > strerror(errno));
> > +		return;
> > +	}
> > +
> > +	clock_gettime(CLOCK_MONOTONIC, &start);
> > +
> > +	do {
> > +		for_each_pipe_with_new_output(&data->display, pipe,
> > output) {
> > +			crtc_id = 0;
> > +			for (i = 0; i < mode_resources-
> > >count_connectors; i++) {
> > +				drmModeConnector *connector;
> > +
> > +				connector =
> > drmModeGetConnectorCurrent(data->drm_fd,
> > +							       mode_res
> > ources->connectors[i]);
> > +				if (!connector) {
> > +					igt_warn("could not get
> > connector %i: %s\n", mode_resources->connectors[i],
> > strerror(errno));
> > +					continue;
> > +				}
> > +
> > +				if (!connector->count_modes) {
> > +					drmModeFreeConnector(connector)
> > ;
> > +					continue;
> > +				}
> > +
> > +				if (connector->connection ==
> > DRM_MODE_CONNECTED) {
> > +					if (crtc_id == pipe) {
> > +						if (!override) {
> > +							highest_mode =
> > find_highest_mode(connector);
> > +						}
> > +						else
> > +							highest_mode =
> > &uhd_mode_60hz;
> > +
> > +						data->format =
> > formats[format_idx];
> > +						data->modifier =
> > tilings[tiling_idx];
> > +						data->num_planes =
> > data->display.pipes[pipe].n_planes;
> > +
> > +						igt_info("Pipe %s %d
> > planes, using mode:", kmstest_pipe_name(pipe),
> > +								data-
> > >num_planes);
> > +
> > +						kmstest_dump_mode(highe
> > st_mode);
> > +
> > +						pipe_crc =
> > igt_pipe_crc_new(data->drm_fd, pipe,
> > +							INTEL_PIPE_CRC_
> > SOURCE_AUTO);
> > +
> > +						ret =
> > plane_stress(data, output, pipe, highest_mode, gpu);
> > +
> > +						igt_pipe_crc_free(pipe_
> > crc);
> > +					}
> > +					crtc_id++;
> > +				}
> > +				drmModeFreeConnector(connector);
> > +			}
> > +			pipe++;
> > +		}
> > +		clock_gettime(CLOCK_MONOTONIC, &end);
> > +	} while ((igt_time_elapsed(&start, &end) < DURATION_SEC) &&
> > !ret);
> 
> 
> Is there a reason for using clock_gettime with explicit
> CLOCK_MONOTONIC instead of igt_gettime? And igt_time_elapsed instead
> of igt_until_timeout?

In fact no, I simply saw a lot of test cases doing so, like kms_vblank
and used it as a reference. Considering that igt_gettime can do the
same thing, I guess it will make things easier for me, just as
igt_until_timeout macro.
I mostly try to use existing IGT functions instead of inventing my own,
however this time probably I used wrong example here :)

> 
> > +
> > +	drmModeFreeResources(mode_resources);
> > +}
> > +
> > +static void test(struct data *data, bool override, bool cpu, bool
> > gpu)
> > +{
> > +	int i;
> > +	int number_of_cores = min(sysconf(_SC_NPROCESSORS_ONLN),
> > MAX_CORES);
> > +	int format_idx, tiling_idx;
> > +
> > +	igt_fixture {
> > +		for (i = 0; i < IGT_MAX_PIPES; i++) {
> > +				data->fb[i].fb_id = 0;
> > +				data->cursor_fb[i].fb_id = 0;
> > +		}
> > +		if (gpu) {
> > +			for (i = 0; i < IGT_MAX_PIPES; i++) {
> > +				data->gpu_context[i].data = data;
> > +				data->gpu_context[i].pipe = i;
> > +			}
> > +		}
> > +
> > +		if (cpu) {
> > +			for (i = 0; i < number_of_cores;i++) {
> > +				data->cpu_context[i].buf1 =
> > malloc(BUF_SIZE);
> > +				data->cpu_context[i].buf2 =
> > malloc(BUF_SIZE);
> > +				data->cpu_context[i].id = i;
> > +				data->cpu_context[i].data = data;
> > +				pthread_create(&data->cpu_thread[i],
> > NULL, cpu_load, (void*)&data->cpu_context[i]);
> > +			}
> > +		}
> > +	}
> > +
> > +	for (format_idx = 0; format_idx < N_FORMATS; format_idx++) {
> > +		for (tiling_idx = 0; tiling_idx < N_TILING_METHODS;
> > tiling_idx++) {
> > +
> > +			igt_subtest_f("stress%s%s%s-%s-%s",
> > +				      override == false ? "" : "-mode-
> > override",
> > +				      cpu == false ? "" : "-cpu-load",
> > +				      gpu == false ? "" : "-gpu-load",
> > +				      format_str(format_idx),
> > +				      tiling_str(tiling_idx))
> 
> 
> Did you mean to have some braces here?
> 
> 
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Re: [igt-dev] [PATCH i-g-t v4] igt/tests: kms_plane_stress: Add plane stress test

[Petri Latvala]

On Tue, Mar 26, 2019 at 02:00:46PM +0200, Lisovskiy, Stanislav wrote:
> On Tue, 2019-03-26 at 11:11 +0200, Petri Latvala wrote:
> > On Mon, Mar 25, 2019 at 05:54:40PM +0200, Stanislav Lisovskiy wrote:
> > > This test attempts to utilize all connected
> > > outputs at the same time, using maximum possible
> > > resolution and amount of planes, to check whether
> > > we are hiting any kind of bandwidth, watermark or
> > > other limitations.
> > > 
> > > v2: Added cpu and gpu load threads, which consume
> > >     additional bandwidth.
> > > 
> > > v3: Removed binary picture file, using pattern fb
> > >     instead.
> > > 
> > > v4: Moved FB creation/removal to better place.
> > > 
> > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > ---
> > >  lib/igt_kms.h            |   7 +
> > >  tests/Makefile.sources   |   1 +
> > >  tests/kms_plane_stress.c | 546
> > > +++++++++++++++++++++++++++++++++++++++
> > >  tests/meson.build        |   1 +
> > >  4 files changed, 555 insertions(+)
> > >  create mode 100644 tests/kms_plane_stress.c
> > > 
> > > diff --git a/lib/igt_kms.h b/lib/igt_kms.h
> > > index 407f3d64..0e6784ca 100644
> > > --- a/lib/igt_kms.h
> > > +++ b/lib/igt_kms.h
> > > @@ -519,6 +519,13 @@ static inline bool
> > > igt_output_is_connected(igt_output_t *output)
> > >  		for_each_if ((((output) = &(display)->outputs[con__]),
> > > \
> > >  			     igt_pipe_connector_valid((pipe),
> > > (output))))
> > >  
> > > +#define for_each_pipe_with_new_output(display, pipe, output) \
> > > +			for (int con = 0, (pipe) = 0; con < (display)-
> > > >n_outputs; con++) \
> > > +				for_each_if((output) = &(display)-
> > > >outputs[con]) \
> > > +					for_each_if((pipe) <
> > > IGT_MAX_PIPES) \
> > > +						for_each_if(igt_pipe_co
> > > nnector_valid((pipe), (output)))
> > 
> > 
> > Docs for this. And a very good explanation what is different from
> > for_each_pipe_with_valid_output().
> 
> Sure, will add those. The reasoning is that
> for_each_pipe_with_valid_output will try to test every possible
> combination of pipe and output, while in this case it is not needed.


Gah, I should have asked for comparison to
for_each_pipe_with_single_output.

Although I don't understand your loop anyway still. It doesn't update
pipe, making the "for_each_pipe" part of the name misleading.


-- 
Petri Latvala
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Re: [igt-dev] [PATCH i-g-t v4] igt/tests: kms_plane_stress: Add plane stress test

[Lisovskiy, Stanislav]

On Tue, 2019-03-26 at 14:22 +0200, Petri Latvala wrote:
> On Tue, Mar 26, 2019 at 02:00:46PM +0200, Lisovskiy, Stanislav wrote:
> > On Tue, 2019-03-26 at 11:11 +0200, Petri Latvala wrote:
> > > On Mon, Mar 25, 2019 at 05:54:40PM +0200, Stanislav Lisovskiy
> > > wrote:
> > > > This test attempts to utilize all connected
> > > > outputs at the same time, using maximum possible
> > > > resolution and amount of planes, to check whether
> > > > we are hiting any kind of bandwidth, watermark or
> > > > other limitations.
> > > > 
> > > > v2: Added cpu and gpu load threads, which consume
> > > >     additional bandwidth.
> > > > 
> > > > v3: Removed binary picture file, using pattern fb
> > > >     instead.
> > > > 
> > > > v4: Moved FB creation/removal to better place.
> > > > 
> > > > Signed-off-by: Stanislav Lisovskiy <
> > > > stanislav.lisovskiy@intel.com>
> > > > ---
> > > >  lib/igt_kms.h            |   7 +
> > > >  tests/Makefile.sources   |   1 +
> > > >  tests/kms_plane_stress.c | 546
> > > > +++++++++++++++++++++++++++++++++++++++
> > > >  tests/meson.build        |   1 +
> > > >  4 files changed, 555 insertions(+)
> > > >  create mode 100644 tests/kms_plane_stress.c
> > > > 
> > > > diff --git a/lib/igt_kms.h b/lib/igt_kms.h
> > > > index 407f3d64..0e6784ca 100644
> > > > --- a/lib/igt_kms.h
> > > > +++ b/lib/igt_kms.h
> > > > @@ -519,6 +519,13 @@ static inline bool
> > > > igt_output_is_connected(igt_output_t *output)
> > > >  		for_each_if ((((output) = &(display)-
> > > > >outputs[con__]),
> > > > \
> > > >  			     igt_pipe_connector_valid((pipe),
> > > > (output))))
> > > >  
> > > > +#define for_each_pipe_with_new_output(display, pipe, output) \
> > > > +			for (int con = 0, (pipe) = 0; con <
> > > > (display)-
> > > > > n_outputs; con++) \
> > > > 
> > > > +				for_each_if((output) =
> > > > &(display)-
> > > > > outputs[con]) \
> > > > 
> > > > +					for_each_if((pipe) <
> > > > IGT_MAX_PIPES) \
> > > > +						for_each_if(igt
> > > > _pipe_co
> > > > nnector_valid((pipe), (output)))
> > > 
> > > 
> > > Docs for this. And a very good explanation what is different from
> > > for_each_pipe_with_valid_output().
> > 
> > Sure, will add those. The reasoning is that
> > for_each_pipe_with_valid_output will try to test every possible
> > combination of pipe and output, while in this case it is not
> > needed.
> 
> 
> Gah, I should have asked for comparison to
> for_each_pipe_with_single_output.
> 
> Although I don't understand your loop anyway still. It doesn't update
> pipe, making the "for_each_pipe" part of the name misleading.

In fact, I didn't want to invent a new macro here, so I tried
for_each_pipe_with_single_output also - problem is that, when I'm using
pipes simultaneously, it tries to find a first suitable correct output 
and then we get a failure as the same output is already used on other
pipe.

Regarding pipe variable incrementing - totally true, don't like it
either, I will need to figure out something better.

> 
> 
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