* [igt-dev] [PATCH i-g-t v6 1/9] tests/i915/gem_render_copy.c: Do detiling on the CPU side
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 2/9] tests/i915/gem_madvise.c: Add more mappings Antonio Argenziano
` (9 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev
Try to step away from using gtt mapping for accessing tiled patterns by
linearizing the buffers on the CPU side.
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/i915/gem_render_copy.c | 252 ++++++++++++++++++++++++++++++++++-
1 file changed, 248 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_render_copy.c b/tests/i915/gem_render_copy.c
index b8149483..cc1529fd 100644
--- a/tests/i915/gem_render_copy.c
+++ b/tests/i915/gem_render_copy.c
@@ -102,6 +102,42 @@ static void *yf_ptr(void *ptr,
(((y & ~0x1f) >> 5) * row_size);
}
+bool dump = false;
+
+static void *x_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ const int tile_width = 512;
+ int row_size = 8;
+ const int tile_size = tile_width * row_size;
+
+ x *= cpp; /* convert to Byte offset */
+
+ return ptr +
+ ((x / tile_width) * tile_width) +
+ (x % tile_width) +
+ ((y / row_size) * tile_size * (stride / tile_width)) +
+ ((y % row_size) * stride);
+}
+
+static void *y_ptr(void *ptr,
+ unsigned int x, unsigned int y,
+ unsigned int stride, unsigned int cpp)
+{
+ const int tile_width = 128;
+ int row_size = 32;
+ const int tile_size = tile_width * row_size;
+
+ x *= cpp; /* convert to Byte offset */
+
+ return ptr +
+ ((x / tile_width) * tile_width) +
+ (x % tile_width) +
+ ((y / row_size) * tile_size * (stride / tile_width)) +
+ ((y % row_size) * stride);
+}
+
static void copy_linear_to_yf(data_t *data, struct igt_buf *buf,
const uint32_t *linear)
{
@@ -126,6 +162,54 @@ static void copy_linear_to_yf(data_t *data, struct igt_buf *buf,
munmap(map, buf->bo->size);
}
+static void copy_linear_to_x(data_t *data, struct igt_buf *buf,
+ const uint32_t *linear)
+{
+ int height = igt_buf_height(buf);
+ int width = igt_buf_width(buf);
+ void *map;
+
+ gem_set_domain(data->drm_fd, buf->bo->handle,
+ I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ map = gem_mmap__cpu(data->drm_fd, buf->bo->handle, 0,
+ buf->bo->size, PROT_READ | PROT_WRITE);
+
+ for (int y = 0; y < height; y++) {
+ for (int x = 0; x < width; x++) {
+ uint32_t *ptr = x_ptr(map, x, y,
+ buf->stride, buf->bpp / 8);
+
+ *ptr = linear[y * width + x];
+ }
+ }
+
+ munmap(map, buf->bo->size);
+}
+
+static void copy_linear_to_y(data_t *data, struct igt_buf *buf,
+ const uint32_t *linear)
+{
+ int height = igt_buf_height(buf);
+ int width = igt_buf_width(buf);
+ void *map;
+
+ gem_set_domain(data->drm_fd, buf->bo->handle,
+ I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ map = gem_mmap__cpu(data->drm_fd, buf->bo->handle, 0,
+ buf->bo->size, PROT_READ | PROT_WRITE);
+
+ for (int y = 0; y < height; y++) {
+ for (int x = 0; x < width; x++) {
+ uint32_t *ptr = y_ptr(map, x, y,
+ buf->stride, buf->bpp / 8);
+
+ *ptr = linear[y * width + x];
+ }
+ }
+
+ munmap(map, buf->bo->size);
+}
+
static void copy_yf_to_linear(data_t *data, struct igt_buf *buf,
uint32_t *linear)
{
@@ -150,6 +234,54 @@ static void copy_yf_to_linear(data_t *data, struct igt_buf *buf,
munmap(map, buf->bo->size);
}
+static void copy_x_to_linear(data_t *data, struct igt_buf *buf,
+ uint32_t *linear)
+{
+ int height = igt_buf_height(buf);
+ int width = igt_buf_width(buf);
+ void *map;
+
+ gem_set_domain(data->drm_fd, buf->bo->handle,
+ I915_GEM_DOMAIN_CPU, 0);
+ map = gem_mmap__cpu(data->drm_fd, buf->bo->handle, 0,
+ buf->bo->size, PROT_READ);
+
+ for (int y = 0; y < height; y++) {
+ for (int x = 0; x < width; x++) {
+ uint32_t *ptr = x_ptr(map, x, y,
+ buf->stride, buf->bpp / 8);
+
+ linear[y * width + x] = *ptr;
+ }
+ }
+
+ munmap(map, buf->bo->size);
+}
+
+static void copy_y_to_linear(data_t *data, struct igt_buf *buf,
+ uint32_t *linear)
+{
+ int height = igt_buf_height(buf);
+ int width = igt_buf_width(buf);
+ void *map;
+
+ gem_set_domain(data->drm_fd, buf->bo->handle,
+ I915_GEM_DOMAIN_CPU, 0);
+ map = gem_mmap__cpu(data->drm_fd, buf->bo->handle, 0,
+ buf->bo->size, PROT_READ);
+
+ for (int y = 0; y < height; y++) {
+ for (int x = 0; x < width; x++) {
+ uint32_t *ptr = y_ptr(map, x, y,
+ buf->stride, buf->bpp / 8);
+
+ linear[y * width + x] = *ptr;
+ }
+ }
+
+ munmap(map, buf->bo->size);
+}
+
static void copy_linear_to_gtt(data_t *data, struct igt_buf *buf,
const uint32_t *linear)
{
@@ -166,6 +298,22 @@ static void copy_linear_to_gtt(data_t *data, struct igt_buf *buf,
munmap(map, buf->bo->size);
}
+static void copy_linear_to_wc(data_t *data, struct igt_buf *buf,
+ const uint32_t *linear)
+{
+ void *map;
+
+ gem_set_domain(data->drm_fd, buf->bo->handle,
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+
+ map = gem_mmap__wc(data->drm_fd, buf->bo->handle, 0,
+ buf->bo->size, PROT_READ | PROT_WRITE);
+
+ memcpy(map, linear, buf->bo->size);
+
+ munmap(map, buf->bo->size);
+}
+
static void copy_gtt_to_linear(data_t *data, struct igt_buf *buf,
uint32_t *linear)
{
@@ -182,6 +330,22 @@ static void copy_gtt_to_linear(data_t *data, struct igt_buf *buf,
munmap(map, buf->bo->size);
}
+static void copy_wc_to_linear(data_t *data, struct igt_buf *buf,
+ uint32_t *linear)
+{
+ void *map;
+
+ gem_set_domain(data->drm_fd, buf->bo->handle,
+ I915_GEM_DOMAIN_GTT, 0);
+
+ map = gem_mmap__wc(data->drm_fd, buf->bo->handle, 0,
+ buf->bo->size, PROT_READ);
+
+ igt_memcpy_from_wc(linear, map, buf->bo->size);
+
+ munmap(map, buf->bo->size);
+}
+
static void *linear_copy(data_t *data, struct igt_buf *buf)
{
void *linear;
@@ -191,12 +355,32 @@ static void *linear_copy(data_t *data, struct igt_buf *buf)
if (buf->tiling == I915_TILING_Yf)
copy_yf_to_linear(data, buf, linear);
+ else if (buf->tiling == I915_TILING_NONE)
+ copy_wc_to_linear(data, buf, linear);
+ else if (buf->tiling == I915_TILING_X)
+ copy_x_to_linear(data, buf, linear);
+ else if (buf->tiling == I915_TILING_Y)
+ copy_y_to_linear(data, buf, linear);
else
copy_gtt_to_linear(data, buf, linear);
return linear;
}
+static void copy_linear_to_tiled(data_t *data, struct igt_buf *buf, const uint32_t *linear)
+{
+ if (buf->tiling == I915_TILING_Yf)
+ copy_linear_to_yf(data, buf, linear);
+ else if (buf->tiling == I915_TILING_X)
+ copy_linear_to_x(data, buf, linear);
+ else if (buf->tiling == I915_TILING_Y)
+ copy_linear_to_y(data, buf, linear);
+ else if (buf->tiling == I915_TILING_NONE)
+ copy_linear_to_wc(data, buf, linear);
+ else
+ igt_info("Unknown tiling!\n");
+}
+
static void scratch_buf_write_to_png(data_t *data, struct igt_buf *buf,
const char *filename)
{
@@ -324,6 +508,12 @@ static void scratch_buf_draw_pattern(data_t *data, struct igt_buf *buf,
if (buf->tiling == I915_TILING_Yf)
copy_linear_to_yf(data, buf, linear);
+ else if (buf->tiling == I915_TILING_NONE)
+ copy_linear_to_wc(data, buf, linear);
+ else if (buf->tiling == I915_TILING_X)
+ copy_linear_to_x(data, buf, linear);
+ else if (buf->tiling == I915_TILING_Y)
+ copy_linear_to_y(data, buf, linear);
else
copy_linear_to_gtt(data, buf, linear);
@@ -338,6 +528,7 @@ scratch_buf_copy(data_t *data,
int width = igt_buf_width(dst);
int height = igt_buf_height(dst);
uint32_t *linear_dst;
+ uint32_t *linear_tmp;
igt_assert_eq(igt_buf_width(dst), igt_buf_width(src));
igt_assert_eq(igt_buf_height(dst), igt_buf_height(src));
@@ -352,8 +543,8 @@ scratch_buf_copy(data_t *data,
gem_set_domain(data->drm_fd, dst->bo->handle,
I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
- linear_dst = gem_mmap__gtt(data->drm_fd, dst->bo->handle,
- dst->bo->size, PROT_WRITE);
+
+ linear_tmp = linear_copy(data, dst);
if (src->tiling == I915_TILING_Yf) {
void *map;
@@ -369,11 +560,62 @@ scratch_buf_copy(data_t *data,
src->stride,
src->bpp / 8);
- linear_dst[(dy+y) * width + dx+x] = *ptr;
+ linear_tmp[(dy+y) * width + dx+x] = *ptr;
+ }
+ }
+
+ munmap(map, src->bo->size);
+ } else if (src->tiling == I915_TILING_Y) {
+ void *map;
+
+ gem_set_domain(data->drm_fd, src->bo->handle,
+ I915_GEM_DOMAIN_CPU, 0);
+ map = gem_mmap__cpu(data->drm_fd, src->bo->handle, 0,
+ src->bo->size, PROT_READ);
+
+ for (int y = 0; y < h; y++) {
+ for (int x = 0; x < w; x++) {
+ const uint32_t *ptr = y_ptr(map, sx+x, sy+y,
+ src->stride,
+ src->bpp / 8);
+
+ linear_tmp[(dy+y) * width + dx+x] = *ptr;
+ }
+ }
+
+ munmap(map, src->bo->size);
+ } else if (src->tiling == I915_TILING_X) {
+ void *map;
+
+ gem_set_domain(data->drm_fd, src->bo->handle,
+ I915_GEM_DOMAIN_CPU, 0);
+ map = gem_mmap__cpu(data->drm_fd, src->bo->handle, 0,
+ src->bo->size, PROT_READ);
+
+ for (int y = 0; y < h; y++) {
+ for (int x = 0; x < w; x++) {
+ const uint32_t *ptr = x_ptr(map, sx+x, sy+y,
+ src->stride,
+ src->bpp / 8);
+
+ linear_tmp[(dy+y) * width + dx+x] = *ptr;
}
}
munmap(map, src->bo->size);
+ } else if (src->tiling == I915_TILING_NONE) {
+ uint32_t *linear_src;
+
+ linear_src = gem_mmap__cpu(data->drm_fd, src->bo->handle, 0,
+ src->bo->size, PROT_READ);
+
+ for (int y = 0; y < h; y++) {
+ igt_memcpy_from_wc(&linear_tmp[(dy+y) * width + dx],
+ &linear_src[(sy+y) * width + sx],
+ w * (src->bpp / 8));
+ }
+
+ munmap(linear_src, src->bo->size);
} else {
uint32_t *linear_src;
@@ -384,7 +626,7 @@ scratch_buf_copy(data_t *data,
src->bo->size, PROT_READ);
for (int y = 0; y < h; y++) {
- igt_memcpy_from_wc(&linear_dst[(dy+y) * width + dx],
+ igt_memcpy_from_wc(&linear_tmp[(dy+y) * width + dx],
&linear_src[(sy+y) * width + sx],
w * (src->bpp / 8));
}
@@ -392,6 +634,8 @@ scratch_buf_copy(data_t *data,
munmap(linear_src, src->bo->size);
}
+ copy_linear_to_tiled(data, dst, linear_tmp);
+
munmap(linear_dst, dst->bo->size);
}
--
2.21.0
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 18+ messages in thread* [igt-dev] [PATCH i-g-t v6 2/9] tests/i915/gem_madvise.c: Add more mappings
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 1/9] tests/i915/gem_render_copy.c: Do detiling on the CPU side Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 3/9] lib/i915/gem_mman: Remove static variables Antonio Argenziano
` (8 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev
Check madvise versus more memory mappings.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/i915/gem_madvise.c | 115 ++++++++++++++++++++++++++-------------
1 file changed, 76 insertions(+), 39 deletions(-)
diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
index 729a4d33..bcaaa22e 100644
--- a/tests/i915/gem_madvise.c
+++ b/tests/i915/gem_madvise.c
@@ -47,66 +47,103 @@ IGT_TEST_DESCRIPTION("Checks that the kernel reports EFAULT when trying to use"
*
*/
-static jmp_buf jmp;
+static sigjmp_buf jmp;
static void __attribute__((noreturn)) sigtrap(int sig)
{
- longjmp(jmp, sig);
+ siglongjmp(jmp, sig);
}
+enum mode { CPU, WC, GTT };
+const char* modes[] = {[CPU] = "cpu", [WC] = "wc", [GTT] = "gtt"};
+
static void
dontneed_before_mmap(void)
{
- int fd = drm_open_driver(DRIVER_INTEL);
+ int fd;
uint32_t handle;
char *ptr;
- handle = gem_create(fd, OBJECT_SIZE);
- gem_madvise(fd, handle, I915_MADV_DONTNEED);
- ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
- close(fd);
-
- signal(SIGSEGV, sigtrap);
- signal(SIGBUS, sigtrap);
- switch (setjmp(jmp)) {
- case SIGBUS:
- break;
- case 0:
- *ptr = 0;
- default:
- igt_assert(!"reached");
- break;
+ for (unsigned mode = CPU; mode <= GTT; mode++) {
+ igt_debug("Mapping mode: %s\n", modes[mode]);
+
+ fd = drm_open_driver(DRIVER_INTEL);
+ handle = gem_create(fd, OBJECT_SIZE);
+ gem_madvise(fd, handle, I915_MADV_DONTNEED);
+
+ switch (mode) {
+ case GTT:
+ ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ case CPU:
+ ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ case WC:
+ ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ }
+
+ close(fd);
+
+ signal(SIGSEGV, sigtrap);
+ signal(SIGBUS, sigtrap);
+ switch (sigsetjmp(jmp, SIGBUS | SIGSEGV)) {
+ case SIGBUS:
+ break;
+ case 0:
+ *ptr = 0;
+ default:
+ igt_assert(!"reached");
+ break;
+ }
+ munmap(ptr, OBJECT_SIZE);
+ signal(SIGBUS, SIG_DFL);
+ signal(SIGSEGV, SIG_DFL);
}
- munmap(ptr, OBJECT_SIZE);
- signal(SIGBUS, SIG_DFL);
- signal(SIGSEGV, SIG_DFL);
}
static void
dontneed_after_mmap(void)
{
- int fd = drm_open_driver(DRIVER_INTEL);
+ int fd;
uint32_t handle;
char *ptr;
- handle = gem_create(fd, OBJECT_SIZE);
- ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
- igt_assert(ptr);
- gem_madvise(fd, handle, I915_MADV_DONTNEED);
- close(fd);
-
- signal(SIGBUS, sigtrap);
- switch (setjmp(jmp)) {
- case SIGBUS:
- break;
- case 0:
- *ptr = 0;
- default:
- igt_assert(!"reached");
- break;
+ for (unsigned mode = CPU; mode <= GTT; mode++) {
+ igt_debug("Mapping mode: %s\n", modes[mode]);
+
+ fd = drm_open_driver(DRIVER_INTEL);
+ handle = gem_create(fd, OBJECT_SIZE);
+
+ switch (mode) {
+ case GTT:
+ ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ case CPU:
+ ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ case WC:
+ ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ }
+
+ igt_assert(ptr);
+ gem_madvise(fd, handle, I915_MADV_DONTNEED);
+ close(fd);
+
+ signal(SIGBUS, sigtrap);
+ switch (sigsetjmp(jmp, SIGBUS)) {
+ case SIGBUS:
+ break;
+ case 0:
+ *ptr = 0;
+ default:
+ igt_assert(!"reached");
+ break;
+ }
+ munmap(ptr, OBJECT_SIZE);
+ signal(SIGBUS, SIG_DFL);
}
- munmap(ptr, OBJECT_SIZE);
- signal(SIGBUS, SIG_DFL);
}
static void
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [igt-dev] [PATCH i-g-t v6 3/9] lib/i915/gem_mman: Remove static variables
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 1/9] tests/i915/gem_render_copy.c: Do detiling on the CPU side Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 2/9] tests/i915/gem_madvise.c: Add more mappings Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 4/9] lib/i915: Add mmap_offset support Antonio Argenziano
` (7 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev
Since the IOCTL wrappers implemented in gem_mman should only be called
once at fixture time there is no need to save the state across multiple
calls.
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
---
lib/i915/gem_mman.c | 61 +++++++++++++++++++++------------------------
1 file changed, 28 insertions(+), 33 deletions(-)
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 3cf9a6bb..b43ccd95 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -103,40 +103,35 @@ int gem_munmap(void *ptr, uint64_t size)
bool gem_mmap__has_wc(int fd)
{
- static int has_wc = -1;
-
- if (has_wc == -1) {
- struct drm_i915_getparam gp;
- int mmap_version = -1;
- int gtt_version = -1;
-
- has_wc = 0;
-
- memset(&gp, 0, sizeof(gp));
- gp.param = I915_PARAM_MMAP_GTT_VERSION;
- gp.value = >t_version;
- ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
- memset(&gp, 0, sizeof(gp));
- gp.param = I915_PARAM_MMAP_VERSION;
- gp.value = &mmap_version;
- ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
- /* Do we have the new mmap_ioctl with DOMAIN_WC? */
- if (mmap_version >= 1 && gtt_version >= 2) {
- struct drm_i915_gem_mmap arg;
-
- /* Does this device support wc-mmaps ? */
- memset(&arg, 0, sizeof(arg));
- arg.handle = gem_create(fd, 4096);
- arg.offset = 0;
- arg.size = 4096;
- arg.flags = I915_MMAP_WC;
- has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
- gem_close(fd, arg.handle);
- }
- errno = 0;
+ struct drm_i915_getparam gp;
+ int mmap_version = -1;
+ int gtt_version = -1;
+ int has_wc = 0;
+
+ memset(&gp, 0, sizeof(gp));
+ gp.param = I915_PARAM_MMAP_GTT_VERSION;
+ gp.value = >t_version;
+ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ memset(&gp, 0, sizeof(gp));
+ gp.param = I915_PARAM_MMAP_VERSION;
+ gp.value = &mmap_version;
+ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ /* Do we have the new mmap_ioctl with DOMAIN_WC? */
+ if (mmap_version >= 1 && gtt_version >= 2) {
+ struct drm_i915_gem_mmap arg;
+
+ /* Does this device support wc-mmaps ? */
+ memset(&arg, 0, sizeof(arg));
+ arg.handle = gem_create(fd, 4096);
+ arg.offset = 0;
+ arg.size = 4096;
+ arg.flags = I915_MMAP_WC;
+ has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+ gem_close(fd, arg.handle);
}
+ errno = 0;
return has_wc > 0;
}
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [igt-dev] [PATCH i-g-t v6 4/9] lib/i915: Add mmap_offset support
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (2 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 3/9] lib/i915/gem_mman: Remove static variables Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 5/9] tests/i915/gem_mmap_offset_exhaustion.c: Extend test to different mappings Antonio Argenziano
` (6 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev; +Cc: Janulgue Abdiel, Matthew Auld
From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
With recently proposed changes, IGT need to start supporting new
way of mmaping object, which will be used from now by default.
This patch modify gem_mmap_wc and gem_mmap functions to be
in sync with those changes.
v2:
- Fix IOCTL number. (Daniele)
- Move wrappers to new file. (Chris)
v3:
- Use mmap IOCTL for lower level wrappers. (Chris)
v4:
- Don't use static variables. (Chris)
- Remember gem_ prefix. (Chris)
v5:
- Go back to using static variables (Antonio)
- Check mmap offset is present before mapping (Antonio)
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
lib/i915/gem_mman.c | 125 ++++++++++++++++++++++++++++++++++++--------
lib/i915/gem_mman.h | 33 ++++++++++++
2 files changed, 137 insertions(+), 21 deletions(-)
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index b43ccd95..0631bf40 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -103,34 +103,49 @@ int gem_munmap(void *ptr, uint64_t size)
bool gem_mmap__has_wc(int fd)
{
- struct drm_i915_getparam gp;
- int mmap_version = -1;
- int gtt_version = -1;
int has_wc = 0;
- memset(&gp, 0, sizeof(gp));
- gp.param = I915_PARAM_MMAP_GTT_VERSION;
- gp.value = >t_version;
- ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
- memset(&gp, 0, sizeof(gp));
- gp.param = I915_PARAM_MMAP_VERSION;
- gp.value = &mmap_version;
- ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
- /* Do we have the new mmap_ioctl with DOMAIN_WC? */
- if (mmap_version >= 1 && gtt_version >= 2) {
- struct drm_i915_gem_mmap arg;
+ /* Do we have the new mmap_offset ioctl? */
+ if (gem_has_mmap_offset(fd)) {
+ struct local_drm_i915_gem_mmap_offset arg;
/* Does this device support wc-mmaps ? */
memset(&arg, 0, sizeof(arg));
arg.handle = gem_create(fd, 4096);
arg.offset = 0;
- arg.size = 4096;
- arg.flags = I915_MMAP_WC;
- has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+ arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
+ has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
gem_close(fd, arg.handle);
+ } else {
+ struct drm_i915_getparam gp;
+ int mmap_version = -1;
+ int gtt_version = -1;
+
+ memset(&gp, 0, sizeof(gp));
+ gp.param = I915_PARAM_MMAP_GTT_VERSION;
+ gp.value = >t_version;
+ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ memset(&gp, 0, sizeof(gp));
+ gp.param = I915_PARAM_MMAP_VERSION;
+ gp.value = &mmap_version;
+ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ /* Do we have the mmap_ioctl with DOMAIN_WC? */
+ if (mmap_version >= 1 && gtt_version >= 2) {
+ struct drm_i915_gem_mmap arg;
+
+ /* Does this device support wc-mmaps ? */
+ memset(&arg, 0, sizeof(arg));
+ arg.handle = gem_create(fd, 4096);
+ arg.offset = 0;
+ arg.size = 4096;
+ arg.flags = I915_MMAP_WC;
+ has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+ gem_close(fd, arg.handle);
+ }
}
+
errno = 0;
return has_wc > 0;
@@ -206,7 +221,12 @@ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, un
*/
void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
- void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+ void *ptr;
+
+ ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
+ if (!ptr)
+ ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+
igt_assert(ptr);
return ptr;
}
@@ -243,7 +263,70 @@ void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, u
*/
void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
- void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
+ void *ptr;
+
+ ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
+ if (!ptr)
+ ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
+
igt_assert(ptr);
return ptr;
}
+
+bool gem_has_mmap_offset(int fd)
+{
+ static int has_mmap_offset = -1;
+
+ if (has_mmap_offset == -1) {
+ struct drm_i915_getparam gp;
+ has_mmap_offset = 0;
+
+ memset(&gp, 0, sizeof(gp));
+ gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
+ gp.value = &has_mmap_offset;
+ ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ }
+
+ return has_mmap_offset > 0;
+}
+
+/**
+ * __gem_mmap_offset:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void
+*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+{
+ struct local_drm_i915_gem_mmap_offset arg;
+ void *ptr;
+
+ memset(&arg, 0, sizeof(arg));
+ arg.handle = handle;
+ arg.offset = offset;
+ arg.flags = flags;
+
+ if (!gem_has_mmap_offset(fd))
+ return NULL;
+
+ if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
+ return NULL;
+
+ ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
+
+ if (ptr == MAP_FAILED)
+ ptr = NULL;
+ else
+ errno = 0;
+
+ return ptr;
+}
+
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index f7242ed7..fff2ecab 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -51,5 +51,38 @@ int gem_munmap(void *ptr, uint64_t size);
*/
#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
+struct local_drm_i915_gem_mmap_offset {
+ /** Handle for the object being mapped. */
+ __u32 handle;
+ __u32 pad;
+ /**
+ * Fake offset to use for subsequent mmap call
+ *
+ * This is a fixed-size type for 32/64 compatibility.
+ */
+ __u64 offset;
+
+ /**
+ * Flags for extended behaviour.
+ *
+ * It is mandatory that either one of the _WC/_WB flags
+ * should be passed here.
+ */
+ __u64 flags;
+};
+
+#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
+#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
+#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
+#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
+
+#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
+ DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
+
+bool gem_has_mmap_offset(int fd);
+
+void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
+
+
#endif /* GEM_MMAN_H */
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [igt-dev] [PATCH i-g-t v6 5/9] tests/i915/gem_mmap_offset_exhaustion.c: Extend test to different mappings.
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (3 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 4/9] lib/i915: Add mmap_offset support Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 6/9] igt/lib: Add wrapper to check if gtt mapping is available Antonio Argenziano
` (5 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/i915/gem_mmap_offset_exhaustion.c | 39 ++++++++++++++++++-------
1 file changed, 28 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_mmap_offset_exhaustion.c b/tests/i915/gem_mmap_offset_exhaustion.c
index 8c8e3fa2..fd5bc898 100644
--- a/tests/i915/gem_mmap_offset_exhaustion.c
+++ b/tests/i915/gem_mmap_offset_exhaustion.c
@@ -52,15 +52,30 @@ IGT_TEST_DESCRIPTION("Checks whether the kernel handles mmap offset exhaustion"
* uses unsigned long).
*/
+enum mode { CPU, WC, GTT };
+const char* modes[] = {[CPU] = "cpu", [WC] = "wc", [GTT] = "gtt"};
+
static void
-create_and_map_bo(int fd)
+create_and_map_bo(int fd, unsigned mode)
{
uint32_t handle;
char *ptr;
handle = gem_create(fd, OBJECT_SIZE);
- ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ switch (mode) {
+ case GTT:
+ ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ case CPU:
+ igt_require(gem_has_mmap_offset(fd));
+ ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ case WC:
+ igt_require(gem_has_mmap_offset(fd));
+ ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ break;
+ }
/* touch it to force it into the gtt */
*ptr = 0;
@@ -74,18 +89,20 @@ create_and_map_bo(int fd)
gem_madvise(fd, handle, I915_MADV_DONTNEED);
}
-igt_simple_main
+igt_main
{
- int fd, i;
+ for (unsigned mapping = CPU; mapping <= GTT; mapping++) {
- igt_skip_on_simulation();
+ igt_subtest_f("basic-%s", modes[mapping]) {
+ int fd = drm_open_driver(DRIVER_INTEL);
- fd = drm_open_driver(DRIVER_INTEL);
+ /* we have 32bit of address space, so try to fit one MB more
+ * than that. */
+ for (int i = 0; i < 4096 + 1; i++)
+ create_and_map_bo(fd, mapping);
- /* we have 32bit of address space, so try to fit one MB more
- * than that. */
- for (i = 0; i < 4096 + 1; i++)
- create_and_map_bo(fd);
+ close(fd);
+ }
- close(fd);
+ }
}
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [igt-dev] [PATCH i-g-t v6 6/9] igt/lib: Add wrapper to check if gtt mapping is available
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (4 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 5/9] tests/i915/gem_mmap_offset_exhaustion.c: Extend test to different mappings Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-14 9:47 ` Chris Wilson
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed Antonio Argenziano
` (4 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev; +Cc: Matthew Auld
Add wrapper to get mmap_gtt version number and another to check if
gtt mapping is at all available.
v2:
- Check errno only after failed syscall. (Chris)
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
lib/i915/gem_mman.c | 40 +++++++++++++++++++++++++++++++++++++++-
lib/i915/gem_mman.h | 11 +++++++++++
2 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 0631bf40..2b3947de 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -40,6 +40,41 @@
#define VG(x) do {} while (0)
#endif
+/**
+ * gem_mmap__gtt_version:
+ * @fd: open i915 drm file descriptor
+ *
+ * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
+ * set for gtt mapping. Since the mappable aperture in not always present, this
+ * function will return '-1' in case there is none.
+ */
+static int gem_mmap__gtt_version(int fd)
+{
+ static int gtt_version = ~0;
+
+ if (gtt_version == ~0) {
+ struct drm_i915_getparam gp;
+
+ gtt_version = 0;
+
+ memset(&gp, 0, sizeof(gp));
+ gp.param = I915_PARAM_MMAP_GTT_VERSION;
+ gp.value = >t_version;
+
+ if(ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) && errno == -ENODEV)
+ gtt_version = -1; /* No mappable aperture */
+
+ errno = 0;
+ }
+
+ return gtt_version;
+}
+
+bool gem_mmap__has_gtt(int fd)
+{
+ return gem_mmap__gtt_version(fd) >= 0;
+}
+
/**
* __gem_mmap__gtt:
* @fd: open i915 drm file descriptor
@@ -121,6 +156,9 @@ bool gem_mmap__has_wc(int fd)
int mmap_version = -1;
int gtt_version = -1;
+ bool compatible_gtt_version =
+ (!gem_mmap__has_gtt(fd) || gem_mmap__gtt_version(fd) >= 2);
+
memset(&gp, 0, sizeof(gp));
gp.param = I915_PARAM_MMAP_GTT_VERSION;
gp.value = >t_version;
@@ -132,7 +170,7 @@ bool gem_mmap__has_wc(int fd)
ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
/* Do we have the mmap_ioctl with DOMAIN_WC? */
- if (mmap_version >= 1 && gtt_version >= 2) {
+ if (mmap_version >= 1 && compatible_gtt_version) {
struct drm_i915_gem_mmap arg;
/* Does this device support wc-mmaps ? */
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index fff2ecab..d13bffae 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -31,6 +31,8 @@ void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, uns
bool gem_mmap__has_wc(int fd);
void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+bool gem_mmap__has_gtt(int fd);
+
#ifndef I915_GEM_DOMAIN_WC
#define I915_GEM_DOMAIN_WC 0x80
#endif
@@ -51,6 +53,15 @@ int gem_munmap(void *ptr, uint64_t size);
*/
#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
+/**
+ * gem_require_mmap_gtt:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether memory mappings through the mappable
+ * aperture are available. Automatically skips through igt_require() if not.
+ */
+#define gem_require_mmap_gtt(fd) igt_require(gem_mmap__has_gtt(fd))
+
struct local_drm_i915_gem_mmap_offset {
/** Handle for the object being mapped. */
__u32 handle;
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [igt-dev] [PATCH i-g-t v6 6/9] igt/lib: Add wrapper to check if gtt mapping is available
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 6/9] igt/lib: Add wrapper to check if gtt mapping is available Antonio Argenziano
@ 2019-06-14 9:47 ` Chris Wilson
2019-06-14 20:47 ` Antonio Argenziano
0 siblings, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-06-14 9:47 UTC (permalink / raw)
To: Antonio Argenziano, igt-dev; +Cc: Matthew Auld
Quoting Antonio Argenziano (2019-06-13 22:54:45)
> Add wrapper to get mmap_gtt version number and another to check if
> gtt mapping is at all available.
>
> v2:
> - Check errno only after failed syscall. (Chris)
>
> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> lib/i915/gem_mman.c | 40 +++++++++++++++++++++++++++++++++++++++-
> lib/i915/gem_mman.h | 11 +++++++++++
> 2 files changed, 50 insertions(+), 1 deletion(-)
>
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> index 0631bf40..2b3947de 100644
> --- a/lib/i915/gem_mman.c
> +++ b/lib/i915/gem_mman.c
> @@ -40,6 +40,41 @@
> #define VG(x) do {} while (0)
> #endif
>
> +/**
> + * gem_mmap__gtt_version:
> + * @fd: open i915 drm file descriptor
> + *
> + * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
> + * set for gtt mapping. Since the mappable aperture in not always present, this
> + * function will return '-1' in case there is none.
> + */
> +static int gem_mmap__gtt_version(int fd)
> +{
> + static int gtt_version = ~0;
Ahem.
> + if (gtt_version == ~0) {
> + struct drm_i915_getparam gp;
> +
> + gtt_version = 0;
> +
> + memset(&gp, 0, sizeof(gp));
> + gp.param = I915_PARAM_MMAP_GTT_VERSION;
> + gp.value = >t_version;
> +
> + if(ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) && errno == -ENODEV)
> + gtt_version = -1; /* No mappable aperture */
Hahaha, no?
MMAP_GTT == MMAP_OFFSET so when we extend MMAP_GTT ioctl with
the MMAP_OFFSET struct, we bump the MMAP_GTT_VERSION
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [igt-dev] [PATCH i-g-t v6 6/9] igt/lib: Add wrapper to check if gtt mapping is available
2019-06-14 9:47 ` Chris Wilson
@ 2019-06-14 20:47 ` Antonio Argenziano
0 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-14 20:47 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Matthew Auld
On 14/06/19 02:47, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-06-13 22:54:45)
>> Add wrapper to get mmap_gtt version number and another to check if
>> gtt mapping is at all available.
>>
>> v2:
>> - Check errno only after failed syscall. (Chris)
>>
>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> ---
>> lib/i915/gem_mman.c | 40 +++++++++++++++++++++++++++++++++++++++-
>> lib/i915/gem_mman.h | 11 +++++++++++
>> 2 files changed, 50 insertions(+), 1 deletion(-)
>>
>> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
>> index 0631bf40..2b3947de 100644
>> --- a/lib/i915/gem_mman.c
>> +++ b/lib/i915/gem_mman.c
>> @@ -40,6 +40,41 @@
>> #define VG(x) do {} while (0)
>> #endif
>>
>> +/**
>> + * gem_mmap__gtt_version:
>> + * @fd: open i915 drm file descriptor
>> + *
>> + * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
>> + * set for gtt mapping. Since the mappable aperture in not always present, this
>> + * function will return '-1' in case there is none.
>> + */
>> +static int gem_mmap__gtt_version(int fd)
>> +{
>> + static int gtt_version = ~0;
>
> Ahem.
Still there!?! I forgot to squash with the next patch.
>
>> + if (gtt_version == ~0) {
>> + struct drm_i915_getparam gp;
>> +
>> + gtt_version = 0;
>> +
>> + memset(&gp, 0, sizeof(gp));
>> + gp.param = I915_PARAM_MMAP_GTT_VERSION;
>> + gp.value = >t_version;
>> +
>> + if(ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) && errno == -ENODEV)
>> + gtt_version = -1; /* No mappable aperture */
>
> Hahaha, no?
>
> MMAP_GTT == MMAP_OFFSET so when we extend MMAP_GTT ioctl with
> the MMAP_OFFSET struct, we bump the MMAP_GTT_VERSION
Wasn't my impression from the lmem patches I saw. Then, could we get an
IOCTL for aperture existence or, even better, something for the actual
aperture size that returns 0 so we could have a
bool gem_has_mappable_aperture() {
return get_mappable_aperture_size() > 0;
}
which would make more sense.
Antonio
> -Chris
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 18+ messages in thread
* [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed.
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (5 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 6/9] igt/lib: Add wrapper to check if gtt mapping is available Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-14 9:54 ` Chris Wilson
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 8/9] Remove static variables from mapping version function Antonio Argenziano
` (3 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev; +Cc: Matthew Auld
With the GTT aperture becoming unavailable on certain platforms, tests
that target that mapping need to skip if such mapping is not available.
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
lib/igt_dummyload.c | 4 +-
lib/igt_fb.c | 5 ++-
tests/i915/gem_concurrent_all.c | 1 +
tests/i915/gem_ctx_sseu.c | 4 +-
tests/i915/gem_exec_basic.c | 1 +
tests/i915/gem_exec_faulting_reloc.c | 2 +
tests/i915/gem_exec_flush.c | 9 ++++
tests/i915/gem_exec_reloc.c | 7 +++
tests/i915/gem_exec_schedule.c | 5 ++-
tests/i915/gem_fence_thrash.c | 6 +++
tests/i915/gem_gtt_cpu_tlb.c | 1 +
tests/i915/gem_gtt_hog.c | 1 +
tests/i915/gem_gtt_speed.c | 1 +
tests/i915/gem_largeobject.c | 2 +
tests/i915/gem_madvise.c | 4 ++
tests/i915/gem_mmap_gtt.c | 4 +-
tests/i915/gem_mmap_offset_exhaustion.c | 4 +-
tests/i915/gem_mmap_wc.c | 2 +
tests/i915/gem_persistent_relocs.c | 2 +
tests/i915/gem_pwrite_pread.c | 6 +++
tests/i915/gem_reloc_vs_gpu.c | 21 +++++----
tests/i915/gem_render_copy.c | 60 ++++++++++++++-----------
tests/i915/gem_set_tiling_vs_gtt.c | 2 +
tests/i915/gem_set_tiling_vs_pwrite.c | 2 +
tests/i915/gem_shrink.c | 14 ++++--
tests/i915/gem_storedw_loop.c | 9 ++++
tests/i915/gem_streaming_writes.c | 16 ++++++-
tests/i915/gem_tiled_fence_blits.c | 1 +
tests/i915/gem_tiled_pread_basic.c | 1 +
tests/i915/gem_tiled_pread_pwrite.c | 4 +-
tests/i915/gem_tiled_swapping.c | 2 +
tests/i915/gem_tiled_wb.c | 2 +
tests/i915/gem_tiled_wc.c | 1 +
tests/i915/gem_tiling_max_stride.c | 3 +-
tests/i915/gem_userptr_blits.c | 10 ++++-
tests/i915/i915_pm_rpm.c | 9 ++++
tests/i915/i915_suspend.c | 2 +
tests/kms_draw_crc.c | 8 +++-
tests/kms_fence_pin_leak.c | 2 +
tests/kms_frontbuffer_tracking.c | 3 ++
tests/kms_psr.c | 4 ++
tests/prime_mmap.c | 2 +
tests/prime_mmap_coherency.c | 1 +
tests/prime_vgem.c | 5 +++
44 files changed, 203 insertions(+), 52 deletions(-)
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 0e06276a..7b77234b 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -109,9 +109,11 @@ emit_recursive_batch(igt_spin_t *spin,
obj[BATCH].handle = gem_create(fd, BATCH_SIZE);
batch = __gem_mmap__wc(fd, obj[BATCH].handle,
0, BATCH_SIZE, PROT_WRITE);
- if (!batch)
+ if (!batch) {
+ gem_require_mmap_gtt(fd);
batch = gem_mmap__gtt(fd, obj[BATCH].handle,
BATCH_SIZE, PROT_WRITE);
+ }
gem_set_domain(fd, obj[BATCH].handle,
I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 9d4f905e..cc7be584 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1882,10 +1882,11 @@ static void *map_bo(int fd, struct igt_fb *fb)
if (fb->is_dumb)
ptr = kmstest_dumb_map_buffer(fd, fb->gem_handle, fb->size,
PROT_READ | PROT_WRITE);
- else if (is_i915_device(fd))
+ else if (is_i915_device(fd)) {
+ gem_require_mmap_gtt(fd);
ptr = gem_mmap__gtt(fd, fb->gem_handle, fb->size,
PROT_READ | PROT_WRITE);
- else if (is_vc4_device(fd))
+ } else if (is_vc4_device(fd))
ptr = igt_vc4_mmap_bo(fd, fb->gem_handle, fb->size,
PROT_READ | PROT_WRITE);
else if (is_amdgpu_device(fd))
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 3ddaab82..259161d9 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -1422,6 +1422,7 @@ static void cpu_require(void)
static void gtt_require(void)
{
+ gem_require_mmap_gtt(fd);
}
static void bcs_require(void)
diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
index 48e4411c..aa8d9dc2 100644
--- a/tests/i915/gem_ctx_sseu.c
+++ b/tests/i915/gem_ctx_sseu.c
@@ -528,8 +528,10 @@ igt_main
igt_subtest("invalid-sseu")
test_invalid_sseu(fd);
- igt_subtest("ggtt-args")
+ igt_subtest("ggtt-args") {
+ gem_require_mmap_gtt(fd);
test_ggtt_args(fd);
+ }
igt_subtest("engines")
test_engines(fd);
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 1287860b..97e013eb 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -93,6 +93,7 @@ static void gtt(int fd, uint64_t flags)
struct drm_i915_gem_exec_object2 *exec;
uint32_t handle;
+ gem_require_mmap_gtt(fd);
gem_require_ring(fd, flags);
handle = gem_create(fd, 4096);
diff --git a/tests/i915/gem_exec_faulting_reloc.c b/tests/i915/gem_exec_faulting_reloc.c
index 6b05e43f..9db80f54 100644
--- a/tests/i915/gem_exec_faulting_reloc.c
+++ b/tests/i915/gem_exec_faulting_reloc.c
@@ -173,6 +173,8 @@ static void run(int object_size)
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
+ gem_require_mmap_gtt(fd);
+
devid = intel_get_drm_devid(fd);
handle = gem_create(fd, 4096);
src = gem_create(fd, object_size);
diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
index f820b2a8..c83b654c 100644
--- a/tests/i915/gem_exec_flush.c
+++ b/tests/i915/gem_exec_flush.c
@@ -79,6 +79,9 @@ static void run(int fd, unsigned ring, int nchild, int timeout,
{
const int gen = intel_gen(intel_get_drm_devid(fd));
+ if (!(flags & COHERENT) && !(flags & WC))
+ gem_require_mmap_gtt(fd);
+
/* The crux of this testing is whether writes by the GPU are coherent
* from the CPU.
*
@@ -357,6 +360,9 @@ static void batch(int fd, unsigned ring, int nchild, int timeout,
{
const int gen = intel_gen(intel_get_drm_devid(fd));
+ if (mode == BATCH_GTT)
+ gem_require_mmap_gtt(fd);
+
if (flags & CMDPARSER) {
int cmdparser = -1;
drm_i915_getparam_t gp;
@@ -586,6 +592,7 @@ igt_main
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
gem_require_mmap_wc(fd);
+ gem_require_mmap_gtt(fd);
igt_require(gem_can_store_dword(fd, 0));
igt_info("Has LLC? %s\n", yesno(gem_has_llc(fd)));
@@ -614,11 +621,13 @@ igt_main
b->name,
e->name)
batch(fd, ring, ncpus, timeout, b->mode, 0);
+
igt_subtest_f("%sbatch-%s-%s-wb",
b == batches && e->exec_id == 0 ? "basic-" : "",
b->name,
e->name)
batch(fd, ring, ncpus, timeout, b->mode, COHERENT);
+
igt_subtest_f("%sbatch-%s-%s-cmd",
b == batches && e->exec_id == 0 ? "basic-" : "",
b->name,
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index fdd9661d..17a071a3 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -115,6 +115,9 @@ static void from_mmap(int fd, uint64_t size, enum mode mode)
*/
intel_require_memory(2, size, CHECK_RAM);
+ if ((mode & ~RO) == GTT)
+ gem_require_mmap_gtt(fd);
+
memset(&obj, 0, sizeof(obj));
obj.handle = gem_create(fd, 4096);
gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
@@ -342,6 +345,9 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags)
const uint32_t bbe = MI_BATCH_BUFFER_END;
unsigned int reloc_offset;
+ if ((before | after) & I915_GEM_DOMAIN_GTT)
+ gem_require_mmap_gtt(fd);
+
memset(&obj, 0, sizeof(obj));
obj.handle = gem_create(fd, OBJSZ);
obj.relocs_ptr = to_user_pointer(&reloc);
@@ -711,6 +717,7 @@ igt_main
f->name) {
if ((m->before | m->after) & I915_GEM_DOMAIN_WC)
igt_require(gem_mmap__has_wc(fd));
+
basic_reloc(fd, m->before, m->after, f->flags);
}
}
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 7b418622..20b3404e 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1660,6 +1660,7 @@ igt_main
igt_subtest_f("independent-%s", e->name) {
igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
+ gem_require_mmap_gtt(fd);
independent(fd, e->exec_id | e->flags);
}
}
@@ -1761,8 +1762,10 @@ igt_main
igt_subtest_f("wide-%s", e->name)
wide(fd, e->exec_id | e->flags);
- igt_subtest_f("reorder-wide-%s", e->name)
+ igt_subtest_f("reorder-wide-%s", e->name) {
+ gem_require_mmap_gtt(fd);
reorder_wide(fd, e->exec_id | e->flags);
+ }
igt_subtest_f("smoketest-%s", e->name)
smoketest(fd, e->exec_id | e->flags, 5);
diff --git a/tests/i915/gem_fence_thrash.c b/tests/i915/gem_fence_thrash.c
index 2d7fb2ff..5567e37e 100644
--- a/tests/i915/gem_fence_thrash.c
+++ b/tests/i915/gem_fence_thrash.c
@@ -236,6 +236,12 @@ igt_main
{
igt_skip_on_simulation();
+ igt_fixture {
+ int fd = drm_open_driver(DRIVER_INTEL);
+ igt_require(gem_available_fences(fd) > 0); /* GTT mapping available */
+ close(fd);
+ }
+
igt_subtest("bo-write-verify-none")
igt_assert(run_test(0, bo_write_verify, I915_TILING_NONE, 80) == 0);
diff --git a/tests/i915/gem_gtt_cpu_tlb.c b/tests/i915/gem_gtt_cpu_tlb.c
index cf3c543d..02682a0d 100644
--- a/tests/i915/gem_gtt_cpu_tlb.c
+++ b/tests/i915/gem_gtt_cpu_tlb.c
@@ -79,6 +79,7 @@ igt_simple_main
igt_skip_on_simulation();
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
handle = gem_create(fd, OBJ_SIZE);
diff --git a/tests/i915/gem_gtt_hog.c b/tests/i915/gem_gtt_hog.c
index ca730649..b2eea679 100644
--- a/tests/i915/gem_gtt_hog.c
+++ b/tests/i915/gem_gtt_hog.c
@@ -161,6 +161,7 @@ igt_simple_main
/* check for an intel gpu before goint nuts. */
int fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
+ gem_require_mmap_gtt(fd);
close(fd);
igt_skip_on_simulation();
diff --git a/tests/i915/gem_gtt_speed.c b/tests/i915/gem_gtt_speed.c
index dfa7216c..af7f6775 100644
--- a/tests/i915/gem_gtt_speed.c
+++ b/tests/i915/gem_gtt_speed.c
@@ -125,6 +125,7 @@ igt_simple_main_args("s:", NULL, help_str, opt_handler, NULL)
buf = malloc(size);
memset(buf, 0, size);
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
handle = gem_create(fd, size);
igt_assert(handle);
diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
index 518396fa..a2d47edc 100644
--- a/tests/i915/gem_largeobject.c
+++ b/tests/i915/gem_largeobject.c
@@ -84,6 +84,8 @@ igt_simple_main
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+
test_large_object(fd);
free(data);
diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
index bcaaa22e..ab45aa39 100644
--- a/tests/i915/gem_madvise.c
+++ b/tests/i915/gem_madvise.c
@@ -74,6 +74,8 @@ dontneed_before_mmap(void)
switch (mode) {
case GTT:
ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ if (!gem_mmap__has_gtt(fd))
+ continue;
break;
case CPU:
ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
@@ -118,6 +120,8 @@ dontneed_after_mmap(void)
switch (mode) {
case GTT:
ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+ if (!gem_mmap__has_gtt(fd))
+ continue;
break;
case CPU:
ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 6f3a9c36..6f94ae6e 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -883,8 +883,10 @@ igt_main
if (igt_run_in_simulation())
OBJECT_SIZE = 1 * 1024 * 1024;
- igt_fixture
+ igt_fixture {
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+ }
igt_subtest("bad-object") {
uint32_t real_handle = gem_create(fd, 4096);
diff --git a/tests/i915/gem_mmap_offset_exhaustion.c b/tests/i915/gem_mmap_offset_exhaustion.c
index fd5bc898..d1814978 100644
--- a/tests/i915/gem_mmap_offset_exhaustion.c
+++ b/tests/i915/gem_mmap_offset_exhaustion.c
@@ -96,6 +96,9 @@ igt_main
igt_subtest_f("basic-%s", modes[mapping]) {
int fd = drm_open_driver(DRIVER_INTEL);
+ if (mapping == GTT)
+ gem_require_mmap_gtt(fd);
+
/* we have 32bit of address space, so try to fit one MB more
* than that. */
for (int i = 0; i < 4096 + 1; i++)
@@ -103,6 +106,5 @@ igt_main
close(fd);
}
-
}
}
diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
index c9e5bf23..9e432892 100644
--- a/tests/i915/gem_mmap_wc.c
+++ b/tests/i915/gem_mmap_wc.c
@@ -334,6 +334,8 @@ test_write_gtt_read_wc(int fd)
uint32_t handle;
uint32_t *src, *dst;
+ gem_require_mmap_gtt(fd);
+
handle = gem_create(fd, OBJECT_SIZE);
set_domain(fd, handle);
diff --git a/tests/i915/gem_persistent_relocs.c b/tests/i915/gem_persistent_relocs.c
index 452fe686..17266c48 100644
--- a/tests/i915/gem_persistent_relocs.c
+++ b/tests/i915/gem_persistent_relocs.c
@@ -199,6 +199,8 @@ static void do_test(int fd, bool faulting_reloc)
uint32_t test;
int i, repeat;
+ gem_require_mmap_gtt(fd);
+
if (faulting_reloc)
igt_disable_prefault();
diff --git a/tests/i915/gem_pwrite_pread.c b/tests/i915/gem_pwrite_pread.c
index 3a58eae6..026c6a35 100644
--- a/tests/i915/gem_pwrite_pread.c
+++ b/tests/i915/gem_pwrite_pread.c
@@ -182,6 +182,8 @@ static void test_as_gtt_mmap(int fd, uint32_t src, uint32_t dst, int len)
int i;
BUILD_EXEC;
+ gem_require_mmap_gtt(fd);
+
src_ptr = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_WRITE);
dst_ptr = gem_mmap__gtt(fd, dst, OBJECT_SIZE, PROT_READ);
@@ -321,6 +323,8 @@ igt_main_args("s:", NULL, help_str, opt_handler, NULL)
for (count = 1; count <= 1<<17; count <<= 1) {
struct timeval start, end;
+ gem_require_mmap_gtt(fd);
+
gettimeofday(&start, NULL);
as_gtt_mmap(fd, src, dst, tmp, object_size, count);
gettimeofday(&end, NULL);
@@ -399,6 +403,8 @@ igt_main_args("s:", NULL, help_str, opt_handler, NULL)
for (count = 1; count <= 1<<17; count <<= 1) {
struct timeval start, end;
+ gem_require_mmap_gtt(fd);
+
gettimeofday(&start, NULL);
as_gtt_mmap(fd, src, dst, tmp, object_size, count);
gettimeofday(&end, NULL);
diff --git a/tests/i915/gem_reloc_vs_gpu.c b/tests/i915/gem_reloc_vs_gpu.c
index d421e434..e1475a1f 100644
--- a/tests/i915/gem_reloc_vs_gpu.c
+++ b/tests/i915/gem_reloc_vs_gpu.c
@@ -159,17 +159,17 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
*/
reloc[0].presumed_offset = -1;
- handle_relocs = gem_create(fd, 4096);
- gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
- gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
- PROT_READ | PROT_WRITE);
-
exec[1].handle = special_bo->handle;
exec[1].relocation_count = 1;
/* A newly mmap gtt bo will fault on first access. */
- if (faulting_reloc)
+ if (faulting_reloc) {
+ handle_relocs = gem_create(fd, 4096);
+ gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
+ gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
+ PROT_READ | PROT_WRITE);
+
exec[1].relocs_ptr = to_user_pointer(gtt_relocs);
- else
+ } else
exec[1].relocs_ptr = to_user_pointer(reloc);
execbuf.buffers_ptr = to_user_pointer(exec);
@@ -180,7 +180,8 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
gem_execbuf(fd, &execbuf);
- gem_close(fd, handle_relocs);
+ if (faulting_reloc)
+ gem_close(fd, handle_relocs);
}
static igt_hang_t no_hang(int fd)
@@ -201,8 +202,10 @@ static void do_test(int fd, bool faulting_reloc,
uint32_t test;
int i;
- if (faulting_reloc)
+ if (faulting_reloc) {
+ gem_require_mmap_gtt(fd);
igt_disable_prefault();
+ }
act_size = 2048;
dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size,
diff --git a/tests/i915/gem_render_copy.c b/tests/i915/gem_render_copy.c
index cc1529fd..915070cf 100644
--- a/tests/i915/gem_render_copy.c
+++ b/tests/i915/gem_render_copy.c
@@ -961,32 +961,40 @@ igt_main_args("da", NULL, help_str, opt_handler, NULL)
igt_assert(data.batch);
}
- igt_subtest("linear")
- test(&data, I915_TILING_NONE, 0);
- igt_subtest("x-tiled")
- test(&data, I915_TILING_X, 0);
- igt_subtest("y-tiled")
- test(&data, I915_TILING_Y, 0);
- igt_subtest("yf-tiled")
- test(&data, I915_TILING_Yf, 0);
-
- igt_subtest("y-tiled-ccs-to-linear")
- test(&data, I915_TILING_NONE, I915_TILING_Y);
- igt_subtest("y-tiled-ccs-to-x-tiled")
- test(&data, I915_TILING_X, I915_TILING_Y);
- igt_subtest("y-tiled-ccs-to-y-tiled")
- test(&data, I915_TILING_Y, I915_TILING_Y);
- igt_subtest("y-tiled-ccs-to-yf-tiled")
- test(&data, I915_TILING_Yf, I915_TILING_Y);
-
- igt_subtest("yf-tiled-ccs-to-linear")
- test(&data, I915_TILING_NONE, I915_TILING_Yf);
- igt_subtest("yf-tiled-ccs-to-x-tiled")
- test(&data, I915_TILING_X, I915_TILING_Yf);
- igt_subtest("yf-tiled-ccs-to-y-tiled")
- test(&data, I915_TILING_Y, I915_TILING_Yf);
- igt_subtest("yf-tiled-ccs-to-yf-tiled")
- test(&data, I915_TILING_Yf, I915_TILING_Yf);
+ igt_subtest_group {
+ igt_subtest("linear")
+ test(&data, I915_TILING_NONE, 0);
+ igt_subtest("x-tiled")
+ test(&data, I915_TILING_X, 0);
+ igt_subtest("y-tiled")
+ test(&data, I915_TILING_Y, 0);
+ igt_subtest("yf-tiled")
+ test(&data, I915_TILING_Yf, 0);
+ }
+
+ igt_subtest_group {
+ igt_fixture {
+ gem_require_mmap_gtt(data.drm_fd);
+ }
+
+ igt_subtest("y-tiled-ccs-to-linear")
+ test(&data, I915_TILING_NONE, I915_TILING_Y);
+ igt_subtest("y-tiled-ccs-to-x-tiled")
+ test(&data, I915_TILING_X, I915_TILING_Y);
+ igt_subtest("y-tiled-ccs-to-y-tiled")
+ test(&data, I915_TILING_Y, I915_TILING_Y);
+ igt_subtest("y-tiled-ccs-to-yf-tiled")
+ test(&data, I915_TILING_Yf, I915_TILING_Y);
+
+ igt_subtest("yf-tiled-ccs-to-linear")
+ test(&data, I915_TILING_NONE, I915_TILING_Yf);
+ igt_subtest("yf-tiled-ccs-to-x-tiled")
+ test(&data, I915_TILING_X, I915_TILING_Yf);
+ igt_subtest("yf-tiled-ccs-to-y-tiled")
+ test(&data, I915_TILING_Y, I915_TILING_Yf);
+ igt_subtest("yf-tiled-ccs-to-yf-tiled")
+ test(&data, I915_TILING_Yf, I915_TILING_Yf);
+ }
igt_fixture {
intel_batchbuffer_free(data.batch);
diff --git a/tests/i915/gem_set_tiling_vs_gtt.c b/tests/i915/gem_set_tiling_vs_gtt.c
index 2611ec55..210d5358 100644
--- a/tests/i915/gem_set_tiling_vs_gtt.c
+++ b/tests/i915/gem_set_tiling_vs_gtt.c
@@ -60,6 +60,8 @@ igt_simple_main
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+
if (IS_GEN2(intel_get_drm_devid(fd)))
tile_height = 16;
else
diff --git a/tests/i915/gem_set_tiling_vs_pwrite.c b/tests/i915/gem_set_tiling_vs_pwrite.c
index f0126b64..d82e20b4 100644
--- a/tests/i915/gem_set_tiling_vs_pwrite.c
+++ b/tests/i915/gem_set_tiling_vs_pwrite.c
@@ -58,6 +58,8 @@ igt_simple_main
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+
for (i = 0; i < OBJECT_SIZE/4; i++)
data[i] = i;
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 037ff005..83d75d31 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -396,6 +396,8 @@ igt_main
uint64_t alloc_size = 0;
int num_processes = 0;
+ bool has_gtt = false;
+
igt_skip_on_simulation();
igt_fixture {
@@ -427,6 +429,8 @@ igt_main
engines[nengine++] = engine;
igt_require(nengine);
+ has_gtt = gem_mmap__has_gtt(fd);
+
close(fd);
}
@@ -435,9 +439,13 @@ igt_main
for(const struct test *t = tests; t->name; t++) {
for(const struct mode *m = modes; m->suffix; m++) {
- igt_subtest_f("%s%s", t->name, m->suffix)
- run_test(num_processes, alloc_size,
- t->func, m->flags);
+ igt_subtest_f("%s%s", t->name, m->suffix) {
+ if (t->func == mmap_gtt)
+ igt_require(has_gtt);
+
+ run_test(num_processes, alloc_size,
+ t->func, m->flags);
+ }
}
}
}
diff --git a/tests/i915/gem_storedw_loop.c b/tests/i915/gem_storedw_loop.c
index b00555e0..d16a1a6b 100644
--- a/tests/i915/gem_storedw_loop.c
+++ b/tests/i915/gem_storedw_loop.c
@@ -49,6 +49,12 @@ static int devid;
static unsigned coherent_domain;
+static bool
+uses_coherent_gtt(int fd)
+{
+ return (!gem_has_llc(fd) || gem_mmap__has_wc(fd));
+}
+
static void *
mmap_coherent(int fd, uint32_t handle, int size)
{
@@ -164,6 +170,9 @@ check_test_requirements(int fd, int ringid)
{
gem_require_ring(fd, ringid);
igt_require(gem_can_store_dword(fd, ringid));
+
+ if (uses_coherent_gtt(fd))
+ gem_require_mmap_gtt(fd);
}
igt_main
diff --git a/tests/i915/gem_streaming_writes.c b/tests/i915/gem_streaming_writes.c
index e83d69de..159cb7a6 100644
--- a/tests/i915/gem_streaming_writes.c
+++ b/tests/i915/gem_streaming_writes.c
@@ -48,6 +48,8 @@
#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define NEEDS_GTT(mode) (mode == 1)
+
IGT_TEST_DESCRIPTION("Test of streaming writes into active GPU sources");
#define SRC 0
@@ -75,6 +77,9 @@ static void test_streaming(int fd, int mode, int sync)
} *batch;
int i, n;
+ if (NEEDS_GTT(mode))
+ gem_require_mmap_gtt(fd);
+
memset(exec, 0, sizeof(exec));
exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
exec[DST].handle = gem_create(fd, OBJECT_SIZE);
@@ -245,6 +250,9 @@ static void test_batch(int fd, int mode, int reverse)
uint32_t *base;
uint32_t offset;
+ if (NEEDS_GTT(mode))
+ gem_require_mmap_gtt(fd);
+
memset(exec, 0, sizeof(exec));
exec[DST].handle = gem_create(fd, OBJECT_SIZE);
exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
@@ -389,14 +397,18 @@ igt_main
igt_subtest("batch-cpu")
test_batch(fd, 0, 0);
- igt_subtest("batch-gtt")
+ igt_subtest("batch-gtt") {
+ gem_require_mmap_gtt(fd);
test_batch(fd, 1, 0);
+ }
igt_subtest("batch-wc")
test_batch(fd, 2, 0);
igt_subtest("batch-reverse-cpu")
test_batch(fd, 0, 1);
- igt_subtest("batch-reverse-gtt")
+ igt_subtest("batch-reverse-gtt") {
+ gem_require_mmap_gtt(fd);
test_batch(fd, 1, 1);
+ }
igt_subtest("batch-reverse-wc")
test_batch(fd, 2, 1);
diff --git a/tests/i915/gem_tiled_fence_blits.c b/tests/i915/gem_tiled_fence_blits.c
index aacd42b7..249456e8 100644
--- a/tests/i915/gem_tiled_fence_blits.c
+++ b/tests/i915/gem_tiled_fence_blits.c
@@ -213,6 +213,7 @@ igt_main
igt_fixture {
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
+ gem_require_mmap_gtt(fd);
}
igt_subtest("basic")
diff --git a/tests/i915/gem_tiled_pread_basic.c b/tests/i915/gem_tiled_pread_basic.c
index 1ac9eccd..b5a4e348 100644
--- a/tests/i915/gem_tiled_pread_basic.c
+++ b/tests/i915/gem_tiled_pread_basic.c
@@ -124,6 +124,7 @@ igt_simple_main
uint32_t devid;
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
handle = create_bo(fd);
igt_require(gem_get_tiling(fd, handle, &tiling, &swizzle));
diff --git a/tests/i915/gem_tiled_pread_pwrite.c b/tests/i915/gem_tiled_pread_pwrite.c
index 0988a4e8..0c0cde7f 100644
--- a/tests/i915/gem_tiled_pread_pwrite.c
+++ b/tests/i915/gem_tiled_pread_pwrite.c
@@ -111,8 +111,10 @@ igt_simple_main
uint32_t tiling, swizzle;
int count;
int fd;
-
+
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+
count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ;
for (int i = 0; i < count/2; i++) {
diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
index ddf2a748..29783aba 100644
--- a/tests/i915/gem_tiled_swapping.c
+++ b/tests/i915/gem_tiled_swapping.c
@@ -175,6 +175,8 @@ igt_main
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+
intel_purge_vm_caches(fd);
check_memory_layout(fd);
diff --git a/tests/i915/gem_tiled_wb.c b/tests/i915/gem_tiled_wb.c
index b7f352fc..61aa1675 100644
--- a/tests/i915/gem_tiled_wb.c
+++ b/tests/i915/gem_tiled_wb.c
@@ -140,6 +140,8 @@ igt_simple_main
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
+
handle = create_bo(fd);
get_tiling(fd, handle, &tiling, &swizzle);
diff --git a/tests/i915/gem_tiled_wc.c b/tests/i915/gem_tiled_wc.c
index 845ec228..86e9bf46 100644
--- a/tests/i915/gem_tiled_wc.c
+++ b/tests/i915/gem_tiled_wc.c
@@ -113,6 +113,7 @@ igt_simple_main
uint32_t handle;
fd = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd);
gem_require_mmap_wc(fd);
handle = create_bo(fd);
diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
index 0e99d979..7024fc29 100644
--- a/tests/i915/gem_tiling_max_stride.c
+++ b/tests/i915/gem_tiling_max_stride.c
@@ -70,8 +70,9 @@ igt_simple_main
fd = drm_open_driver(DRIVER_INTEL);
- devid = intel_get_drm_devid(fd);
+ gem_require_mmap_wc(fd);
+ devid = intel_get_drm_devid(fd);
if (intel_gen(devid) >= 7) {
stride = 256 * 1024;
} else if (intel_gen(devid) >= 4) {
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 1373f160..c0a8a6f5 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -554,6 +554,8 @@ static int test_invalid_gtt_mapping(int fd)
uint32_t handle;
char *gtt, *map;
+ gem_require_mmap_gtt(fd);
+
/* Anonymous mapping to find a hole */
map = mmap(NULL, sizeof(linear) + 2 * PAGE_SIZE,
PROT_READ | PROT_WRITE,
@@ -616,8 +618,10 @@ static int test_invalid_gtt_mapping(int fd)
#define PE_BUSY 0x2
static void test_process_exit(int fd, int flags)
{
- if (flags & PE_GTT_MAP)
+ if (flags & PE_GTT_MAP) {
igt_require(gem_has_llc(fd));
+ gem_require_mmap_gtt(fd);
+ }
igt_fork(child, 1) {
uint32_t handle;
@@ -700,6 +704,8 @@ static int test_map_fixed_invalidate(int fd, uint32_t flags)
uint32_t handle[num_handles];
uint32_t *ptr;
+ gem_require_mmap_gtt(fd);
+
ptr = mmap(NULL, ptr_size,
PROT_READ | PROT_WRITE,
MAP_SHARED | MAP_ANONYMOUS,
@@ -944,6 +950,7 @@ static int test_dmabuf(void)
int ret;
fd1 = drm_open_driver(DRIVER_INTEL);
+ gem_require_mmap_gtt(fd1);
handle = create_userptr_bo(fd1, sizeof(linear));
memset(get_handle_ptr(handle), counter, sizeof(linear));
@@ -1212,6 +1219,7 @@ static void test_readonly_mmap(int i915)
*/
igt_require(igt_setup_clflush());
+ gem_require_mmap_gtt(i915);
sz = 16 << 12;
pages = mmap(NULL, sz, PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index f9f67ed3..7e9a920d 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -1007,6 +1007,7 @@ static void gem_mmap_subtest(bool gtt_mmap)
handle = gem_create(drm_fd, buf_size);
if (gtt_mmap) {
+ gem_require_mmap_gtt(drm_fd);
gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size,
PROT_READ | PROT_WRITE);
}
@@ -1372,7 +1373,9 @@ static void gem_evict_pwrite_subtest(void)
unsigned int num_trash_bos, n;
uint32_t buf;
+ gem_require_mmap_gtt(drm_fd);
num_trash_bos = gem_mappable_aperture_size() / (1024*1024) + 1;
+
trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
igt_assert(trash_bos);
@@ -1536,6 +1539,7 @@ static void cursor_subtest(bool dpms)
disable_all_screens_and_wait(&ms_data);
+ gem_require_mmap_gtt(drm_fd);
igt_require(default_mode_params);
crtc_id = default_mode_params->crtc_id;
@@ -1653,6 +1657,7 @@ static void test_one_plane(bool dpms, uint32_t plane_id,
int32_t crtc_x = 0, crtc_y = 0;
uint64_t tiling;
+ gem_require_mmap_gtt(drm_fd);
disable_all_screens_and_wait(&ms_data);
crtc_id = default_mode_params->crtc_id;
@@ -1800,6 +1805,8 @@ static void pm_test_tiling(void)
/* default stride value */
uint32_t stride = 512;
+ gem_require_mmap_gtt(drm_fd);
+
/* calculate how many objects we can map */
for (i = 1 << off_bit; i <= gtt_obj_max_size; i <<= 1, max_gem_objs++)
;
@@ -1854,6 +1861,7 @@ static void pm_test_caching(void)
I915_CACHING_DISPLAY, /* eDRAM caching */
};
+ gem_require_mmap_gtt(drm_fd);
disable_all_screens(&ms_data);
handle = gem_create(drm_fd, gtt_obj_max_size);
@@ -1891,6 +1899,7 @@ static void fences_subtest(bool dpms)
disable_all_screens_and_wait(&ms_data);
+ igt_require(gem_available_fences(drm_fd));
igt_require(default_mode_params);
params.crtc_id = default_mode_params->crtc_id;
params.connector_id = default_mode_params->connector_id;
diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
index 17c68cc1..09cf5542 100644
--- a/tests/i915/i915_suspend.c
+++ b/tests/i915/i915_suspend.c
@@ -50,6 +50,8 @@ test_fence_restore(int fd, bool tiled2untiled, bool hibernate)
uint32_t *ptr1, *ptr2, *ptr_tiled;
int i;
+ igt_require(gem_available_fences(fd));
+
/* We wall the tiled object with untiled canary objects to make sure
* that we detect tile leaking in both directions. */
handle1 = gem_create(fd, OBJECT_SIZE);
diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
index ea14db9a..1a2e2d4f 100644
--- a/tests/kms_draw_crc.c
+++ b/tests/kms_draw_crc.c
@@ -329,13 +329,17 @@ igt_main
igt_subtest_f("draw-method-%s-%s-%s",
format_str(format_idx),
igt_draw_get_method_name(method),
- tiling_str(tiling_idx))
+ tiling_str(tiling_idx)) {
+ gem_require_mmap_gtt(drm_fd);
draw_method_subtest(method, format_idx,
tilings[tiling_idx]);
+ }
} } }
- igt_subtest("fill-fb")
+ igt_subtest("fill-fb") {
+ gem_require_mmap_gtt(drm_fd);
fill_fb_subtest();
+ }
igt_fixture
teardown_environment();
diff --git a/tests/kms_fence_pin_leak.c b/tests/kms_fence_pin_leak.c
index e6c8b33c..57ce45cd 100644
--- a/tests/kms_fence_pin_leak.c
+++ b/tests/kms_fence_pin_leak.c
@@ -203,6 +203,8 @@ igt_simple_main
data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
igt_require_gem(data.drm_fd);
+ gem_require_mmap_gtt(data.drm_fd);
+
data.devid = intel_get_drm_devid(data.drm_fd);
kmstest_set_vt_graphics_mode();
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 1037faf8..6c0654d7 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -1741,6 +1741,9 @@ static void check_test_requirements(const struct test_mode *t)
if (opt.only_pipes != PIPE_COUNT)
igt_require(t->pipes == opt.only_pipes);
+
+ if (t->method == IGT_DRAW_MMAP_GTT)
+ gem_require_mmap_gtt(drm.fd);
}
static void set_crtc_fbs(const struct test_mode *t)
diff --git a/tests/kms_psr.c b/tests/kms_psr.c
index 39de0112..571844e8 100644
--- a/tests/kms_psr.c
+++ b/tests/kms_psr.c
@@ -41,6 +41,8 @@ enum operations {
PLANE_ONOFF,
};
+#define needs_gtt(op) if (op == MMAP_GTT) {gem_require_mmap_gtt(data.drm_fd);}
+
static const char *op_str(enum operations op)
{
static const char * const name[] = {
@@ -473,6 +475,7 @@ igt_main_args("", long_options, help_str, opt_handler, &data)
igt_subtest_f("%sprimary_%s",
append_subtest_name[data.op_psr_mode],
op_str(op)) {
+ needs_gtt(op);
data.op = op;
data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
test_setup(&data);
@@ -485,6 +488,7 @@ igt_main_args("", long_options, help_str, opt_handler, &data)
igt_subtest_f("%ssprite_%s",
append_subtest_name[data.op_psr_mode],
op_str(op)) {
+ needs_gtt(op);
data.op = op;
data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
test_setup(&data);
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index fc985784..e8ab19c0 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -79,6 +79,8 @@ test_correct(void)
char *ptr1, *ptr2;
uint32_t handle;
+ gem_require_mmap_gtt(fd);
+
handle = gem_create(fd, BO_SIZE);
fill_bo(handle, BO_SIZE);
diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
index 39538767..b1cbe777 100644
--- a/tests/prime_mmap_coherency.c
+++ b/tests/prime_mmap_coherency.c
@@ -293,6 +293,7 @@ igt_main
* reproducing boils down to trial and error to hit different scenarios.
* TODO: We may want to improve tests a bit by picking random subranges. */
igt_subtest("read") {
+ gem_require_mmap_gtt(fd);
igt_until_timeout(5) {
int stale = test_read_flush();
igt_fail_on_f(stale,
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 69ae8c9b..d08829f3 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -124,6 +124,8 @@ static void test_fence_mmap(int i915, int vgem)
int dmabuf, i;
int master[2], slave[2];
+ gem_require_mmap_gtt(i915);
+
igt_assert(pipe(master) == 0);
igt_assert(pipe(slave) == 0);
@@ -206,6 +208,8 @@ static void test_gtt(int vgem, int i915)
uint32_t *ptr;
int dmabuf, i;
+ gem_require_mmap_gtt(i915);
+
scratch.width = 1024;
scratch.height = 1024;
scratch.bpp = 32;
@@ -281,6 +285,7 @@ static void test_gtt_interleaved(int vgem, int i915)
uint32_t *ptr, *gtt;
int dmabuf, i;
+ gem_require_mmap_gtt(i915);
igt_require(is_coherent(i915));
scratch.width = 1024;
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed.
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed Antonio Argenziano
@ 2019-06-14 9:54 ` Chris Wilson
2019-06-14 21:16 ` Antonio Argenziano
0 siblings, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-06-14 9:54 UTC (permalink / raw)
To: Antonio Argenziano, igt-dev; +Cc: Matthew Auld
Quoting Antonio Argenziano (2019-06-13 22:54:46)
> diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
> index 7b418622..20b3404e 100644
> --- a/tests/i915/gem_exec_schedule.c
> +++ b/tests/i915/gem_exec_schedule.c
> @@ -1660,6 +1660,7 @@ igt_main
> igt_subtest_f("independent-%s", e->name) {
> igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
> igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
> + gem_require_mmap_gtt(fd);
> independent(fd, e->exec_id | e->flags);
> }
> }
> @@ -1761,8 +1762,10 @@ igt_main
> igt_subtest_f("wide-%s", e->name)
> wide(fd, e->exec_id | e->flags);
>
> - igt_subtest_f("reorder-wide-%s", e->name)
> + igt_subtest_f("reorder-wide-%s", e->name) {
> + gem_require_mmap_gtt(fd);
> reorder_wide(fd, e->exec_id | e->flags);
> + }
Drop these, I'd rather this test (gem_exec_schedule) outright fail and be
forced to fix it up (it's a test I very much want to keep) then have it
skip and overlook.
> diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
> index 518396fa..a2d47edc 100644
> --- a/tests/i915/gem_largeobject.c
> +++ b/tests/i915/gem_largeobject.c
> @@ -84,6 +84,8 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
Need to incorporate elsewhere. Or be satisfied with the essentials that
we can allocate large objects. Now how large is a matter of debate, I
think larger than memory but I haven't yet fixed the kernel.
> +
> test_large_object(fd);
>
> free(data);
> diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
> index bcaaa22e..ab45aa39 100644
> --- a/tests/i915/gem_madvise.c
> +++ b/tests/i915/gem_madvise.c
> @@ -74,6 +74,8 @@ dontneed_before_mmap(void)
> switch (mode) {
> case GTT:
Note for earlier patch, align case: to opening indent of switch().
Also some earlier patches added some LOCALs that are already available
from i915_drm.h
> ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
> + if (!gem_mmap__has_gtt(fd))
> + continue;
> break;
> case CPU:
> ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
> @@ -118,6 +120,8 @@ dontneed_after_mmap(void)
> switch (mode) {
> case GTT:
> ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
> + if (!gem_mmap__has_gtt(fd))
> + continue;
> break;
Order is important.
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed.
2019-06-14 9:54 ` Chris Wilson
@ 2019-06-14 21:16 ` Antonio Argenziano
2019-06-14 21:34 ` Chris Wilson
0 siblings, 1 reply; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-14 21:16 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Matthew Auld
On 14/06/19 02:54, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-06-13 22:54:46)
>> diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
>> index 7b418622..20b3404e 100644
>> --- a/tests/i915/gem_exec_schedule.c
>> +++ b/tests/i915/gem_exec_schedule.c
>> @@ -1660,6 +1660,7 @@ igt_main
>> igt_subtest_f("independent-%s", e->name) {
>> igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
>> igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
>> + gem_require_mmap_gtt(fd);
>> independent(fd, e->exec_id | e->flags);
>> }
>> }
>> @@ -1761,8 +1762,10 @@ igt_main
>> igt_subtest_f("wide-%s", e->name)
>> wide(fd, e->exec_id | e->flags);
>>
>> - igt_subtest_f("reorder-wide-%s", e->name)
>> + igt_subtest_f("reorder-wide-%s", e->name) {
>> + gem_require_mmap_gtt(fd);
>> reorder_wide(fd, e->exec_id | e->flags);
>> + }
>
> Drop these, I'd rather this test (gem_exec_schedule) outright fail and be
> forced to fix it up (it's a test I very much want to keep) then have it
> skip and overlook.
>
>> diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
>> index 518396fa..a2d47edc 100644
>> --- a/tests/i915/gem_largeobject.c
>> +++ b/tests/i915/gem_largeobject.c
>> @@ -84,6 +84,8 @@ igt_simple_main
>>
>> fd = drm_open_driver(DRIVER_INTEL);
>>
>> + gem_require_mmap_gtt(fd);
>
> Need to incorporate elsewhere. Or be satisfied with the essentials that
> we can allocate large objects. Now how large is a matter of debate, I
> think larger than memory but I haven't yet fixed the kernel.
Not sure what you mean here. Are you saying we should move the test, or
just have a large object allocation test added to something else?
>
>> +
>> test_large_object(fd);
>>
>> free(data);
>> diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
>> index bcaaa22e..ab45aa39 100644
>> --- a/tests/i915/gem_madvise.c
>> +++ b/tests/i915/gem_madvise.c
>> @@ -74,6 +74,8 @@ dontneed_before_mmap(void)
>> switch (mode) {
>> case GTT:
>
> Note for earlier patch, align case: to opening indent of switch().
> Also some earlier patches added some LOCALs that are already available
> from i915_drm.h
>
>> ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
>> + if (!gem_mmap__has_gtt(fd))
>> + continue;
>> break;
>> case CPU:
>> ptr = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
>> @@ -118,6 +120,8 @@ dontneed_after_mmap(void)
>> switch (mode) {
>> case GTT:
>> ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
>> + if (!gem_mmap__has_gtt(fd))
>> + continue;
>> break;
>
> Order is important.
Right, I was going for !ptr at some point but then changed my mind.
Antonio
> -Chris
>
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed.
2019-06-14 21:16 ` Antonio Argenziano
@ 2019-06-14 21:34 ` Chris Wilson
0 siblings, 0 replies; 18+ messages in thread
From: Chris Wilson @ 2019-06-14 21:34 UTC (permalink / raw)
To: Antonio Argenziano, igt-dev; +Cc: Matthew Auld
Quoting Antonio Argenziano (2019-06-14 22:16:55)
>
>
> On 14/06/19 02:54, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-06-13 22:54:46)
> >> diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
> >> index 518396fa..a2d47edc 100644
> >> --- a/tests/i915/gem_largeobject.c
> >> +++ b/tests/i915/gem_largeobject.c
> >> @@ -84,6 +84,8 @@ igt_simple_main
> >>
> >> fd = drm_open_driver(DRIVER_INTEL);
> >>
> >> + gem_require_mmap_gtt(fd);
> >
> > Need to incorporate elsewhere. Or be satisfied with the essentials that
> > we can allocate large objects. Now how large is a matter of debate, I
> > think larger than memory but I haven't yet fixed the kernel.
>
> Not sure what you mean here. Are you saying we should move the test, or
> just have a large object allocation test added to something else?
Nah, just questioning the purpose of the test really. It's pretty
useless... If the intent is to take a large object and check that all
ioctls work, it's missing a lot of the driver. On the other hand, we
should have that pretty much covered by the ioctl tests.
I think there is reasonable scope for a "largeobject" test, but
looking at the test it is pretty useless and should just disappear.
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [igt-dev] [PATCH i-g-t v6 8/9] Remove static variables from mapping version function
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (6 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 7/9] igt/i915: Require GTT mapping to be available when needed Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 9/9] igt/lib: If mappable aperture is missing return 0 size Antonio Argenziano
` (2 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev
---
lib/i915/gem_mman.c | 21 ++++++++-------------
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 2b3947de..4d08a01e 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -50,22 +50,17 @@
*/
static int gem_mmap__gtt_version(int fd)
{
- static int gtt_version = ~0;
+ int gtt_version = ~0;
+ struct drm_i915_getparam gp;
- if (gtt_version == ~0) {
- struct drm_i915_getparam gp;
+ memset(&gp, 0, sizeof(gp));
+ gp.param = I915_PARAM_MMAP_GTT_VERSION;
+ gp.value = >t_version;
- gtt_version = 0;
+ if(ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) && errno == -ENODEV)
+ gtt_version = -1; /* No mappable aperture */
- memset(&gp, 0, sizeof(gp));
- gp.param = I915_PARAM_MMAP_GTT_VERSION;
- gp.value = >t_version;
-
- if(ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) && errno == -ENODEV)
- gtt_version = -1; /* No mappable aperture */
-
- errno = 0;
- }
+ errno = 0;
return gtt_version;
}
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [igt-dev] [PATCH i-g-t v6 9/9] igt/lib: If mappable aperture is missing return 0 size
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (7 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 8/9] Remove static variables from mapping version function Antonio Argenziano
@ 2019-06-13 21:54 ` Antonio Argenziano
2019-06-14 9:56 ` Chris Wilson
2019-06-14 12:56 ` [igt-dev] ✓ Fi.CI.BAT: success for Aperture removal IGT changes (rev2) Patchwork
2019-06-15 9:07 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 1 reply; 18+ messages in thread
From: Antonio Argenziano @ 2019-06-13 21:54 UTC (permalink / raw)
To: igt-dev; +Cc: Matthew Auld
So far the aperture size has been read directly from the bar,
in this patch we return zero if the mappable aperture is not available
as the value stored in the bar is not accurate. The patch also adds a
'require' when a call to gem_mappable_aperture_size() is made so that
the aperture is guaranteed to exist before checking the size.
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
lib/ioctl_wrappers.c | 28 ++++++++++++++-------
lib/ioctl_wrappers.h | 3 ++-
tests/i915/gem_concurrent_all.c | 12 ++++-----
tests/i915/gem_cpu_reloc.c | 4 +--
tests/i915/gem_mmap.c | 4 +--
tests/i915/gem_mmap_gtt.c | 10 ++++----
tests/i915/gem_pwrite.c | 4 +--
tests/i915/gem_shrink.c | 2 +-
tests/i915/i915_pm_rpm.c | 2 +-
tests/kms_big_fb.c | 2 +-
tests/kms_flip.c | 2 +-
tests/prime_mmap.c | 43 ++++++++++++++++++++++++++++++---
12 files changed, 81 insertions(+), 35 deletions(-)
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 280fdd62..58603e0e 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -1088,19 +1088,14 @@ uint64_t gem_aperture_size(int fd)
return aperture_size;
}
-/**
- * gem_mappable_aperture_size:
- *
- * Feature test macro to query the kernel for the mappable gpu aperture size.
- * This is the area available for GTT memory mappings.
- *
- * Returns: The mappable gtt address space size.
- */
-uint64_t gem_mappable_aperture_size(void)
+static uint64_t __gem_mappable_aperture_size(int fd)
{
struct pci_device *pci_dev = intel_get_pci_device();
int bar;
+ if (!gem_mmap__has_gtt(fd))
+ return 0; /* Aperture not available */
+
if (intel_gen(pci_dev->device_id) < 3)
bar = 0;
else
@@ -1109,6 +1104,21 @@ uint64_t gem_mappable_aperture_size(void)
return pci_dev->regions[bar].size;
}
+/**
+ * gem_mappable_aperture_size:
+ *
+ * Feature test macro to query the kernel for the mappable gpu aperture size.
+ * This is the area available for GTT memory mappings.
+ *
+ * Returns: The mappable gtt address space size.
+ */
+uint64_t gem_mappable_aperture_size(int fd)
+{
+ gem_require_mmap_gtt(fd);
+
+ return __gem_mappable_aperture_size(fd);
+}
+
/**
* gem_global_aperture_size:
* @fd: open i915 drm file descriptor
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 03211c97..5e8e92e1 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -38,6 +38,7 @@
#include "i915/gem_context.h"
#include "i915/gem_scheduler.h"
+#include "i915/gem_mman.h"
/**
* igt_ioctl:
@@ -136,7 +137,7 @@ uint64_t gem_total_stolen_size(int fd);
uint64_t gem_available_aperture_size(int fd);
uint64_t gem_aperture_size(int fd);
uint64_t gem_global_aperture_size(int fd);
-uint64_t gem_mappable_aperture_size(void);
+uint64_t gem_mappable_aperture_size(int fd);
bool gem_has_softpin(int fd);
bool gem_has_exec_fence(int fd);
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 259161d9..646f2eef 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -1831,7 +1831,7 @@ igt_main
c->name, s->name, "small");
igt_subtest_group {
igt_fixture {
- count = num_buffers(gem_mappable_aperture_size()/4,
+ count = num_buffers(gem_mappable_aperture_size(fd)/4,
s, c, CHECK_RAM);
}
run_modes(name, c, modes, s, count);
@@ -1842,7 +1842,7 @@ igt_main
c->name, s->name, "thrash");
igt_subtest_group {
igt_fixture {
- count = num_buffers(gem_mappable_aperture_size(),
+ count = num_buffers(gem_mappable_aperture_size(fd),
s, c, CHECK_RAM);
}
run_modes(name, c, modes, s, count);
@@ -1874,7 +1874,7 @@ igt_main
c->name, s->name, "shrink");
igt_subtest_group {
igt_fixture {
- count = num_buffers(gem_mappable_aperture_size(),
+ count = num_buffers(gem_mappable_aperture_size(fd),
s, c, CHECK_RAM);
igt_fork_shrink_helper(fd);
@@ -1890,8 +1890,8 @@ igt_main
c->name, s->name, "swap");
igt_subtest_group {
igt_fixture {
- if (intel_get_avail_ram_mb() > gem_mappable_aperture_size()/(1024*1024)) {
- pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size()/(1024*1024);
+ if (intel_get_avail_ram_mb() > gem_mappable_aperture_size(fd)/(1024*1024)) {
+ pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size(fd)/(1024*1024);
igt_debug("Pinning %lld MiB\n", (long long)pin_sz);
pin_sz *= 1024 * 1024;
@@ -1905,7 +1905,7 @@ igt_main
igt_require(pinned);
}
- count = num_buffers(gem_mappable_aperture_size(),
+ count = num_buffers(gem_mappable_aperture_size(fd),
s, c, CHECK_RAM | CHECK_SWAP);
}
run_modes(name, c, modes, s, count);
diff --git a/tests/i915/gem_cpu_reloc.c b/tests/i915/gem_cpu_reloc.c
index 47099862..17c2fe11 100644
--- a/tests/i915/gem_cpu_reloc.c
+++ b/tests/i915/gem_cpu_reloc.c
@@ -283,7 +283,7 @@ igt_main
run_test(i915, 1);
igt_subtest("full") {
- uint64_t aper_size = gem_mappable_aperture_size();
+ uint64_t aper_size = gem_mappable_aperture_size(i915);
unsigned long count = aper_size / 4096 + 1;
intel_require_memory(count, 4096, CHECK_RAM);
@@ -292,7 +292,7 @@ igt_main
}
igt_subtest("forked") {
- uint64_t aper_size = gem_mappable_aperture_size();
+ uint64_t aper_size = gem_mappable_aperture_size(i915);
unsigned long count = aper_size / 4096 + 1;
int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
diff --git a/tests/i915/gem_mmap.c b/tests/i915/gem_mmap.c
index f8cf052e..05a60627 100644
--- a/tests/i915/gem_mmap.c
+++ b/tests/i915/gem_mmap.c
@@ -53,10 +53,10 @@ test_huge_bo(int huge)
switch (huge) {
case -1:
- huge_object_size = gem_mappable_aperture_size() / 2;
+ huge_object_size = gem_mappable_aperture_size(fd) / 2;
break;
case 0:
- huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
+ huge_object_size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
break;
case 1:
huge_object_size = gem_aperture_size(fd) + PAGE_SIZE;
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 6f94ae6e..55d4ca65 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -562,7 +562,7 @@ test_huge_bo(int fd, int huge, int tiling)
switch (huge) {
case -1:
- size = gem_mappable_aperture_size() / 2;
+ size = gem_mappable_aperture_size(fd) / 2;
/* Power of two fence size, natural fence
* alignment, and the guard page at the end
@@ -577,7 +577,7 @@ test_huge_bo(int fd, int huge, int tiling)
size /= 2;
break;
case 0:
- size = gem_mappable_aperture_size() + PAGE_SIZE;
+ size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
break;
default:
size = gem_global_aperture_size(fd) + PAGE_SIZE;
@@ -661,13 +661,13 @@ test_huge_copy(int fd, int huge, int tiling_a, int tiling_b, int ncpus)
switch (huge) {
case -2:
- huge_object_size = gem_mappable_aperture_size() / 4;
+ huge_object_size = gem_mappable_aperture_size(fd) / 4;
break;
case -1:
- huge_object_size = gem_mappable_aperture_size() / 2;
+ huge_object_size = gem_mappable_aperture_size(fd) / 2;
break;
case 0:
- huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
+ huge_object_size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
break;
case 1:
huge_object_size = gem_global_aperture_size(fd) + PAGE_SIZE;
diff --git a/tests/i915/gem_pwrite.c b/tests/i915/gem_pwrite.c
index 97703a2a..7c4bf3d3 100644
--- a/tests/i915/gem_pwrite.c
+++ b/tests/i915/gem_pwrite.c
@@ -121,7 +121,7 @@ static void test_big_cpu(int fd, int scale, unsigned flags)
switch (scale) {
case 0:
- size = gem_mappable_aperture_size() + 4096;
+ size = gem_mappable_aperture_size(fd) + 4096;
break;
case 1:
size = gem_global_aperture_size(fd) + 4096;
@@ -183,7 +183,7 @@ static void test_big_gtt(int fd, int scale, unsigned flags)
igt_require(gem_mmap__has_wc(fd));
switch (scale) {
case 0:
- size = gem_mappable_aperture_size() + 4096;
+ size = gem_mappable_aperture_size(fd) + 4096;
break;
case 1:
size = gem_global_aperture_size(fd) + 4096;
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 83d75d31..9f642867 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -415,7 +415,7 @@ igt_main
* we expect the shrinker to start purging objects,
* and possibly fail.
*/
- alloc_size = gem_mappable_aperture_size() / 2;
+ alloc_size = gem_mappable_aperture_size(fd) / 2;
num_processes = 1 + (mem_size / (alloc_size >> 20));
igt_info("Using %d processes and %'lluMiB per process\n",
diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index 7e9a920d..eb7de1e6 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -1374,7 +1374,7 @@ static void gem_evict_pwrite_subtest(void)
uint32_t buf;
gem_require_mmap_gtt(drm_fd);
- num_trash_bos = gem_mappable_aperture_size() / (1024*1024) + 1;
+ num_trash_bos = gem_mappable_aperture_size(drm_fd) / (1024*1024) + 1;
trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
igt_assert(trash_bos);
diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
index c3498c67..7f8e27fd 100644
--- a/tests/kms_big_fb.c
+++ b/tests/kms_big_fb.c
@@ -631,7 +631,7 @@ igt_main
data.ram_size = intel_get_total_ram_mb() << 20;
data.aper_size = gem_aperture_size(data.drm_fd);
- data.mappable_size = gem_mappable_aperture_size();
+ data.mappable_size = gem_mappable_aperture_size(data.drm_fd);
igt_info("RAM: %"PRIu64" MiB, GPU address space: %"PRId64" MiB, GGTT mappable size: %"PRId64" MiB\n",
data.ram_size >> 20, data.aper_size >> 20,
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 2a158d97..78d1443f 100755
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -1237,7 +1237,7 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
/* 256 MB is usually the maximum mappable aperture,
* (make it 4x times that to ensure failure) */
if (o->flags & TEST_BO_TOOBIG) {
- bo_size = 4*gem_mappable_aperture_size();
+ bo_size = 4*gem_mappable_aperture_size(drm_fd);
igt_require(bo_size < gem_global_aperture_size(drm_fd));
}
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index e8ab19c0..c844effc 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -73,7 +73,7 @@ fill_bo_cpu(char *ptr)
}
static void
-test_correct(void)
+test_correct_gtt(void)
{
int dma_buf_fd;
char *ptr1, *ptr2;
@@ -103,6 +103,37 @@ test_correct(void)
gem_close(fd, handle);
}
+static void
+test_correct_wc(void)
+{
+ int dma_buf_fd;
+ char *ptr1, *ptr2;
+ uint32_t handle;
+
+ gem_require_mmap_wc(fd);
+
+ handle = gem_create(fd, BO_SIZE);
+ fill_bo(handle, BO_SIZE);
+
+ dma_buf_fd = prime_handle_to_fd(fd, handle);
+ igt_assert(errno == 0);
+
+ /* Check correctness vs WC mapping */
+ ptr1 = gem_mmap__wc(fd, handle, 0, BO_SIZE, PROT_READ);
+ ptr2 = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0);
+ igt_assert(ptr1 != MAP_FAILED);
+ igt_assert(ptr2 != MAP_FAILED);
+ igt_assert(memcmp(ptr1, ptr2, BO_SIZE) == 0);
+
+ /* Check pattern correctness */
+ igt_assert(memcmp(ptr2, pattern, sizeof(pattern)) == 0);
+
+ munmap(ptr1, BO_SIZE);
+ munmap(ptr2, BO_SIZE);
+ close(dma_buf_fd);
+ gem_close(fd, handle);
+}
+
static void
test_map_unmap(void)
{
@@ -449,8 +480,11 @@ test_aperture_limit(void)
char *ptr1, *ptr2;
uint32_t handle1, handle2;
/* Two buffers the sum of which > mappable aperture */
- uint64_t size1 = (gem_mappable_aperture_size() * 7) / 8;
- uint64_t size2 = (gem_mappable_aperture_size() * 3) / 8;
+ uint64_t size1;
+ uint64_t size2;
+
+ size1 = (gem_mappable_aperture_size(fd) * 7) / 8;
+ size2 = (gem_mappable_aperture_size(fd) * 3) / 8;
handle1 = gem_create(fd, size1);
fill_bo(handle1, BO_SIZE);
@@ -504,7 +538,8 @@ igt_main
const char *name;
void (*fn)(void);
} tests[] = {
- { "test_correct", test_correct },
+ { "test_correct_gtt", test_correct_gtt },
+ { "test_correct_wc", test_correct_wc },
{ "test_map_unmap", test_map_unmap },
{ "test_reprime", test_reprime },
{ "test_forked", test_forked },
--
2.21.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [igt-dev] [PATCH i-g-t v6 9/9] igt/lib: If mappable aperture is missing return 0 size
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 9/9] igt/lib: If mappable aperture is missing return 0 size Antonio Argenziano
@ 2019-06-14 9:56 ` Chris Wilson
0 siblings, 0 replies; 18+ messages in thread
From: Chris Wilson @ 2019-06-14 9:56 UTC (permalink / raw)
To: Antonio Argenziano, igt-dev; +Cc: Matthew Auld
Quoting Antonio Argenziano (2019-06-13 22:54:48)
> So far the aperture size has been read directly from the bar,
> in this patch we return zero if the mappable aperture is not available
> as the value stored in the bar is not accurate. The patch also adds a
> 'require' when a call to gem_mappable_aperture_size() is made so that
> the aperture is guaranteed to exist before checking the size.
>
> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> ---
> lib/ioctl_wrappers.c | 28 ++++++++++++++-------
> lib/ioctl_wrappers.h | 3 ++-
> tests/i915/gem_concurrent_all.c | 12 ++++-----
> tests/i915/gem_cpu_reloc.c | 4 +--
> tests/i915/gem_mmap.c | 4 +--
> tests/i915/gem_mmap_gtt.c | 10 ++++----
> tests/i915/gem_pwrite.c | 4 +--
> tests/i915/gem_shrink.c | 2 +-
> tests/i915/i915_pm_rpm.c | 2 +-
> tests/kms_big_fb.c | 2 +-
> tests/kms_flip.c | 2 +-
> tests/prime_mmap.c | 43 ++++++++++++++++++++++++++++++---
> 12 files changed, 81 insertions(+), 35 deletions(-)
>
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 280fdd62..58603e0e 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -1088,19 +1088,14 @@ uint64_t gem_aperture_size(int fd)
> return aperture_size;
> }
>
> -/**
> - * gem_mappable_aperture_size:
> - *
> - * Feature test macro to query the kernel for the mappable gpu aperture size.
> - * This is the area available for GTT memory mappings.
> - *
> - * Returns: The mappable gtt address space size.
> - */
> -uint64_t gem_mappable_aperture_size(void)
> +static uint64_t __gem_mappable_aperture_size(int fd)
> {
> struct pci_device *pci_dev = intel_get_pci_device();
> int bar;
>
> + if (!gem_mmap__has_gtt(fd))
> + return 0; /* Aperture not available */
Seems sensible, but does strike one as weird. If there is no aperture,
there will be no BAR. Right?
More interesting question is just how many places exploded with a zero
sized aperture?
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 18+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Aperture removal IGT changes (rev2)
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (8 preceding siblings ...)
2019-06-13 21:54 ` [igt-dev] [PATCH i-g-t v6 9/9] igt/lib: If mappable aperture is missing return 0 size Antonio Argenziano
@ 2019-06-14 12:56 ` Patchwork
2019-06-15 9:07 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-06-14 12:56 UTC (permalink / raw)
To: Antonio Argenziano; +Cc: igt-dev
== Series Details ==
Series: Aperture removal IGT changes (rev2)
URL : https://patchwork.freedesktop.org/series/61980/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6265 -> IGTPW_3149
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/61980/revisions/2/mbox/
Known issues
------------
Here are the changes found in IGTPW_3149 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_basic@basic-all:
- fi-icl-u2: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-icl-u2/igt@gem_exec_basic@basic-all.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/fi-icl-u2/igt@gem_exec_basic@basic-all.html
* igt@i915_selftest@live_blt:
- fi-skl-iommu: [PASS][3] -> [INCOMPLETE][4] ([fdo#108602])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-skl-iommu/igt@i915_selftest@live_blt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/fi-skl-iommu/igt@i915_selftest@live_blt.html
#### Possible fixes ####
* igt@gem_cpu_reloc@basic:
- fi-icl-dsi: [INCOMPLETE][5] ([fdo#107713] / [fdo#110246]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-icl-dsi/igt@gem_cpu_reloc@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/fi-icl-dsi/igt@gem_cpu_reloc@basic.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-y: [DMESG-FAIL][7] ([fdo#110917]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-icl-y/igt@i915_selftest@live_hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/fi-icl-y/igt@i915_selftest@live_hangcheck.html
#### Warnings ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [SKIP][9] ([fdo#109271]) -> [FAIL][10] ([fdo#110829])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#110246]: https://bugs.freedesktop.org/show_bug.cgi?id=110246
[fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829
[fdo#110917]: https://bugs.freedesktop.org/show_bug.cgi?id=110917
Participating hosts (53 -> 46)
------------------------------
Additional (1): fi-byt-j1900
Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u3 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* IGT: IGT_5055 -> IGTPW_3149
CI_DRM_6265: 657b9f601946cab518d8911ea92dc0f437a1f4b4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_3149: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/
IGT_5055: 495287320225e7f180d384cad7b207b77154438f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@gem_mmap_offset_exhaustion@basic-cpu
+igt@gem_mmap_offset_exhaustion@basic-gtt
+igt@gem_mmap_offset_exhaustion@basic-wc
+igt@prime_mmap@test_correct_gtt
+igt@prime_mmap@test_correct_wc
-igt@gem_mmap_offset_exhaustion
-igt@prime_mmap@test_correct
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 18+ messages in thread* [igt-dev] ✗ Fi.CI.IGT: failure for Aperture removal IGT changes (rev2)
2019-06-13 21:54 [igt-dev] [PATCH i-g-t v6 0/9] Aperture removal IGT changes Antonio Argenziano
` (9 preceding siblings ...)
2019-06-14 12:56 ` [igt-dev] ✓ Fi.CI.BAT: success for Aperture removal IGT changes (rev2) Patchwork
@ 2019-06-15 9:07 ` Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-06-15 9:07 UTC (permalink / raw)
To: Antonio Argenziano; +Cc: igt-dev
== Series Details ==
Series: Aperture removal IGT changes (rev2)
URL : https://patchwork.freedesktop.org/series/61980/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6265_full -> IGTPW_3149_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_3149_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_3149_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/61980/revisions/2/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_3149_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_madvise@dontneed-before-mmap:
- shard-hsw: ([PASS][1], [PASS][2]) -> [FAIL][3] +4 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw7/igt@gem_madvise@dontneed-before-mmap.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw1/igt@gem_madvise@dontneed-before-mmap.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw4/igt@gem_madvise@dontneed-before-mmap.html
* {igt@gem_mmap_offset_exhaustion@basic-cpu} (NEW):
- shard-iclb: NOTRUN -> [SKIP][4] +1 similar issue
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb8/igt@gem_mmap_offset_exhaustion@basic-cpu.html
* igt@gem_render_copy@linear:
- shard-snb: [PASS][5] -> [FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb5/igt@gem_render_copy@linear.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-snb2/igt@gem_render_copy@linear.html
* igt@gem_render_copy@x-tiled:
- shard-snb: ([PASS][7], [PASS][8]) -> [FAIL][9] +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb4/igt@gem_render_copy@x-tiled.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb5/igt@gem_render_copy@x-tiled.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-snb4/igt@gem_render_copy@x-tiled.html
* igt@gem_render_copy@y-tiled-ccs-to-y-tiled:
- shard-apl: [PASS][10] -> [FAIL][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl5/igt@gem_render_copy@y-tiled-ccs-to-y-tiled.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl7/igt@gem_render_copy@y-tiled-ccs-to-y-tiled.html
* igt@gem_render_copy@yf-tiled:
- shard-glk: [PASS][12] -> [FAIL][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk3/igt@gem_render_copy@yf-tiled.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-glk3/igt@gem_render_copy@yf-tiled.html
* igt@gem_render_copy@yf-tiled-ccs-to-linear:
- shard-kbl: ([PASS][14], [PASS][15]) -> [FAIL][16] +13 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl6/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl4/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl3/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
- shard-iclb: [PASS][17] -> [FAIL][18] +13 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb2/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb8/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
* igt@gem_render_copy@yf-tiled-ccs-to-x-tiled:
- shard-apl: ([PASS][19], [PASS][20]) -> [FAIL][21] +10 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl5/igt@gem_render_copy@yf-tiled-ccs-to-x-tiled.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl8/igt@gem_render_copy@yf-tiled-ccs-to-x-tiled.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl1/igt@gem_render_copy@yf-tiled-ccs-to-x-tiled.html
* igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled:
- shard-glk: ([PASS][22], [PASS][23]) -> [FAIL][24] +12 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk2/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk4/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-glk3/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html
New tests
---------
New tests have been introduced between CI_DRM_6265_full and IGTPW_3149_full:
### New IGT tests (5) ###
* igt@gem_mmap_offset_exhaustion@basic-cpu:
- Statuses : 6 skip(s)
- Exec time: [0.0, 0.00] s
* igt@gem_mmap_offset_exhaustion@basic-gtt:
- Statuses : 6 pass(s)
- Exec time: [1.07, 5.88] s
* igt@gem_mmap_offset_exhaustion@basic-wc:
- Statuses : 6 skip(s)
- Exec time: [0.0, 0.00] s
* igt@prime_mmap@test_correct_gtt:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.01] s
* igt@prime_mmap@test_correct_wc:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.01] s
Known issues
------------
Here are the changes found in IGTPW_3149_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_shared@q-smoketest-all:
- shard-glk: ([PASS][25], [PASS][26]) -> [INCOMPLETE][27] ([fdo#103359] / [k.org#198133])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk4/igt@gem_ctx_shared@q-smoketest-all.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk2/igt@gem_ctx_shared@q-smoketest-all.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-glk7/igt@gem_ctx_shared@q-smoketest-all.html
* igt@gem_eio@in-flight-suspend:
- shard-apl: ([PASS][28], [PASS][29]) -> [DMESG-WARN][30] ([fdo#108566])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl1/igt@gem_eio@in-flight-suspend.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl6/igt@gem_eio@in-flight-suspend.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl5/igt@gem_eio@in-flight-suspend.html
* igt@gem_eio@reset-stress:
- shard-glk: ([PASS][31], [PASS][32]) -> [DMESG-WARN][33] ([fdo#110913 ]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk4/igt@gem_eio@reset-stress.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk6/igt@gem_eio@reset-stress.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-glk7/igt@gem_eio@reset-stress.html
* igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
- shard-kbl: ([PASS][34], [PASS][35]) -> [DMESG-WARN][36] ([fdo#110913 ]) +1 similar issue
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl6/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl2/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl7/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
- shard-apl: ([PASS][37], [PASS][38]) -> [DMESG-WARN][39] ([fdo#110913 ]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl4/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl6/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl1/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
- shard-glk: [PASS][40] -> [DMESG-WARN][41] ([fdo#110913 ])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-glk3/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-glk2/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-hsw: [PASS][42] -> [DMESG-WARN][43] ([fdo#110789] / [fdo#110913 ])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw5/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_persistent_relocs@forked-thrashing:
- shard-hsw: ([PASS][44], [PASS][45]) -> [DMESG-WARN][46] ([fdo#110789] / [fdo#110913 ])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw6/igt@gem_persistent_relocs@forked-thrashing.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@gem_persistent_relocs@forked-thrashing.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw7/igt@gem_persistent_relocs@forked-thrashing.html
* igt@gem_tiled_swapping@non-threaded:
- shard-iclb: [PASS][47] -> [INCOMPLETE][48] ([fdo#107713] / [fdo#108686])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb2/igt@gem_tiled_swapping@non-threaded.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb3/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-iclb: [PASS][49] -> [DMESG-WARN][50] ([fdo#110913 ]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-snb: ([PASS][51], [PASS][52]) -> [DMESG-WARN][53] ([fdo#110913 ])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb7/igt@gem_userptr_blits@sync-unmap-cycles.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-iclb: [PASS][54] -> [INCOMPLETE][55] ([fdo#107713])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb6/igt@kms_busy@extended-modeset-hang-newfb-render-a.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb7/igt@kms_busy@extended-modeset-hang-newfb-render-a.html
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-hsw: ([PASS][56], [PASS][57]) -> [DMESG-WARN][58] ([fdo#110222] / [fdo#110789] / [fdo#110913 ])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw8/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw6/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b.html
* igt@kms_color@pipe-a-ctm-blue-to-red:
- shard-kbl: [PASS][59] -> [DMESG-WARN][60] ([fdo#103558] / [fdo#105602]) +3 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl3/igt@kms_color@pipe-a-ctm-blue-to-red.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl1/igt@kms_color@pipe-a-ctm-blue-to-red.html
* igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen:
- shard-hsw: ([PASS][61], [PASS][62]) -> [INCOMPLETE][63] ([fdo#103540])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw7/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw8/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
- shard-hsw: [PASS][64] -> [SKIP][65] ([fdo#109271]) +6 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move:
- shard-hsw: ([PASS][66], [PASS][67]) -> [SKIP][68] ([fdo#109271]) +3 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt:
- shard-iclb: [PASS][69] -> [FAIL][70] ([fdo#103167]) +7 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][71] -> [DMESG-WARN][72] ([fdo#108566])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][73] -> [SKIP][74] ([fdo#109441]) +3 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb7/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_rmfb@rmfb-ioctl:
- shard-kbl: ([PASS][75], [PASS][76]) -> [DMESG-WARN][77] ([fdo#103558] / [fdo#105602]) +24 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@kms_rmfb@rmfb-ioctl.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl1/igt@kms_rmfb@rmfb-ioctl.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl1/igt@kms_rmfb@rmfb-ioctl.html
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: ([PASS][78], [PASS][79]) -> [FAIL][80] ([fdo#109016])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl2/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
* igt@kms_sysfs_edid_timing:
- shard-iclb: [PASS][81] -> [FAIL][82] ([fdo#100047])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-iclb4/igt@kms_sysfs_edid_timing.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-iclb2/igt@kms_sysfs_edid_timing.html
* igt@kms_vblank@pipe-b-query-forked-hang:
- shard-snb: ([PASS][83], [PASS][84]) -> [DMESG-WARN][85] ([fdo#110789] / [fdo#110913 ])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb5/igt@kms_vblank@pipe-b-query-forked-hang.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb4/igt@kms_vblank@pipe-b-query-forked-hang.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-snb4/igt@kms_vblank@pipe-b-query-forked-hang.html
#### Possible fixes ####
* igt@gem_eio@in-flight-immediate:
- shard-kbl: ([DMESG-WARN][86], [DMESG-WARN][87]) ([fdo#110913 ]) -> [PASS][88] +1 similar issue
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl2/igt@gem_eio@in-flight-immediate.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl6/igt@gem_eio@in-flight-immediate.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl2/igt@gem_eio@in-flight-immediate.html
* igt@gem_eio@in-flight-suspend:
- shard-kbl: ([INCOMPLETE][89], [PASS][90]) ([fdo#103665]) -> [PASS][91]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl6/igt@gem_eio@in-flight-suspend.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-kbl7/igt@gem_eio@in-flight-suspend.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-kbl3/igt@gem_eio@in-flight-suspend.html
* igt@gem_eio@reset-stress:
- shard-snb: ([PASS][92], [FAIL][93]) ([fdo#109661]) -> [PASS][94]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb4/igt@gem_eio@reset-stress.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb7/igt@gem_eio@reset-stress.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-snb5/igt@gem_eio@reset-stress.html
* igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
- shard-apl: ([INCOMPLETE][95], [PASS][96]) ([fdo#103927]) -> [PASS][97]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl3/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl6/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl3/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-apl: ([DMESG-WARN][98], [DMESG-WARN][99]) ([fdo#110913 ]) -> [PASS][100] +2 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-apl4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
- shard-snb: [DMESG-WARN][101] ([fdo#110789] / [fdo#110913 ]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-snb7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
- shard-hsw: ([DMESG-WARN][103], [PASS][104]) ([fdo#110789] / [fdo#110913 ]) -> [PASS][105]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6265/shard-hsw4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/shard-hsw6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-glk: ([DMESG-WARN][106], [PASS][107]) ([fdo#110913 ])
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3149/
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